Patents by Inventor Young-Woo Park

Young-Woo Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9176830
    Abstract: A method for determining software errors in a virtualization-based integrated control system detects software errors for each partition (software of a vehicle controller) and recovers automatically. Thus, system reliability, which is an advantage of virtualization techniques, can be further enhanced, thereby providing an operator with stability, and software errors can be easily addressed by writing error information.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: November 3, 2015
    Assignees: HYUNDAI MOTOR COMPANY, KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Hyun Woo Lee, Young Woo Park, Min Hyuk Oh, Hae Young Kwon, Se Won Kim, Hyuck Yoo
  • Patent number: 9173303
    Abstract: An apparatus includes a first member including a plurality of first electrodes on a first substrate, a second member including a plurality of second electrodes on a second substrate, the second electrodes facing the first electrodes of the first member, and an anisotropic conductive film (ACF) between the first member and the second member, the ACF having a double-layered structure and electrically connecting the first member and the second member, the ACF including an epoxy resin with a polycyclic aromatic ring and exhibiting a minimum melt viscosity of about 3,000 Pa·s to about 10,000 Pa·s at about 30° C. to about 200° C.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: October 27, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Young Woo Park, Arum Amy Yu, Nam Ju Kim, Hyun Min Choi, Jin Seong Park, Dong Seon Uh
  • Patent number: 9171729
    Abstract: Methods of manufacturing vertical semiconductor devices may include forming a mold structure including sacrificial layers and insulating interlayers with a first opening formed therethrough. The sacrificial layers and the insulating interlayers may be stacked repeatedly and alternately on a substrate. The first opening may expose the substrate. Blocking layers may be formed by oxidizing portions of the sacrificial layers exposed by the first opening. A first semiconductor layer pattern, a charge trapping layer pattern and a tunnel insulation layer pattern, respectively, may be formed on the sidewall of the first opening. A second semiconductor layer may be formed on the first polysilicon layer pattern and the bottom of the first opening. The sacrificial layers and the insulating interlayers may be partially removed to form a second opening. The sacrificial layers may be removed to form grooves between the insulating interlayers. Control gate electrodes may be formed in the grooves.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: October 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Kwan You, Kwang-Soo Seol, Young-woo Park, Jin-Soo Lim
  • Patent number: 9150650
    Abstract: The present invention relates to human monoclonal antibodies neutralizing vascular endothelial growth factor receptor and the use thereof. More specifically, relates to human ScFv molecules neutralizing vascular endothelial growth factor receptor, and a composition for inhibiting angiogenesis and a composition for treating cancer, which contain the human ScFv molecules. The disclosed monoclonal antibody neutralizing vascular endothelial growth factor receptor shows excellent neutralizing ability in living cells, compared to that of a commercially available antibody against vascular endothelial growth factor receptor, and shows the ability to neutralize vascular endothelial growth factor receptor not only in humans, but also in mice and rats. Thus, the monoclonal antibody will be useful in anticancer studies and will be highly effective in cancer treatment.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: October 6, 2015
    Assignee: PHARMABCINE INC.
    Inventors: Jin-San Yoo, Weon-Sup Lee, Sang-Ryeol Shim, Mi-Hee Park, Jeong-Eun Kang, Do-Yun Kim, Joon Chul Lee, Dong-Heon Lee, Too-Hyon Cho, Sam-Sook Sul, Young-Guen Kwon, Bo-Jeong Pyun, Kwi-Hwa Kim, Chae-Ok Yun, Nahm-Ju Kim, Jae-Won Jeon, Dong-Sup Lee, Young-Woo Park, Geun-Bae Rha, Hyun-Sook Jang, Hyeon-Mi Yoo, Sung-Woo Kim, Se-mi Kim, Sang-Seok Koh
  • Publication number: 20150194332
    Abstract: A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.
    Type: Application
    Filed: March 9, 2015
    Publication date: July 9, 2015
    Inventors: Sung-IL CHANG, Young-Woo Park
  • Publication number: 20150169604
    Abstract: A vehicle data control system and method are provided. The vehicle data control system includes a file system that has a first partition as a read only memory configured to store and manage basic vehicle content, a second partition as a readable/writable memory configured to store and manage the basic vehicle content, and a third partition as a readable/writable memory configured to store and manage user content. In addition, a display unit is configured to display an image according to execution of at least one selected from between the basic vehicle content and the user content.
    Type: Application
    Filed: October 28, 2014
    Publication date: June 18, 2015
    Applicant: HYUNDAI MOTOR COMPANY
    Inventors: Min Hyuk Oh, Young Woo Park, Hyun Woo Lee, Hae Young Kwon
  • Patent number: 9048240
    Abstract: An electronic device includes an anisotropic conductive film as a connection material, the anisotropic conductive film being formed from an anisotropic conductive film-forming composition. The anisotropic conductive film-forming composition includes a polycyclic aromatic ring-containing epoxy resin, a fluorene epoxy resin, nano silica and conductive particles.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: June 2, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Young Woo Park, Nam Ju Kim, Kyoung Soo Park, Joon Mo Seo, Kyung Il Sul, Dong Seon Uh, Arum Yu, Hyun Min Choi
  • Patent number: 9035192
    Abstract: An anisotropic conductive adhesive composite and film include a binder and conductive particles dispersed in the binder. The conductive particles include a copper core particle and a metal coating layer coated on a surface of the corresponding copper core particle.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: May 19, 2015
    Assignee: CHEIL INDUSTRIES, INC.
    Inventors: Gyu Ho Lee, Young Woo Park, Il Rae Cho, Young Hun Kim, Kyoung Soo Park, Jin Seong Park, Dong Seon Uh, Kyung Jin Lee, Kwang Jin Jung
  • Publication number: 20150129878
    Abstract: A semiconductor device includes a peripheral circuit region on a substrate, a polysilicon layer on the peripheral circuit region, a memory cell array region on the polysilicon layer and overlapping the peripheral circuit region, the peripheral circuit region being under the memory cell array region, an upper interconnection layer on the memory cell array region, and a vertical contact through the memory cell array region and the polysilicon layer, the vertical contact connecting the upper interconnection layer to the peripheral circuit region.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 14, 2015
    Inventors: Yoo-cheol SHIN, Young-woo PARK, Jae-duk LEE
  • Publication number: 20150132906
    Abstract: A 3D semiconductor device includes an electrode structure has electrodes stacked on a substrate, semiconductor patterns penetrating the electrode structure, charge storing patterns interposed between the semiconductor patterns and the electrode structure, and blocking insulating patterns interposed between the charge storing patterns and the electrode structure. Each of the blocking insulating patterns surrounds the semiconductor patterns, and the charge storing patterns are horizontally spaced from each other and configured in such a way as to each be disposed around a respective one of the semiconductor patterns. Also, each of the charge storing patterns includes a plurality of horizontal segments, each interposed between vertically adjacent ones of the electrodes.
    Type: Application
    Filed: January 19, 2015
    Publication date: May 14, 2015
    Inventors: Sung-Il Chang, Young Woo Park, Jae Goo Lee
  • Publication number: 20150132915
    Abstract: There is provided a method of manufacturing a non-volatile memory device including: alternatively stacking a plurality of insulating layers and a plurality of conductive layers on a top surface of a substrate; forming an opening that exposes the top surface of the substrate and lateral surfaces of the insulating layers and the conductive layers; forming an anti-oxidation layer on at least the exposed lateral surfaces of the conductive layers; forming a gate dielectric layer on the anti-oxidation layer, the gate dielectric layer including a blocking layer, an electric charge storage layer, and a tunneling layer that are sequentially formed on the anti-oxidation layer; and forming a channel region on the tunneling layer
    Type: Application
    Filed: August 12, 2014
    Publication date: May 14, 2015
    Inventors: Jin Taek Park, Young Woo Park, Jae Duk Lee
  • Publication number: 20150110815
    Abstract: The present invention relates to a drug conjugate comprising a cytotoxic drug conjugated to a c-Met specific human antibody. More specifically, the present invention relates to: a drug conjugate comprising a cytotoxic drug conjugated to a c-Met specific human antibody; a pharmaceutical composition for cancer treatment comprising the drug conjugate; and a cancer treatment method comprising a step in which the drug conjugate or pharmaceutical composition is administered to an individual.
    Type: Application
    Filed: November 28, 2012
    Publication date: April 23, 2015
    Applicant: Korea Research Institute of Bioscience and Biotechnology
    Inventors: Young Woo Park, Ki Won Jo, Sun Jeong Jo, Soon Sil Hyun, Jae Eun Park, Seok Ho Yoo, Myeoung Hee Jang, Hye Nan Kim, Chan Woong Park
  • Publication number: 20150102349
    Abstract: A thin film transistor array substrate including a first TFT including a first active layer, a gate electrode, a first source electrode and a first drain electrode, a second TFT including a second active layer, a floating gate electrode, a control gate electrode, a second source electrode, and a second drain electrode, a capacitor including a first electrode and a second electrode, and a capping layer contacting a portion of the first electrode, the capping layer and the second electrode being on a same layer, is disclosed. A method of manufacturing thin film transistor array substrate is also disclosed.
    Type: Application
    Filed: April 1, 2014
    Publication date: April 16, 2015
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Wang-Woo Lee, Moo-Soon Ko, Do-Hyung Kim, Min-Woo Woo, Il-Jeong Lee, Jeong-Ho Lee, Young-Woo Park
  • Publication number: 20150097222
    Abstract: A semiconductor device is provided. A channel layer is formed on a substrate. The channel layer is extended in a first direction substantially perpendicular to an upper surface of the substrate. A ground selection line is formed on a first region of the channel layer. A plurality of word lines is formed on a second region of the channel layer. A plurality of string selection lines is formed on a third region of the channel layer. The second region of the channel layer includes a first conductivity type dopant. The first, second and third regions of the channel layer are disposed along the first direction.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 9, 2015
    Inventors: Do-hyun Lee, Jae-duk Lee, Young-woo Park, Yung-hwan Son
  • Patent number: 9000511
    Abstract: A non-volatile memory device includes a substrate having an active region defined by a device isolation region that has a trench and an air gap, a device isolation pattern positioned at a lower portion of the trench, a memory cell layer including a tunnel insulation layer, a trap insulation layer and a blocking insulation layer that are sequentially stacked on the active region and one of which extends from the active region toward the device isolation region encloses top of the air gap whose bottom is defined by a layer other than that of the top, and a control gate electrode positioned on the cell structure. The one of the insulation layer extending includes a recess at a region corresponding to the center of the air gap.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: April 7, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Il Chang, Young-Woo Park
  • Patent number: 8993343
    Abstract: The present invention relates to an anti-inflammatory composition using the antibody specifically binding to CD93 or its soluble fragment, and a diagnostic method and a diagnostic kit for inflammatory disease using CD93 or its soluble fragment specific antibody or aptamer.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: March 31, 2015
    Assignee: Korea Research Institute of Bioscience and Biotechnology
    Inventors: Young Woo Park, Jae Won Jeon, Joon-Goo Jung, Hye In Choi, Myung-ho Sohn, Ho youn Kim, Mi-La Cho, Young-Soon Jang, Ji-Hun Moon, Ji Hyun Park
  • Publication number: 20150060993
    Abstract: A nonvolatile memory device includes a substrate, a channel layer protruding from the substrate, a gate conductive layer surrounding the channel layer, a gate insulating layer disposed between the channel layer and the gate conductive layer, and a first insulating layer spaced apart from the channel layer and disposed on the top and bottom of the gate conductive layer. The gate insulating layer extends between the gate conductive layer and the first insulating layer.
    Type: Application
    Filed: October 31, 2014
    Publication date: March 5, 2015
    Inventors: Jae-goo Lee, Young-woo Park, Byung-kwan You, Dong-sik Lee, Sang-yong Park
  • Publication number: 20150060977
    Abstract: Semiconductor devices are provided. The semiconductor devices may include a substrate, a ground selection gate electrode, and a channel structure. The channel structure may extend the ground selection gate electrode in a first direction perpendicular to a top surface of the substrate, and include a channel layer, a channel contact layer, and a stepped portion. The channel contact layer may contact the substrate and include a first width in a second direction perpendicular to the first direction. The channel layer may contact the channel contact layer, include a bottom surface between a bottom surface of the ground selection gate electrode and the top surface of the substrate in the first direction, and include a second width in the second direction different from the first width.
    Type: Application
    Filed: August 28, 2014
    Publication date: March 5, 2015
    Inventors: Chang-hyun LEE, Jin-taek PARK, Young-woo PARK
  • Patent number: 8969947
    Abstract: A memory device includes a substrate, a semiconductor column extending perpendicularly from the substrate and a plurality of spaced-apart charge storage cells disposed along a sidewall of the semiconductor column. Each of the storage cells includes a tunneling insulating layer disposed on the sidewall of the semiconductor column, a polymer layer disposed on the tunneling insulating layer, a plurality of quantum dots disposed on or in the polymer layer and a blocking insulating layer disposed on the polymer layer.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: March 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-goo Lee, Jung-dal Choi, Young-woo Park
  • Patent number: RE45592
    Abstract: The present invention is directed to a photographing lens containing, in order from an object side: a first lens having a positive refractive power and a convex surface facing the object side; a second lens having a negative refractive power; a third lens having a positive refractive power; and a fourth lens having a negative refractive power and at least one aspheric surface, the photographing lens satisfying the following conditional expressions: L T f ? 1.2 0.5 ? f 3 f ? 1.0 where LT denotes the distance on the optical axis between the object side of the first lens and the image side of the fourth lens; f denotes the total focal length of the photographing lens; and f3 denotes the focal length of the third lens.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: June 30, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young-Woo Park