Patents by Inventor Yuan Yang

Yuan Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250245302
    Abstract: A model processing method is provided and applied to the field of artificial intelligence (AI) technologies. In the method, a new obfuscation computing node is added on the basis of original computation logic of an AI model, an execution relationship between an original computing node and the obfuscation node is determined by using an expression, and a correct computing node can be executed only when an output of the expression is correct. In this way, an operator execution sequence and dependency relationship in the original model can be obscured by using the newly added obfuscation node, to scramble a model structure.
    Type: Application
    Filed: March 19, 2025
    Publication date: July 31, 2025
    Inventors: Yuan YANG, Xiulang JIN, Shukun ZHANG, Ze WANG
  • Publication number: 20250217570
    Abstract: A method comprising receiving, at a computing system, a request for design rules of an integrated circuit technology node; and providing, by the computing system, a plurality of design rule entries for display in a tabular format by an interface, the plurality of design rule entries selected based on the request, a design rule entry of the plurality of design rule entries corresponding to a design rule of the plurality of design rules, the design rule entry comprising a first cell designated for a label of the design rule, a second cell designated for a description of the design rule, and a third cell designated for a numerical dimension for the design rule.
    Type: Application
    Filed: December 28, 2023
    Publication date: July 3, 2025
    Applicant: Intel Corporation
    Inventors: Chih-Yuan Yang, Yuejun Fu, Matthew K. Gumbel, Cher-Yin Khor, Ashish V. Sangwai
  • Publication number: 20250209656
    Abstract: Provided is a method, system, and electronic device for calculating a leaf area of a plant, relating to the field of image processing. The method includes: obtaining a leaf image of a target plant on a planned path, where the planned path is a path determined based on a dynamic window approach (DWA) path planning algorithm; segmenting the leaf image by using a UNet model to obtain a leaf segmentation image, where the UNet model includes an encoder, a decoder, and a trained segmentation network that are connected to each other; and calculating a leaf area based on the leaf segmentation image. This application can achieve rapid and accurate segmentation of leaf images and calculation of leaf areas.
    Type: Application
    Filed: October 17, 2024
    Publication date: June 26, 2025
    Inventors: Xing XU, Yun ZHAO, Yuan YANG
  • Publication number: 20250192026
    Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a semiconductor device includes a metal-insulator-metal structure which includes a bottom conductor plate layer including a first opening and a second opening, a first dielectric layer over the bottom conductor plate layer, a middle conductor plate layer over the first dielectric layer and including a third opening, a first dummy plate disposed within the third opening, and a fourth opening, a second dielectric layer over the middle conductor plate layer, and a top conductor plate layer over the second dielectric layer and including a fifth opening, a second dummy plate disposed within the fifth opening, a sixth opening, and a third dummy plate disposed within the sixth opening. The first opening, the first dummy plate, and the second dummy plate are vertically aligned.
    Type: Application
    Filed: February 17, 2025
    Publication date: June 12, 2025
    Inventors: Yuan-Yang Hsiao, Hsiang-Ku Shen, Dian-Hau Chen
  • Publication number: 20250193108
    Abstract: In the initial phase, the master device is configured to disable the connection between the junction device and the last slave device before performing the EtherCAT distributed clock synchronization procedure. After completion, the connection between the junction device and the last slave device is enabled. When a disconnection occurs in a closed loop topology, the junction device can serve to provide a redundant path for forwarding datagrams, thereby achieving cable redundancy. After the disconnection is fixed, the system time delay of each slave device calculated during the initial phase can still be applied without needing to perform again the distributed clock synchronization procedure.
    Type: Application
    Filed: March 14, 2024
    Publication date: June 12, 2025
    Applicant: Delta Electronics, Inc.
    Inventors: Yu Hsin CHANG, Yu Min CHOU, Po Yuan YANG, Yu Liang CHEN
  • Patent number: 12327785
    Abstract: A device structure according to the present disclosure includes a metal-insulator-metal (MIM) stack. The MIM stack includes at least one lower conductor plate layer, a first insulator layer disposed over the at least one lower conductor plate layer, a first conductor plate layer disposed over the first insulator layer, a second insulator layer disposed over the first conductor plate layer, and a second conductor plate layer disposed over the second insulator layer. The device structure further includes a ground via extending through and electrically coupled to a first ground plate in the first conductor plate layer and a first via extending through and electrically coupled to a high voltage plate in the second conductor plate layer. The first ground plate vertically overlaps the high voltage plate and the second insulator layer is different from the first insulator layer.
    Type: Grant
    Filed: March 30, 2022
    Date of Patent: June 10, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Yang Hsiao, Hsiang-Ku Shen, Wen-Chiung Tu, Tsung-Chieh Hsiao, Chen-Chiu Huang, Dian-Hau Chen
  • Publication number: 20250185262
    Abstract: A device structure according to the present disclosure includes a metal-insulator-metal (MIM) stack that includes a plurality of conductor plate layers interleaved by a plurality of insulator layers. The MIM stack includes a first region and a second region and the first region and the second region overlaps in a third region. The MIM stack further includes a first via passing through the first region and electrically coupled to a first subset of the plurality of conductor plate layers, a second via passing through the second region and electrically coupled to a second subset of the plurality of conductor plate layers, and a ground via passing through the third region and electrically coupled to a third subset of the plurality of conductor plate layers.
    Type: Application
    Filed: February 3, 2025
    Publication date: June 5, 2025
    Inventors: Wen-Chiung Tu, Hsiang-Ku Shen, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Chen-Chiu Huang, Dian-Hau Chen
  • Patent number: 12322623
    Abstract: An apparatus having a first portion including a first front wall, a first rear wall, and a bottom wall integrally coupled to the first front wall and the first rear wall, and pivotal pin structures integrally coupled to and extending from the first rear wall. The apparatus includes a second portion having a second front wall, a second rear wall, and a top wall integrally coupled to the second front wall and the second rear wall, and pin holders integrally coupled to and extending from the second rear wall and at an offset angle with reference to the top wall. The pivotal pin structure includes a base support connected to the first rear wall and a shaft connected to the base support, and the pin holder defines an opening sized and shaped to accept the shaft. The first and second portions are sized and shaped to be pivotally movable between open and closed configurations.
    Type: Grant
    Filed: November 20, 2023
    Date of Patent: June 3, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Chung Tsai, Ping-Cheng Ko, Fang-Yu Liu, Jhih-Yuan Yang
  • Publication number: 20250158598
    Abstract: A signal sampling device includes an input circuit and a latch circuit. The input circuit is activated in a first period according to a first clock signal to generate a plurality of first output signals according to a plurality of input signals.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 15, 2025
    Inventors: Ling Ling ZHANG, Zhen Yang PANG, Yuan Yuan YANG
  • Patent number: 12302531
    Abstract: A handheld electronic device is provided. The handheld electronic device includes a screen, a back cover, a frame, a main board, and a heat conduction structure. The frame is arranged between the screen and the back cover. The frame and the back cover define a space. The main board is arranged in the space, and includes a front surface and a back surface. The front surface faces the screen and includes a heat source. The heat conduction structure extends from the front surface to the back surface, and includes a first end and a second end opposite to each other. The first end is arranged at the heat source, and the second end extends to the back cover.
    Type: Grant
    Filed: February 27, 2023
    Date of Patent: May 13, 2025
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chien-Feng Chung, Ching-Yuan Yang, Chih-Yao Kuo, Cheng-Han Chung
  • Patent number: 12300640
    Abstract: In a method of manufacturing a semiconductor device, an opening is formed in a first dielectric layer so that a part of a lower conductive layer is exposed at a bottom of the opening, one or more liner conductive layers are formed over the part of the lower conductive layer, an inner sidewall of the opening and an upper surface of the first dielectric layer, a main conductive layer is formed over the one or more liner conductive layers, a patterned conductive layer is formed by patterning the main conductive layer and the one or more liner conductive layers, and a cover conductive layer is formed over the patterned conductive layer. The main conductive layer which is patterned is wrapped around by the cover conductive layer and one of the one or more liner conductive layers.
    Type: Grant
    Filed: June 23, 2023
    Date of Patent: May 13, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Chieh Hsiao, Hsiang-Ku Shen, Yuan-Yang Hsiao, Ying-Yao Lai, Dian-Hau Chen
  • Publication number: 20250126688
    Abstract: A continuous microwave curing system, includes a heating cavity with a microwave power source and an inlet opening and an outlet opening on opposite sides; a first microwave suppression cavity, connected to the inlet opening of the heating cavity; a second microwave suppression cavity, connected to the outlet opening of the heating cavity; a conveyor belt, used to transport a laminated structure that needs to be heated by microwave power; wherein the laminated structure includes at least one adhesive and two layers of objects, the adhesive is placed between the two layers of objects. A continuous microwave curing process includes placing an adhesive between two layers of objects to form a laminated structure and using a conveyor belt to send the laminated structure into a heating cavity for heating with microwave power for a period of time, so that the temperature of the adhesive reaches above 60 degrees.
    Type: Application
    Filed: April 15, 2024
    Publication date: April 17, 2025
    Inventors: Ru-Yuan YANG, Min-Hang WENG
  • Publication number: 20250125826
    Abstract: The present disclosure discloses a communication apparatus. A first signal path is electrically coupled to the signal co-processing circuit. A switch electrically couples a second signal path to the signal co-processing circuit under a merged communication state. A first signal amplifying circuit is electrically coupled between the signal co-processing circuit and a first antenna. A first signal transceiver circuit performs communication in a first frequency band with the first antenna through the first signal path, the signal co-processing circuit, the first signal amplifying circuit and the first antenna. A second signal transceiver circuit performs communication in a second frequency band with the first antenna through the second signal path, the signal co-processing circuit, the first signal amplifying circuit and the first antenna.
    Type: Application
    Filed: September 26, 2024
    Publication date: April 17, 2025
    Inventor: HUNG-YUAN YANG
  • Patent number: 12272896
    Abstract: An example connector assembly includes a guide shielding cage with a cage body and an upper heat sink bracket. The cage body includes upper window. A lower wall of the upper heat sink bracket is formed with a window corresponding to the upper window. The connector assembly also includes an upper heat sink module including a heat dissipating member. The heat dissipating member is capable of moving between a releasing position which is higher and an acting position which is lower relative to the upper insertion space. The cage body further includes fixing pieces positioned at two sides of the top wall and extend upwardly. The lower wall of the upper heat sink bracket engages with the fixing pieces of the cage body, and the upper heat sink bracket further comprises a latching piece which extends from the lower wall and latches into the top wall of the cage body.
    Type: Grant
    Filed: September 6, 2023
    Date of Patent: April 8, 2025
    Assignee: Molex, LLC
    Inventor: Che-Yuan Yang
  • Patent number: 12266592
    Abstract: A semiconductor structure includes a semiconductor substrate and an interconnect structure on the semiconductor structure. The interconnect structure includes a first layer, a second layer over the first layer, a third layer over the second layer, and a fourth layer over the third layer. A first through via extends through the semiconductor substrate, the first layer, and the second layer. A second through via extends through the third layer and the fourth layer. A bottom surface of the second through via contacts a top surface of the first through via.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yuan-Yang Hsiao, Dian-Hau Chen, Yen-Ming Chen
  • Publication number: 20250095932
    Abstract: An electronic device includes a casing, an exterior button, a sliding assembly and an internal button. The casing includes an outer surface and an opening at the outer surface. The exterior button has a first side and a second side opposite to each other, the first side is pivotally connected to the casing so that the exterior button is rotatably disposed at the casing. The sliding assembly is movably disposed on the casing, and includes a sliding body, a toggle and a pusher, the sliding body is located in the casing, the toggle is fixed to the sliding body and exposed to the casing, and the pusher is linked with the sliding body in a first direction, and is movably disposed at the sliding body in a second direction. The inner button is located in the casing, and the sliding assembly is located between the outer button and the inner button.
    Type: Application
    Filed: August 8, 2024
    Publication date: March 20, 2025
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Wei-Ting Cheng, Ching-Yuan Yang
  • Publication number: 20250085001
    Abstract: Provided is a wall-mounted air conditioner, comprising a housing and a heat exchanger. An air duct is provided in the housing; the air duct comprises an air inlet and an air outlet; the air duct comprises an air inflow section and an air outflow section that are connected to each other; at least a portion of the air inlet is located on the front side of the housing; and the heat exchanger is disposed in the air duct. The air inflow section horizontally or obliquely extends forward from the air outflow section to form a first mounting space behind the air inflow section; and/or the portion of the air outflow section adjacent to the air outlet extends downward and forward from the remaining portion of the air outflow section to form a second mounting space behind the air outflow section.
    Type: Application
    Filed: February 11, 2022
    Publication date: March 13, 2025
    Inventors: Baisong ZHOU, Duode WU, Yuan YANG, Bo LI, Yongqiang WAN, Qiqin SU, Yunchong TU
  • Publication number: 20250081382
    Abstract: A data processing device includes a chassis and at least one electronic component. The chassis includes a casing and a tray disposed in the casing. The tray includes a tray body and an operating member pivotally connected to the tray body. The tray body has an accommodating space. When the operating member is located at a closed position, the operating member and the casing are locked, and the at least one electronic component is able to be accommodated in the accommodating space. When the at least one electronic component is removed from the accommodating space, the operating member is able to rotate from the closed position to an opened position located in the accommodating space to be unlocked from the casing, so as to allow the tray to be removed from the casing.
    Type: Application
    Filed: December 12, 2023
    Publication date: March 6, 2025
    Applicant: Wiwynn Corporation
    Inventors: Feng-Yuan Yang, Yan-Yu Chen
  • Patent number: 12244101
    Abstract: A connector assembly is disclosed to include a shielding cage and a receptacle connector. The shielding cage forms at least one insertion space and a front end port communicatively coupled to the insertion space, the insertion space is defined by a top wall, a bottom wall and two side walls which cooperate with each other. The receptacle connector is provided to a rear segment of the shielding cage and includes a receptacle housing. The shielding cage further includes at least one stopping piece and at least one support stopping block which extend into the insertion space, the support stopping block is interposed between the stopping piece and the receptacle housing and supports the stopping piece. In another manner, the shielding cage may include a withdrawing stop portion and a rear stopping piece, the withdrawing stop portion is used to limit the receptacle housing to displace rearwardly, the rear stopping piece is used to stop the receptacle housing from behind the receptacle housing.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: March 4, 2025
    Assignee: Molex, LLC
    Inventors: Che-Yuan Yang, You-Qian Lu, Chun-Hsiang Chiang
  • Patent number: D1083156
    Type: Grant
    Filed: July 30, 2024
    Date of Patent: July 8, 2025
    Assignee: Shenzhen Ulike Smart Electronics Co., Ltd.
    Inventor: Yuan Yang