Abstract: The present disclosure provides a light emitting element including a substrate, a plurality of light blocking layers, a cover layer, a plurality of protrusions and an anti-reflective layer. The light blocking layers are disposed on a first surface of the substrate and include a plurality of openings. The plurality of protrusions are disposed on the cover layer, and two adjacent protrusions of the plurality of protrusions have an organic light emitting unit in between. The anti-reflective layer is disposed on a second surface of the substrate. The second surface is parallel to and opposite to the first surface.

Abstract: A dispensing system includes a dispense material supply that contains a dispense material and a dispensing pump connected downstream from the dispense material supply. The dispensing pump includes a body made of a first electrically conductive material, one or more first electrical contacts that are disposed on the body of the dispensing pump, and one or more first connection wires that are coupled between each one of the one or more first electrical contacts and ground. The dispensing system also includes a dispensing nozzle connected downstream from the dispensing pump and includes a tube made of a second electrically conductive material, one or more second electrical contacts that are disposed on an outer surface of the tube, and one or more second connection wires that are coupled between each one of the one or more second electrical contacts and the ground.

Abstract: An apparatus, a computer-implemented method, and a system for controlling maintenance of canary files. An apparatus includes a canary file module that determine access frequency of files and migrates one or more of the files responsive to the access frequency. At least a portion of said module includes one or more of hardware circuits, programmable hardware devices and executable code, the executable code stored on one or more computer readable storage media.

Abstract: The present disclosure provides a light emitting element including a substrate, an anti-reflective layer, multiple light blocking layers, a cover layer, a conductive layer and multiple protrusions. The anti-reflective layer is in contact with a first surface of the substrate. The multiple light blocking layers are in contact with a first surface of the anti-reflective layer. The cover layer is in contact with the first surface of the anti-reflective layer, and covers the multiple light blocking layers. The conductive layer is in contact with a second surface of the substrate, wherein the second surface is in parallel and opposite to the first surface. The multiple protrusions are disposed on the second surface of the substrate and cover a portion of the conductive layer.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.

Abstract: A method for detecting a contact force of a probe card is provided. The method includes contacting a pressure film sensor with a plurality of needles over a lower surface of the probe card. The method includes detecting the contact force of the probe card via the pressure film sensor. The method also includes adjusting a position of a push base over an upper surface of the probe card based on the detected contact force of the pressure film sensor.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.

Abstract: A fan management system includes a fan and a server. The fan includes a driving circuit, and the driving circuit is configured for driving the fan. The fan operates in an operation mode. The server is connected to the fan and is configured for controlling the operation of the fan. The driving circuit outputs a digital label signal when the fan operates abnormally, and the server obtains a production history, an operation information and a warning message of the fan through the digital label signal. The server adjusts the operation mode of the fan according to the warning message simultaneously.

Abstract: A method comprises depositing a protection layer over a first substrate, wherein the first substrate is part of a first semiconductor die, forming an under bump metallization structure over the protection layer, forming a connector over the under bump metallization structure, forming a first dummy plane along a first edge of a top surface of the first semiconductor die and forming a second dummy plane along a second edge of the top surface of the first semiconductor die, wherein the first dummy plane and the second dummy plane form an L-shaped region.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.

Abstract: A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.

Abstract: A voice coil motor assembly including a base, a frame, an elastic sheet, a housing, and a plurality of shock-absorbing components is provided. The frame is disposed on the base. The frame includes a bottom surface, a top surface, a plurality of side walls and a support frame. One side of the elastic sheet is disposed on the top surface of the frame and the other is disposed on the support frame. The housing is disposed above the base to receive the frame and the elastic sheet. The housing includes a housing top wall and a plurality of housing side walls surrounding the housing top wall. The shock-absorbing components are disposed on the frame and are sandwiched between the frame and the housing side walls of the housing, and/or between the support frame and the housing top wall of the housing.

Abstract: An augmented reality (AR) system and an operation method thereof are provided. The AR system includes a target device and an AR device. The AR device captures the target device to generate a picture. The target device provides a digital content to the AR device. The AR device tracks the target device in the picture for an AR application. During the AR application, the AR device overlays the digital content on the target device in the picture.

Abstract: A manufacturing method for an antibacterial fiber includes the following steps. A dipping step is performed to soak a conductive fiber in a solution, in which the solution includes an ionic compound, and the ionic compound includes a metal cation. An oxidation step is performed by using the conductive fiber as an anode, such that an antibacterial material produced by the solution is adhered to a surface of the conductive fiber, in which the antibacterial material includes a metal oxide.

Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.

Abstract: A voltage calibration method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: reading first data from a first physical unit using a first read voltage level and reading second data from at least one second physical unit using a second read voltage level; obtaining count information reflecting a total number of memory cells meeting a default condition in the first physical unit and the at least one second physical unit according to the first data and the second data; and calibrating the first read voltage level according to the count information.

Abstract: A voltage prediction method, a memory storage device and a memory control circuit unit are disclosed. The method includes: reading a plurality of memory cells in a rewritable non-volatile memory module by using a first read voltage level to obtain count information, and the first read voltage level is configured to distinguish a first state and a second state adjacent to each other in a threshold voltage distribution of the memory cells, and the count information reflects a total number of first memory cells meeting a target condition among the memory cells; and predicting a second read voltage level according to the count information, and the second read voltage level is configured to distinguish a third state and a fourth state adjacent to each other in the threshold voltage distribution.

Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.

Abstract: A method for forming a semiconductor device includes receiving a substrate having a first opening and a second opening formed thereon, wherein the first opening has a first width, and the second opening has a second width less than the first width; forming a protecting layer to cover the first opening and expose the second opening; performing a wet etching to widen the second opening with an etchant, wherein the second opening has a third width after the performing of the wet etching, and the third width of the second opening is substantially equal to the first width of the first opening; and performing a photolithography to transfer the first opening and the second opening to a target layer.