Patents by Inventor Yu-Cheng Hsu

Yu-Cheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9098397
    Abstract: Mechanisms are provided for extending cache for an external storage system into individual servers. Certain servers may have cards with cache in the form of dynamic random access memory (DRAM) and non-volatile storage, such as flash memory or solid-state drives (SSDs), which may be viewed as actual extensions of the external storage system. In this way, the storage system is distributed across the storage area network (SAN) into various servers. Several new semantics are used in communication between the cards and the storage system to keep the read caches coherent.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: August 4, 2015
    Assignee: International Business Machines Corporation
    Inventors: Lee D. Cleveland, John C. Elliott, Yu-Cheng Hsu, Andrew D. Walls
  • Publication number: 20150193204
    Abstract: A method for generating a random number, a memory storage device and a control circuit are provided. The method includes: writing data into a plurality of memory cells; reading at least one of the memory cells repeatedly according to a first read voltage to obtain a plurality of sensing currents; and generating the random number according to the sensing currents.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 9, 2015
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu, Siu-Tung Lam
  • Patent number: 9047231
    Abstract: A data saving device, system, and method rapidly and deterministically saves data of a computer system. The device may mark data that must be saved when the computer is shut down. In certain embodiments, a boot control module detects a condition requiring a rapid deterministic data saving operation, such as a power failure and reboots the computer, deterministically terminating all existing processes. Additionally, the boot control module loads a data transfer kernel in place of a standard operating kernel used for normal operation. The data transfer kernel supports a set of processes exclusively dedicated to saving data. The data transfer kernel configures the computer and storage devices for the data transfer and saves the marked data with a minimum of interruptions from other processes. Also, the data transfer kernel may shut down the computer and the storage devices after transferring data.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: June 2, 2015
    Assignee: International Business Machines Corporation
    Inventors: Yu-Cheng Hsu, Richard Anthony Ripberger
  • Publication number: 20150149701
    Abstract: A time estimating method, a memory storage device, and a memory controlling circuit unit are provided for a rewritable non-volatile memory module having memory cells. The method includes: writing first data into first memory cells of the memory cells; reading the first memory cells according to a reading voltage, so as to determine whether each of the first memory cells belongs to a first state or a second state; and calculating a quantity of the first memory cells belonging to the first state, and obtaining a time information of the rewritable non-volatile memory module according to the quantity.
    Type: Application
    Filed: January 16, 2014
    Publication date: May 28, 2015
    Applicant: Phison Electronics Corp.
    Inventors: Wei Lin, Yu-Cheng Hsu
  • Publication number: 20150139533
    Abstract: A depth processing method, an electronic device and a medium are provided. The depth processing method includes: obtaining a color image and a depth map corresponding to the color image; extracting a plurality of regions from at least one of the depth map and the color image; obtaining region information of the regions, and classifying the regions into at least one of a region-of-interest and a non-region-of-interest according to the region information, wherein the region information comprises area information and edge information; and adjusting a plurality of depth values in the depth map according to the region information.
    Type: Application
    Filed: June 27, 2014
    Publication date: May 21, 2015
    Inventors: Jing-Lung Wu, Fu-Chang Tseng, Pol-Lin Tai, Hsin-Ti Chueh, Yu-Cheng Hsu, Cheng-Hsien Lin, Yi-Hsuan Feng, Wen-Hung Sun
  • Patent number: 9026730
    Abstract: Embodiments relate to a method for data management. An aspect includes a method for assigning storage types to data based on access frequency. Past or historical data associated with current data usage is also considered prior to assignment. Once data frequency access is determined, the current data is assigned to a first tier of a plurality of hierarchical ordered tiers, each tier corresponding to at least one class of storage. In one embodiment, there may be a condition that overrides the assignment with option to override it. The tier assignment may also be preserved the tier so that the current data can be appropriately assigned in the future.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: May 5, 2015
    Assignee: International Business Machines Corporation
    Inventors: David D. Chambliss, Chiahong Chen, Lawrence Y. Chiu, Yu-Cheng Hsu, James A. Ruddy, Harry M. Yudenfriend
  • Publication number: 20150116529
    Abstract: An electronic apparatus includes an camera set, an input source module, an auto-engine module and a post usage module. The camera set is configured for capturing image data relative to a scene. The input source module is configured for gathering information related to the image data. The auto-engine module is configured for determining at least one suitable photography effect from a plurality of candidate photography effects according to the information related to the image data. The post usage module is configured for processing the image data and applying the suitable photography effect to the image data after the image data are captured.
    Type: Application
    Filed: May 8, 2014
    Publication date: April 30, 2015
    Applicant: HTC Corporation
    Inventors: Jing-Lung WU, Hsin-Ti CHUEH, Fu-Chang TSENG, Pol-Lin TAI, Yu-Cheng HSU
  • Patent number: 9019770
    Abstract: A data reading method for a rewritable non-volatile memory module is provided. The method includes applying a test voltage to a word line of the rewritable non-volatile memory module to read a plurality of verification bit data. The method also includes calculating a variation of bit data identified as a first status among the verification bit data, obtaining a new read voltage value set based on the variation, and updating a threshold voltage set for the word line with the new read voltage value set. The method further includes using the updated threshold voltage set to read data from a physical page formed by memory cells connected to the word line. Accordingly, storage states of memory cells in the rewritable non-volatile memory module can be identified correctly, thereby preventing data stored in the memory cells from losing.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 28, 2015
    Assignee: Phison Electronics Corp.
    Inventors: Wei Lin, Tien-Ching Wang, Kuo-Hsin Lai, Yu-Cheng Hsu, Kuo-Yi Cheng
  • Patent number: 9021191
    Abstract: Provided are a computer program product, system and method for managing Input/Output (I/O) requests to a storage device. A write request is received having write data for a logical address, wherein data for the logical address is at a first physical location in the storage device and has an indicated version number. Writing the write data to a second physical location in the storage device. Determining whether a preserve mode is enabled. In response to determining that the preserve mode is enabled, indicating the second physical location as having a current version number of the logical address and indicating the first physical location to have a previous version number of the logical address.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: Lawrence Y. Chiu, Yu-Cheng Hsu
  • Patent number: 9015413
    Abstract: Embodiments relate to a system and computer program product for data management. An aspect includes a method for assigning storage types to data based on access frequency. Past or historical data associated with current data usage is also considered prior to assignment. Once data frequency access is determined, the current data is assigned to a first tier of a plurality of hierarchical ordered tiers, each tier corresponding to at least one class of storage. In one embodiment, there may be a condition that overrides the assignment with option to override it. The tier assignment may also be preserved so that the current data can be appropriately assigned in the future.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: April 21, 2015
    Assignee: International Business Machines Corporation
    Inventors: David D. Chambliss, Chiahong Chen, Lawrence Y. Chiu, Yu-Cheng Hsu, James A. Ruddy, Harry M. Yudenfriend
  • Patent number: 9004894
    Abstract: A mold assembly for insert-molding a heterogeneous object includes an upper mold and a lower mold. The upper mold includes a cavity for accommodating an insert object. The lower mold includes a rigid body and a resilient contact member for resting the insert object. The resilient contact member absorbs dimensional variations of the insert object during the insert molding process.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: April 14, 2015
    Assignee: Pioneer Material Precision Tech Co., Ltd.
    Inventors: Yuan-Shun Tsai, Yu-Cheng Hsu
  • Patent number: 9007829
    Abstract: A memory repairing method for a rewritable non-volatile memory module and a memory controller and a memory storage apparatus are provided. The method includes monitoring a wear degree of the rewritable non-volatile memory module; determining whether the wear degree of the rewritable non-volatile memory module is larger than a threshold; and heating the rewritable non-volatile memory module such that the temperature of the rewritable non-volatile memory module lies in between 100° C.˜600° C. if the wear degree of the rewritable non-volatile memory module is larger than the threshold. Accordingly, deteriorated memory cells in the rewritable non-volatile memory module can be repaired, thereby preventing data loss.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: April 14, 2015
    Assignee: Phison Electronics Corp.
    Inventors: Wei Lin, Yu-Cheng Hsu, Kuo-Yi Cheng, Chun-Yen Chang
  • Publication number: 20150078614
    Abstract: Methods and systems for scene recognition are provided. At least one dark region from an image is searched, and color information for pixels of the at least one dark region is calculated. It is determined whether a proportion of low colorfulness pixels to the pixels of the at lest one dark region is greater than a predefined threshold, wherein when the color information of the respective pixel is less than a specific level, the respective pixel is determined as low colorfulness. when the proportion of low colorfulness pixels to the pixels of the at lest one dark region is greater than the predefined threshold, a scene corresponding to the image is not determined as a backlight scene.
    Type: Application
    Filed: September 18, 2013
    Publication date: March 19, 2015
    Applicant: HTC CORPORATION
    Inventors: Yu-Cheng HSU, Chia-Yen Michael LIN, Jing-Lung WU
  • Publication number: 20150006983
    Abstract: A read voltage setting method for a rewritable non-volatile memory module is provided. The method includes: reading test data stored in memory cells of a word line to obtain a corresponding critical voltage distribution and identifying a default read voltage corresponding to the word line based on the corresponding critical voltage distribution; applying a plurality of test read voltages obtained according to the default read voltage to the word line to read a plurality of test page data; and determining an optimized read voltage corresponding to the word line according to the minimum error bit number among a plurality of error bit numbers of the test page data. The method further includes calculating a difference value between the default read voltage and the optimized read voltage as a read voltage adjustment value corresponding to the word line and recording the read voltage adjustment value in a retry table.
    Type: Application
    Filed: September 5, 2013
    Publication date: January 1, 2015
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Yu-Cheng Hsu, Siu-Tung Lam, Tzung-Lin Wu, Kuo-Yi Cheng
  • Patent number: 8918607
    Abstract: Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: December 23, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Lokesh Mohan Gupta, Yu-Cheng Hsu, Alfred Emilio Sanchez
  • Patent number: 8914597
    Abstract: Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: December 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michael T. Benhase, Lokesh M. Gupta, Yu-Cheng Hsu, Alfred E. Sanchez
  • Publication number: 20140293696
    Abstract: A data reading method for a rewritable non-volatile memory module is provided. The method includes applying a test voltage to a word line of the rewritable non-volatile memory module to read a plurality of verification bit data. The method also includes calculating a variation of bit data identified as a first status among the verification bit data, obtaining a new read voltage value set based on the variation, and updating a threshold voltage set for the word line with the new read voltage value set. The method further includes using the updated threshold voltage set to read data from a physical page formed by memory cells connected to the word line. Accordingly, storage states of memory cells in the rewritable non-volatile memory module can be identified correctly, thereby preventing data stored in the memory cells from losing.
    Type: Application
    Filed: May 24, 2013
    Publication date: October 2, 2014
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Wei Lin, Tien-Ching Wang, Kuo-Hsin Lai, Yu-Cheng Hsu, Kuo-Yi Cheng
  • Publication number: 20140286105
    Abstract: A NAND flash memory unit, an operating method and a reading method are provided. The NAND flash memory unit includes a plurality of gate layers, a tunnel layer, a charge trapping layer, a conductor layer and a second dielectric layer. A first dielectric layer is included between two adjacent gate layers among the gate layers. The tunnel layer, the charge trapping layer, the conductor layer, and the second dielectric layer penetrate the gate layers. The charge trapping layer is disposed between the tunnel layer and the gate layers, and the second dielectric layer is disposed between the conductor layer and the tunnel layer. Therefore, an erasing speed may be increased; the charge trapping layer may be repaired; the controllability of the gate layers may be increased.
    Type: Application
    Filed: June 13, 2013
    Publication date: September 25, 2014
    Inventors: Wei Lin, Yu-Cheng Hsu, Kuo-Yi Cheng
  • Publication number: 20140215163
    Abstract: Provided are a method, system, and computer program product for processing read and write requests in a storage controller. A host adaptor in the storage controller receives a write request from a host system for a storage address in a storage device. The host adaptor sends write information indicating the storage address updated by the write request to a device adaptor in the storage controller. The host adaptor writes the write data to a cache in the storage controller. The device adaptor indicates the storage address indicated in the write information to a modified storage address list stored in the device adaptor, wherein the modified storage address list indicates modified data in the cache for storage addresses in the storage device.
    Type: Application
    Filed: April 2, 2014
    Publication date: July 31, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lawrence Y. Chiu, Yu-Cheng Hsu, Sangeetha Seshadri
  • Patent number: 8782464
    Abstract: A standby server, a first main server, and a second main server to control shared input/output (I/O) adapters in a storage system are provided. The standby server is in communication with the first main server and the second main server, and the storage system is configured to operate as a dual node active system. The standby server is activated in response to receiving a communication from the first main server of a fail mode of the second main server. Systems and physical computer storage media are also provided.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: July 15, 2014
    Assignee: International Business Machines Corporation
    Inventors: Stephen L. Blinick, Scott A. Brewer, Yu-Cheng Hsu