Patents by Inventor Yu Chu

Yu Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136438
    Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Inventors: Yu-Yun Peng, Fu-Ting Yen, Ting-Ting Chen, Keng-Chu Lin, Tsu-Hsiu Perng
  • Patent number: 11966614
    Abstract: A system, method, and machine-readable storage medium for restoring a data object for a specified active time period are provided. In some embodiments, the method includes receiving, by a storage device from a client, a request specifying an active time period for a data object to remain stored on an accessible tier. The method also includes determining, by the storage device, that the active time period has elapsed. The method further includes responsive to a determination that the active time period has elapsed, sending, by the storage device, a request to a server storing the data object to move the data object from the accessible tier to an archive tier. Data objects that are stored on the accessible tier are accessible by the client, and data objects that are stored on the archive tier are inaccessible by the client.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: April 23, 2024
    Assignee: NetApp, Inc.
    Inventors: Alvis Yung, Song Guen Yoon, Raymond Yu Shun Mak, Chia-Chen Chu, Dheeraj Sangamkar, Robin Mahony
  • Patent number: 11965237
    Abstract: A system and a method for detecting abnormality of a thin-film deposition process are provided. In the method, a thin-film is deposited on a substrate in a thin-film deposition chamber by using a target, a dimension of a collimator mounted between the target and the substrate is scanned by using at least one sensor disposed in the thin-film deposition chamber to derive an erosion profile of the target, and abnormality of the thin-film deposition process is detected by analyzing the erosion profile with an analysis model trained with data of a plurality of erosion profiles derived under a plurality of deposition conditions.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hao Cheng, Hsuan-Chih Chu, Yen-Yu Chen
  • Publication number: 20240125771
    Abstract: The present invention relates to a reaction platform, which comprises: a machine body with a bottom plate for placing non-porous substrates; and a coater module configured on the top of the machine body and capable of maintaining a preset of a predetermined height for moving along the surface of non-porous substrate, wherein the coater module has one or more slits, and a target liquid can be directly injected or sucking in from the outside of the coater module through the slit, and spreading the target liquid onto a surface of the non-porous substrate while moving along the non-porous substrate; wherein the surface of the non-porous substrate has a target to be coated. The reaction platform of the present invention can not only save time, labor and cost, but also have accurate and reproducible experimental results, showing better results than traditional methods.
    Type: Application
    Filed: July 25, 2023
    Publication date: April 18, 2024
    Inventors: An-Bang Wang, Shih-Yu Chen, Tung-Hung Su, Chia-Chi Chu, Chia-Chien Yen, Yu-Wei Chiang
  • Publication number: 20240127989
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
  • Publication number: 20240127988
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.
    Type: Application
    Filed: March 2, 2023
    Publication date: April 18, 2024
    Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240117297
    Abstract: A p-aminobenzoic acid-producing microorganism is provided. The p-aminobenzoic acid-producing microorganism is obtained by a method for preparing a p-aminobenzoic acid-producing microorganism. The method for preparing a p-aminobenzoic acid-producing microorganism includes (a) performing an acclimation process on a source microorganism with at least one sulfonamide antibiotic to obtain at least one acclimatized microorganism and (b) screening out at least one p-aminobenzoic acid-producing microorganism from the at least one acclimatized microorganism, wherein the at least one p-aminobenzoic acid-producing microorganism has a higher p-aminobenzoic acid titer than the source microorganism.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 11, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Pei-Ching CHANG, Jhong-De LIN, Ya-Lin LIN, Hung-Yu LIAO, Hsiang Yuan CHU, Jie-Len HUANG
  • Publication number: 20240121920
    Abstract: A terminal device and a terminal device installation method are provided. The terminal device includes a machine body, a detachable cover with two side walls, and at least two coupling mechanisms arranged symmetrically. The machine body includes a front board, a rear board opposite to the front board, and two side boards connected between the front board and the rear board. Each coupling mechanism includes a coupling portion located at one side wall, a front track and a rear track respectively having a front opening and a rear opening opposite to the front opening and both located at one side board. As each coupling portion is coupled to each front track, the cover is assembled with the machine body and covers the front board, and as each coupling portion is coupled with each rear track, the cover is assembled to the machine body and covers the rear board.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 11, 2024
    Inventors: Yuan-Yu CHEN, Ming-Hung HUNG, Po-Chang CHU
  • Publication number: 20240114698
    Abstract: A semiconductor device includes a substrate, a bottom electrode, a ferroelectric layer, a noble metal electrode, and a non-noble metal electrode. The bottom electrode is over the substrate. The ferroelectric layer is over the bottom electrode. The noble metal electrode is over the ferroelectric layer. The non-noble metal electrode is over the noble metal electrode.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Yu CHEN, Sheng-Hung SHIH, Fu-Chen CHANG, Kuo-Chi TU, Wen-Ting CHU, Alexander KALNITSKY
  • Patent number: 11946771
    Abstract: An aerial vehicle including a body, a first ranging device, a second ranging device and a controller is provided. The first ranging device is disposed on the body and is configured to detect a first distance between the first ranging device and the reflector. The second ranging device is disposed on the body and is configured to detect a second distance between the second ranging device and the reflector. The controller is configured to obtain an included angle between a direction of the body and the reflector according to the first distance and the second distance.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: April 2, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Chu Tai, Chung-Hsien Wu, Yu-Kai Wang
  • Patent number: 11942447
    Abstract: The present disclosure describes a semiconductor structure having bonded wafers with storage layers and a method to bond wafers with storage layers. The semiconductor structure includes a first wafer including a first storage layer with carbon, a second wafer including a second storage layer with carbon, and a bonding layer interposed between the first and second wafers and in contact with the first and second storage layers.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: De-Yang Chiou, Fu-Ting Yen, Yu-Yun Peng, Keng-Chu Lin
  • Patent number: 11942358
    Abstract: The present disclosure describes a method of forming low thermal budget dielectrics in semiconductor devices. The method includes forming, on a substrate, first and second fin structures with an opening in between, filling the opening with a flowable isolation material, treating the flowable isolation material with a plasma, and removing a portion of the plasma-treated flowable isolation material between the first and second fin structures.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mrunal Abhijith Khaderbad, Ko-Feng Chen, Zheng-Yong Liang, Chen-Han Wang, De-Yang Chiou, Yu-Yun Peng, Keng-Chu Lin
  • Patent number: 11935349
    Abstract: Techniques for managing access to a physical area are provided. In one technique, first data is extracted from a digital file. Based on identification data within the first data, a database is searched. A data item in the database is identified that matches the identification data. The first data is associated with the data item. After associating the first data with the data item, code data is generated. Encoded data that encodes the code data is then generated. The encoded data is sent over a computer network to a mobile device, or an account, of a user that is associated with the data item.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: March 19, 2024
    Assignee: Ricoh Company, Ltd.
    Inventors: Candice Lin, Te-Yu Chu, Phuc Nguyen, Yuwen Wu, Kaoru Watanabe, Shun Tanaka, Jayasimha Nuggehalli
  • Patent number: 11935752
    Abstract: A device includes a first dielectric layer, a first conductor, an etch stop layer, a second dielectric layer, and a second conductor. The first conductor is in the first dielectric layer. The etch stop layer is over the first dielectric layer. The etch stop layer has a first surface facing the first dielectric layer and a second surface facing away from the first dielectric layer, and a concentration of carbon in the etch stop layer periodically varies from the first surface to the second surface. The second dielectric layer is over the etch stop layer. The second conductor is in the second dielectric layer and the etch stop layer and electrically connected to the first conductor.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Yun Peng, Chung-Chi Ko, Keng-Chu Lin
  • Publication number: 20240088056
    Abstract: A method includes encapsulating a device die in an encapsulating material, forming a first dielectric layer over the device die and the encapsulating material, forming first redistribution lines extending into the first dielectric layer to electrically couple to the device die, forming an alignment mark over the first dielectric layer, wherein the alignment mark includes a plurality of elongated strips, forming a second dielectric layer over the first redistribution lines and the alignment mark, and forming second redistribution lines extending into the second dielectric layer to electrically couple to the first redistribution lines. The second redistribution lines are formed using the alignment mark for alignment.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Jhih-Yu Wang, Yung-Chi Chu, Sih-Hao Liao, Yu-Hsiang Hu, Hung-Jui Kuo
  • Publication number: 20240077657
    Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Wen-Yu TSAI, Heng-Yi SU, Ming-Ta CHOU, Chien-Pang CHANG, Kuo-Chiang CHU
  • Publication number: 20240076297
    Abstract: The present invention provides compounds of the structural Formula (I), and pharmaceutically acceptable salts thereof, wherein, are as defined herein, pharmaceutical compositions comprising one or more such compounds (alone and in combination with one or more other therapeutically active agents), and methods for their preparation and use, alone and in combination with other therapeutic agents, as antagonists of A2a and/or A2b receptors, and in the treatment of a variety of diseases, conditions, or disorders that are mediated, at least in part, by the adenosine A2a receptor and/or the adenosine A2b receptor.
    Type: Application
    Filed: July 22, 2021
    Publication date: March 7, 2024
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Amjad Ali, Jared N. Cumming, Manuel De Lera Ruiz, Duane DeMong, Thomas H. Graham, Elisabeth T. Hennessy, Joseph M. Kelly, Rongze Kuang, Michael Man-Chu Lo, Umar Faruk Mansoor, Jesus Moreno, Uma Swaminathan, Heping Wu, Yingchun Ye, Younong Yu
  • Publication number: 20240077656
    Abstract: An imaging lens assembly includes a first optical element and a low-reflection layer. The first optical element has a central opening, and includes a first surface, a second surface and a first outer diameter surface. The first outer diameter surface is connected to the first surface and the second surface. The low-reflection layer is located on at least one of the first surface and the second surface, and includes a carbon black layer, a nano-microstructure and a coating layer. The nano-microstructure is directly contacted with and connected to the carbon black layer, and the nano-microstructure is farther from the first optical element than the carbon black layer from the first optical element. The coating layer is directly contacted with and connected to the nano-microstructure, and the coating layer is farther from the first optical element than the nano-microstructure from the first optical element.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Inventors: Wen-Yu TSAI, Heng-Yi SU, Ming-Ta CHOU, Chien-Pang CHANG, Kuo-Chiang CHU
  • Patent number: 11923429
    Abstract: A semiconductor device and method for forming the semiconductor device are provided. In some embodiments, a semiconductor substrate comprises a device region. An isolation structure extends laterally in a closed path to demarcate the device region. A first source/drain region and a second source/drain region are in the device region and laterally spaced. A sidewall of the first source/drain region directly contacts the isolation structure at a first isolation structure sidewall, and remaining sidewalls of the first source/drain region are spaced from the isolation structure. A selectively-conductive channel is in the device region, and extends laterally from the first source/drain region to the second source/drain region. A plate comprises a central portion and a first peripheral portion. The central portion overlies the selectively-conductive channel, and the first peripheral portion protrudes from the central portion towards the first isolation structure sidewall.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chang Cheng, Fu-Yu Chu, Ming-Ta Lei, Ruey-Hsin Liu, Shih-Fen Huang
  • Publication number: 20240071455
    Abstract: The present disclosure relates to an integrated chip structure. The integrated chip structure includes a first source/drain region and a second source/drain region disposed within a substrate. A select gate is over the substrate between the first source/drain region and the second source/drain region. A ferroelectric random access memory (FeRAM) device is over the substrate between the select gate and the first source/drain region. A transistor device is disposed on an upper surface of the substrate. The substrate has a recessed surface that is below the upper surface of the substrate and that is laterally separated from the upper surface of the substrate by a boundary isolation structure extending into a trench within the upper surface of the substrate. The FeRAM device is arranged over the recessed surface.
    Type: Application
    Filed: November 10, 2023
    Publication date: February 29, 2024
    Inventors: Tzu-Yu Chen, Kuo-Chi Tu, Wen-Ting Chu, Yong-Shiuan Tsair