Patents by Inventor Yu Hung

Yu Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162071
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yi-Fam SHIU, Yu-Chen CHEN, Yang-Ann CHU, Jiun-Rong PAI
  • Publication number: 20240163978
    Abstract: An electric heating material processing device includes a material transporting module, a material feeding controller, a material discharging controller, a gas vent, and an electric heating thermal desorption device. The material transporting module has a material inlet and a material outlet. The material feeding controller is connected to the material inlet, and is configured to control a feeding quantity and a feeding speed of the materials. The material discharging controller is connected to the material outlet, and is configured to control a discharging quantity and a discharging speed of the materials. The gas vent is disposed on an end of the material transporting module. The electric heating thermal desorption device is disposed on an outer surface of the material transporting module, and is configured to perform a thermal desorption process on the materials. The electric heating thermal desorption device includes an electric heating acceptor and plural electric heaters.
    Type: Application
    Filed: February 24, 2023
    Publication date: May 16, 2024
    Inventors: Huang-Long LIN, Yuan-Hung LIU, Yu-Chi CHANG
  • Publication number: 20240162809
    Abstract: A power supply circuit is provided. The power factor correction (PFC) circuit is used to perform a power factor correction according to a first voltage to generate an intermediate voltage. The first storage capacitor is used to store a first electrical energy related to the intermediate voltage. The boost conversion circuit is connected to the PFC circuit and used to generate an output voltage according to the intermediate voltage. The boost conversion circuit includes a first post-stage inductor, a first post-stage diode and a first post-stage transistor. The second storage capacitor is used to store a second electrical energy related to the output voltage. The capacitance value of the second storage capacitor is less than the capacitance value of the first storage capacitor; the first electrical energy is completely or partially transferred as the second electrical energy.
    Type: Application
    Filed: March 6, 2023
    Publication date: May 16, 2024
    Inventors: Yu-Cheng LIN, Te-Hung YU, Chia-Hui LIANG, Min-Hao HSU
  • Publication number: 20240162372
    Abstract: A light-emitting device includes a semiconductor epitaxial structure that has a first surface and a second surface opposite to the first surface, and that includes a first semiconductor layer, an active layer, and a second semiconductor layer sequentially disposed in such order in a direction from the first surface to the second surface. The active layer includes well layers and barrier layers that are alternately stacked. The active layer has an upper surface that is adjacent to the second semiconductor layer, and a lower surface that is opposite to the upper surface. The first semiconductor layer is doped with an n-type dopant, which has a first concentration of 5E17/cm3 at a first point in the first semiconductor layer. The first point of the first semiconductor layer and the lower surface of the active layer have a first distance therebetween. The first distance ranges from 150 nm to 500 nm.
    Type: Application
    Filed: November 9, 2023
    Publication date: May 16, 2024
    Inventors: Weihuan LI, Jinghua CHEN, Huan-Shao KUO, Yu-Ren PENG, Dongpo CHEN, Chia-Hung CHANG
  • Publication number: 20240162169
    Abstract: An electronic package is provided and includes a plurality of electronic elements, a spacing structure connecting each of the plurality of electronic elements, and a plurality of conductive elements electrically connected to the plurality of electronic elements and serving as external contacts. The spacing structure has a recess to enhance the flexibility of the electronic elements after the electronic elements are connected to one another, thereby preventing the problem of warpage. A method for fabricating the electronic package is also provided.
    Type: Application
    Filed: December 12, 2023
    Publication date: May 16, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Yu-Lung Huang, Chee-Key Chung, Yuan-Hung Hsu, Chi-Jen Chen
  • Publication number: 20240161822
    Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.
    Type: Application
    Filed: January 19, 2024
    Publication date: May 16, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-jer Hsieh, Yu-Hao Hsu, Zhi-Hao Chang, Cheng Hung Lee
  • Patent number: 11984323
    Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Te-Chien Hou, Yu-Ting Yen, Cheng-Yu Kuo, Chih Hung Chen, William Weilun Hong, Kei-Wei Chen
  • Patent number: 11982866
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: May 14, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
  • Patent number: 11984419
    Abstract: Package structures and methods for manufacturing the same are provided. The package structure includes a first bump structure formed over a first substrate. The first bump structure includes a first pillar layer formed over the first substrate and a first barrier layer formed over the first pillar layer. In addition, the first barrier layer has a first protruding portion laterally extending outside a first edge of the first pillar layer. The package structure further includes a second bump structure bonded to the first bump structure through a solder joint. In addition, the second bump structure includes a second pillar layer formed over a second substrate and a second barrier layer formed over the second pillar layer. The first protruding portion of the first barrier layer is spaced apart from the solder joint.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Cheng-Hung Chen, Yu-Nu Hsu, Chun-Chen Liu, Heng-Chi Huang, Chien-Chen Li, Shih-Yen Chen, Cheng-Nan Hsieh, Kuo-Chio Liu, Chen-Shien Chen, Chin-Yu Ku, Te-Hsun Pang, Yuan-Feng Wu, Sen-Chi Chiang
  • Patent number: 11984516
    Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: May 14, 2024
    Assignee: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventors: Fu-Chou Liu, Jui-Hung Hsu, Yu-Chiang Peng, Chien-Chen Lee, Ya-Han Chang, Li-Chun Hung
  • Publication number: 20240151346
    Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment is configured to be disposed on the lid or the body portion and includes a magnetic attraction member and a connecting structure. The magnetic attraction member is adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. The connecting structure includes a fastening member, and the fastening member is adapted to be detachably fastened to the body portion or the lid.
    Type: Application
    Filed: June 9, 2023
    Publication date: May 9, 2024
    Inventors: JUI-CHEN LU, CHING-YU WANG, YU-TING HUNG, YU-CHANG CHIANG, CHENG-CHE HO
  • Publication number: 20240154008
    Abstract: Provided is a semiconductor device including a substrate, a channel layer, a gate structure, a first doped region, a second doped region, a third doped region and a channel cap layer. The channel layer is located on the substrate. The channel layer has a trench. The gate structure is disposed in the trench. The first doped region and the second doped region are located in the channel layer on two sides of the gate structure. The third doped region is located in the substrate below the channel layer. The channel cap layer is located between the gate structure and the first doped region, between the gate structure and the second doped region, and between the gate structure and the channel layer. An energy band gap of the channel cap layer is larger than an energy band gap of the channel layer.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 9, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Hung Yen, Yu-Ting Chen, Hua-Mao Chen
  • Publication number: 20240154469
    Abstract: A container for containing food or liquid is provided. The container includes a body portion, a lid and an attachment. The lid is detachably disposed on the body portion. The attachment includes a magnetic attraction member and a connecting structure. The magnetic attraction member is independent from the lid and adapted to be magnetically connected to a mobile electronic device. The connecting structure is disposed between the magnetic attraction member and the container for selectively fixing the magnetic attraction member at a first position or a second position. At least a portion of the connecting structure is fixed to the container.
    Type: Application
    Filed: May 17, 2023
    Publication date: May 9, 2024
    Inventors: JUI-CHEN LU, CHING-YU WANG, YU-TING HUNG, YU-CHANG CHIANG, CHENG-CHE HO
  • Publication number: 20240153458
    Abstract: The present invention is related to a display device, including: a display panel having a plurality of sub-pixel areas, each including a pixel circuit, each pixel circuit including: a diode, configured to be in a forward-biasing state during a display phase of the pixel circuit for light-emitting and configured to be in a reverse-biasing state in a sensing phase of the pixel circuit to generate a sensing voltage; a driving transistor for driving the diode during the display phase; a readout transistor, with a gate receiving the sensing voltage during the sensing phase to serve as a source follower; first to seventh transistors, gate control signals applied to the gates of the first to seventh transistors respectively so that the pixel circuit switching between the display phase and the sensing phase; and a capacitor for storing a data voltage to be written to the diode in the display phase.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 9, 2024
    Inventors: Ping-Hung Yin, Jia-Shyang Wang, Yu Hsiang Wang
  • Publication number: 20240152187
    Abstract: A foldable electronic device including a first body, a second body, a hinge module, and a cover is provided. The hinge module is connected to the first body and the second body, such that the first body and the second body are rotated relatively to be folded or unfolded via the hinge module. The hinge module has a protruding rod eccentric to a rotation center of the hinge module. The cover is pivoted to the second body and located on a moving path of the protruding rod. The hinge module drives the cover to be rotated relative to the second body via the protruding rod.
    Type: Application
    Filed: October 24, 2023
    Publication date: May 9, 2024
    Applicant: Acer Incorporated
    Inventors: Chun-Hung Wen, Chun-Hsien Chen, Hui-Ping Sun, Wen-Neng Liao, Yu-Ming Lin, Kuan-Lin Chen
  • Publication number: 20240153901
    Abstract: A first and second semiconductor device are bonded together using a bonding contact pad embedded within a bonding dielectric layer of the first semiconductor device and at least one bonding via embedded within a bonding dielectric layer of the second semiconductor device. The bonding contact pad extends a first dimension in a first direction perpendicular to the major surface of the first semiconductor device and a second dimension in a second direction parallel to the plane of the first semiconductor wafer, the second dimension being at least twice the first dimension. The bonding via extends a third dimension in the first direction and a fourth dimension in the second direction, the third dimension being at least twice the first dimension. The bonding contact pad and bonding via may be at least partially embedded in respective bonding dielectric layers in respective topmost dielectric layers of respective stacked interconnect layers.
    Type: Application
    Filed: January 9, 2023
    Publication date: May 9, 2024
    Inventors: Yu-Hung Lin, Han-Jong Chia, Wei-Ming Wang, Kuo-Chung Yee, Chen Chen, Shih-Peng Tai
  • Publication number: 20240154314
    Abstract: An antenna device includes a substrate, two T-shaped radiation portions, two feeding portions and an isolation structure. The substrate has an upper surface, a side surface and a lower surface. Two opposite ends of the side surface are connected to the upper surface and the lower surface, respectively. The two T-shaped radiation portions are located on the upper surface of the substrate. The two feeding portions are connected to the two T-shaped radiation portions, respectively, and the two feeding portions are located on the side surface of the substrate. The isolation structure is located on the upper surface of the substrate, and the isolation structure is disposed between the two T-shaped radiation portions.
    Type: Application
    Filed: March 1, 2023
    Publication date: May 9, 2024
    Inventors: Hsin-Hung Lin, Yu Shu Tai, WEI-CHEN CHENG
  • Publication number: 20240147376
    Abstract: Apparatus and methods are provided for thermal throttling for UE configured with multi-panel transceiving on FR2. In one novel aspect, the UE prioritizes throttling actions based on signal qualities of each transceiving panel. In one embodiment, the switching to the target panel from the active panel is selected as the highest priority throttling action when the signal quality of the target panel is similar to the active panel. In another embodiment, the UE further determines if the quality of the target panel is sufficient to support mmW transceiving before switching to the target panel. In one embodiment, the UE reduces one or more antennae of an active panel when the signal quality difference between the active panel and the target panel is bigger than a predefined gap threshold.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Chieh Lai, Feng-Wen Weng, Yu-Hung Huang, Chi-Hsiang Lin
  • Publication number: 20240142664
    Abstract: Two types of blue light blocking contact lenses are provided and are formed by curing different compositions. The first composition includes a blue light blocking component formed by mixing or reacting a first hydrophilic monomer and a yellow dye, a first colored dye component formed by mixing or reacting a second hydrophilic monomer and a first colored dye, at least one third hydrophilic monomer, a crosslinker, and an initiator. The first colored dye includes a green dye, a cyan dye, a blue dye, an orange dye, a red dye, a black dye, or combinations thereof. The second composition includes a blue light blocking component, at least one hydrophilic monomer, a crosslinker, and an initiator. The blue light blocking component is formed by mixing or reacting glycerol monomethacrylate and a yellow dye. Further, methods for preparing the above contact lenses are provided.
    Type: Application
    Filed: February 12, 2023
    Publication date: May 2, 2024
    Inventors: Han-Yi CHANG, Chun-Han CHEN, Tsung-Kao HSU, Wei-che WANG, Yu-Hung LIN, Wan-Ying GAO, Li-Hao LIU
  • Publication number: 20240146316
    Abstract: A system performs a method of adaptive voltage scaling. The method includes generating a voltage adjustment signal based on a hint from a frequency-locked loop (FLL). The FLL includes an oscillator that generates a clock signal at a clock frequency. The voltage adjustment signal is sent to a power management unit (PMU) to cause the PMU to supply an adjusted operating voltage to the FLL. The method further includes updating a minimum code set according to the adjusted operating voltage and an operating temperature. The clock frequency of the oscillator is generated to match a target frequency according to the adjusted operating voltage and a code determined by the FLL from the minimum code set.
    Type: Application
    Filed: October 19, 2023
    Publication date: May 2, 2024
    Inventors: Yu-Shu Chen, Hsin-Chen Chen, Kuan Hung Lin, Jeng-Yi Lin