Abstract: A bracket and a terminal equipment are provided. The bracket is provided for a terminal device to be installed thereon and includes a bracket body, two installing elements, and at least one holding element. The two installing elements respectively protrude outward from two sides of the bracket body, and each of the two installing elements includes an engaging portion. The two installing elements are configured to be inserted into the terminal device so the terminal device is installed on the bracket, and each of the engaging portions is configured such that each of the installing elements is engaged with and retained in the terminal device. The holding element protrudes outward from the bracket body and is configured to be inserted into a loading hole of the terminal device.

Abstract: A keyswitch structure includes a baseplate, a keycap disposed over the baseplate and configured to be movable relative to the baseplate, a membrane switch disposed between the keycap and the baseplate and configured to have one or more buffer portions with two open edges opposite to each other, and a first linking bar connected to the keycap and disposed between the keycap and the membrane switch. The first linking bar has a first long side and a first short side connected to each other. When the keycap moves relative to the baseplate, the one or more buffer portions provide buffer to the first short side and/or an end section of the first long side.

Abstract: A lateral diffusion metal-oxide semiconductor (LDMOS) device includes a first gate structure and a second gate structure extending along a first direction on a substrate, a first source region extending along the first direction on one side of the first gate structure, a second source region extending along the first direction on one side of the second gate structure, a drain region extending along the first direction between the first gate structure and the second gate structure, a guard ring surrounding the first gate structure and the second gate structure, and a shallow trench isolation (STI) surrounding the guard ring.

Abstract: A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.

Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.

Abstract: In various examples, systems and methods for reducing written requirements in a system on chip (SoC) are described herein. For instance, a total number of iterations may be determined for processing data, such as data representing an array. In some circumstances, a set of iterations may include a first number of iterations that is less than a second number of iterations. As such, and during execution of the set of iterations, a predicate flag corresponding to an excess iteration of the set of iterations may be generated, where the excess iteration corresponds to an iteration that is part of a number of excess iterations that is associated with a difference between the first number of iterations and the second number of iterations. Based on the predicate flag, one or more first values corresponding to the iteration may be prevented from being written to memory.

Abstract: A secondary-side protection and sense circuit for a power converter has a sensing component, an adder amplifying circuit, an electronic switch, and a charge/discharge circuit. The sensing component is connected to an output connecting terminal of the power converter. The adder amplifying circuit has an operational amplifier, a first resistor, and a second resistor. The operational amplifier has an input terminal connected to the sensing component, an output terminal connected to a primary-side control component, and a power terminal. The first resistor and the second resistor are connected in series and between the input terminal and the power terminal of the operational amplifier. The electronic switch is connected between a ground terminal and a connection node between the first resistor and the second resistor. The charge/discharge circuit is connected to the electronic switch and the power terminal of the operational amplifier.

Abstract: The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.

Abstract: An electronic device is provided, and the electronic device includes a base, a cover plate, and a bezel. The base has a sidewall where an opening portion is formed. An airflow selectively passes through the opening portion. The cover plate is pivotally connected to the base. The bezel is movably connected to the cover plate, wherein the bezel is rotated facing the opening portion selectively. The arrangement of the bezel may reduce the gap between the bezel and the down edge of the opening portion of the base, reducing the airflow flowing downward back to the heat-dissipation mechanism in the base. Therefore, the heat-dissipation efficiency of the electronic device is enhanced.

Abstract: An electronic device package includes a circuit layer, a first semiconductor die, a second semiconductor die, a plurality of first conductive structures and a second conductive structure. The first semiconductor die is disposed on the circuit layer. The second semiconductor die is disposed on the first semiconductor die, and has an active surface toward the circuit layer. The first conductive structures are disposed between a first region of the second semiconductor die and the first semiconductor die, and electrically connecting the first semiconductor die to the second semiconductor die. The second conductive structure is disposed between a second region of the second semiconductor die and the circuit layer, and electrically connecting the circuit layer to the second semiconductor die.

Abstract: A method for forming a semiconductor package is provided. The method includes forming a first alignment mark in a first substrate of a first wafer and forming a first bonding structure over the first substrate. The method also includes forming a second bonding structure over a second substrate of a second wafer and trimming the second substrate, so that a first width of the first substrate is greater than a second width of the second substrate. The method further includes attaching the second wafer to the first wafer via the first bonding structure and the second bonding structure, thinning the second wafer until a through-substrate via in the second substrate is exposed, and performing a photolithography process on the second wafer using the first alignment mark.

Abstract: A battery module and a short protection method thereof are provided. The battery module has a battery cell pack and a control circuit. The method includes: detecting a temperature of the battery cell pack as a battery cell temperature through the control circuit; determining whether the battery cell temperature shows a downward trend when the battery cell temperature is higher than a first predetermined temperature value; and deactivating the battery module when the battery cell temperature does not show the downward trend.

Abstract: A modulation device including a plurality of electronic elements, at least one first signal line and a first driving circuit is provided. The at least one first signal line is respectively electrically connected to at least one of the electronic elements. The first driving circuit is electrically connected to the at least one first signal line. The first driving circuit provides a first signal to at least one of the at least one first signal line. The first signal includes a first pulse. The first pulse includes a first section and a second section closely adjacent to the first section.

Abstract: A semiconductor device is disclosed herein. The semiconductor device includes a routing structure. The routing structure has an intermediate conductive routing layer. The intermediate conductive routing layer includes a first mesh conductive layer formed in a predetermined second region of the semiconductor device and a second mesh conductive layer formed in a predetermined first region of the semiconductor device. The first mesh conductive layer and the second mesh conductive layer are electrically isolated from each other. The intermediate conductive routing layer further includes multiple first conductive islands formed in the predetermined first region and multiple second conductive islands formed in the predetermined second region.

Abstract: An external power supply system for spindles is revealed. The external power supply system includes a tool holder, a rectifier circuit, an overvoltage protection circuit. and a buck/boost converter. The tool holder receives an external power source of a spindle while the rectifier circuit converts the external power source into a rectified output signal with a power factor through step-down transformation. The overvoltage protection circuit is used to check whether the rectified output signal is larger than an overvoltage signal for outputting an operating potential or a non-operating potential. The buck/boost converter is used for receiving the rectified output signal with the power factor and converting the rectified output signal to an output voltage according to the power factor. Then the output voltage is provided to a load of a low voltage power supply, a high voltage power supply, or a constant voltage power supply.

Abstract: An electronic device which is capable of being bent in a first direction and includes a plurality of light-emitting units and a plurality of conductive patterns overlapping with at least a portion of the plurality of light-emitting units and extending in a second direction. The first direction and the second direction have an angle ? of not greater than 30 degrees.

Abstract: A display device includes first and second display modules and first and second turning pieces that include a first coupling piece, a first turning piece, a second turning piece, and a third turning piece, a second coupling piece and a guiding device. When the first and second display modules are switched between folding and unfolding, the first turning piece pivots relative to the first coupling piece and the second turning piece, and the third turning piece pivots relative to the second coupling piece and the second turning piece. When the display module is switched from folded to unfolded, the other side of the first display module relative to the side is pulled, the side of the first display module is guided by one end of the guiding device and slides to the other end, the first and second display modules are symmetrically unfolded with the side edge as the center.

Abstract: Gas detection devices comprise a dehydration unit a concentration unit, and a temperature control unit for controlling a temperature. The gas detection device includes a sampling mode in which sample gas flows into and out of the dehydration unit through a first port and a second port, respectively, wherein the volatile organic compounds in the sample gas are concentrated in the concentration unit. The temperature control unit may be configured such that the temperature of the sample gas after flowing out from the dehydration unit and before flowing into the concentration unit is not greater than a first preset temperature. Generation of condensed substances in the sample gas can be effectively avoided in a simple manner after the sample gas flows into the concentration unit, thereby further preventing ice blockage. Methods for detecting volatile organic compounds in a sample gas are also disclosed.

Abstract: A suspension bracket and an installing method thereof are provided. The suspension bracket includes a first bracket, a support pole, a positioning member, and a second bracket. The first bracket has an opening and includes a first connecting structure. The support pole is pierced through the opening and configured to be disposed on a preset location, and one end of the support pole abuts against an outer side of the opening. The positioning member is disposed on the support pole and abuts against another outer side of the opening to retain the first bracket. The first bracket is rotatable relative to the positioning member and the support pole. The second bracket includes a second connecting structure, which can be detachably connected to the first connecting structure of the first bracket to form an accommodating space for containing an article.

Abstract: An electrostatic discharge (ESD) protection circuit includes a first and second diode in a semiconductor wafer, an ESD clamp circuit and a first conductive structure on a backside of a semiconductor wafer. The first diode is coupled between an input output (IO) pad and a first node. The second diode is coupled to the first diode, and coupled between the IO pad and a second node. The ESD clamp circuit is in the semiconductor wafer, coupled to the first and second node, and between the first and second diode. The ESD clamp circuit includes a first signal tap region in the semiconductor wafer that is coupled to a reference voltage supply. The second diode is coupled to and configured to share the first signal tap region with the ESD clamp circuit. The first conductive structure is configured to provide a reference voltage to the first signal tap region.