Patents by Inventor Yu-Min Chang

Yu-Min Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10684452
    Abstract: An optical lens is provided. The optical lens includes, in order from an object side to an image-forming side, a first lens having negative refractive power, a second lens having negative refractive power, a third lens having refractive power and having an Abbe number Vd3, a cemented lens having refractive power, and a fourth lens having refractive power and having an Abbe number Vd4, wherein 15?Vd3 and/or Vd3?30, and 60?Vd4 and/or Vd4?85.
    Type: Grant
    Filed: March 14, 2017
    Date of Patent: June 16, 2020
    Assignee: ABILITY ENTERPRISE CO., LTD.
    Inventors: Jung-Yao Chen, Yu-Min Chang, Shuo-Hsien Cheng
  • Publication number: 20200111538
    Abstract: A memory system with dynamic auto-repairing function and an operation method thereof is described herein. The memory system includes a memory and an automatic detection and repairing circuit. The automatic detection and repairing circuit is coupled to the memory. The automatic detection and repairing circuit includes a self-test unit and a repairing unit. The self-test unit is coupled to the memory. The repairing unit is coupled to the memory and the self-test unit respectively. When the memory system is operated in the initial state, the self-test unit instantly detects the defects in the memory and the repairing unit instantly repairs the defects in the memory. Then, the memory system enters into a working state from the initial state.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 9, 2020
    Inventors: Wen-Sheng CHEN, Yu-Min CHANG, Chung-Sung TSAI
  • Publication number: 20200055100
    Abstract: A method of cleaning wafer-cleaning brushes includes passing a wafer having a first polished main side and an opposing unpolished backside between a pair of substantially cylindrical shaped wafer-cleaning brushes are rotated about an axial direction of the brushes while passing the wafer between the pair of wafer-cleaning brushes. A cleaning solution is applied to the brushes while passing the wafer between the pair of wafer-cleaning brushes. While passing between the pair of brushes, the first polished main side of the wafer faces a first direction, the first direction is an opposite direction to which a polished side of a production wafer faces during a subsequent polished wafer cleaning operation. The substantially cylindrical shaped wafer-cleaning brushes include a plurality of protrusions on an external surface of the brushes, and the brushes contact the wafer at least a portion of time the wafer is passing between the pair of brushes.
    Type: Application
    Filed: August 15, 2019
    Publication date: February 20, 2020
    Inventors: Chia-Ling Pai, Yu-Min Chang
  • Publication number: 20190252247
    Abstract: A method includes forming a trench in a low-K dielectric layer, where the trench exposes an underlying contact area of a substrate. A first tantalum nitride (TaN) layer is conformally deposited within the trench, where the first TaN layer is deposited using atomic layer deposition (ALD) or chemical vapor deposition (CVD). A tantalum (Ta) layer is deposited on the first TaN layer conformally within the trench, where the Ta layer is deposited using physical vapor deposition (PVD). An electroplating process is performed to deposit a conductive layer over the Ta layer. A via is formed over the conductive layer, where forming the via includes depositing a second TaN layer within the via and in contact with the conductive layer.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Inventors: Ya-Lien LEE, Hung-Wen SU, Kuei-Pin LEE, Yu-Hung LIN, Yu-Min CHANG
  • Publication number: 20190163951
    Abstract: A fingerprint authentication method and an electronic device are provided. The fingerprint authentication method includes: performing a fingerprint enrollment operation through a fingerprint sensor and storing enrolled fingerprint information to a storage circuit; sensing to-be-authenticated fingerprint information through the fingerprint sensor in a fingerprint authentication operation; and performing a default function corresponding to an authentication success of the fingerprint authentication operation and updating the enrolled fingerprint information according to authenticated fingerprint information if a similarity between the to-be-authenticated fingerprint information and the enrolled fingerprint information conforms to a default condition.
    Type: Application
    Filed: May 30, 2018
    Publication date: May 30, 2019
    Applicant: Acer Incorporated
    Inventor: Yu-Min Chang
  • Patent number: 10288842
    Abstract: An optical lens comprises in order from an object side to an image-forming side, a first lens group having positive refractive power and a second lens group having negative refractive power. The second lens group comprises a third lens and a fourth lens. The optical lens satisfies at least one of the following conditions: a thickness of the first lens group is less than a first distance between the first lens group and the second lens group, and |?7/D4|?2. The second distance is between a projected position which an effective diameter of an object-side surface of the fourth lens projected on an optical axis and a first intersection point which the object-side surface of the fourth lens and the optical axis is ?7, and a thickness of the fourth lens is D4.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: May 14, 2019
    Assignee: ABILITY ENTERPRISE CO., LTD.
    Inventors: Jung-Yao Chen, Yu-Min Chang
  • Patent number: 10276431
    Abstract: A device comprises a semiconductor substrate; a dielectric layer deposited over the semiconductor substrate, the dielectric layer including a trench; and a structure in the trench. The structure includes a chemical vapor deposition (CVD) TaN layer formed on a side wall of the trench; a physical vapor deposition (PVD) Ta layer formed over the CVD TaN layer; and a metal-containing layer formed over the PVD Ta layer.
    Type: Grant
    Filed: February 12, 2018
    Date of Patent: April 30, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Lien Lee, Hung-Wen Su, Kuei-Pin Lee, Yu-Hung Lin, Yu-Min Chang
  • Patent number: 10156701
    Abstract: This present invention provides an optical lens, which includes, in order from an object side to an image-forming side, a first lens group having positive refraction power and a second lens group having negative refraction power. The first lens group comprises a first lens, a second lens, and a third lens. The second lens group comprises a fourth lens, a fifth lens, and a sixth lens. The first lens is a plastic lens, the fourth lens is a convex-concave lens, and the sixth lens is an aspheric lens.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: December 18, 2018
    Assignee: ABILITY ENTERPRISE CO., LTD.
    Inventors: Jung-Yao Chen, Yu-Min Chang, Yen-Chen Chiang
  • Publication number: 20180174898
    Abstract: A device comprises a semiconductor substrate; a dielectric layer deposited over the semiconductor substrate, the dielectric layer including a trench; and a structure in the trench. The structure includes a chemical vapor deposition (CVD) TaN layer formed on a side wall of the trench; a physical vapor deposition (PVD) Ta layer formed over the CVD TaN layer; and a metal-containing layer formed over the PVD Ta layer.
    Type: Application
    Filed: February 12, 2018
    Publication date: June 21, 2018
    Inventors: Ya-Lien Lee, Hung-Wen Su, Kuei-Pin Lee, Yu-Hung Lin, Yu-Min Chang
  • Publication number: 20180172951
    Abstract: An optical lens comprises in order from an object side to an image-forming side, a first lens group having positive refractive power and a second lens group having negative refractive power. The second lens group comprises a third lens and a fourth lens. The optical lens satisfies at least one of the following conditions: a thickness of the first lens group is less than a first distance between the first lens group and the second lens group, and |?7/D4|?2. The second distance is between a projected position which an effective diameter of an object-side surface of the fourth lens projected on an optical axis and a first intersection point which the object-side surface of the fourth lens and the optical axis is ?7, and a thickness of the fourth lens is D4.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 21, 2018
    Applicant: ABILITY ENTERPRISE CO., LTD.
    Inventors: Jung-Yao Chen, Yu-Min Chang
  • Patent number: 9984975
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: May 29, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Yu-Min Chang, You-Hua Chou, Chih-Wei Chang
  • Patent number: 9971126
    Abstract: An optical lens is provided. The optical lens having an optical axis comprises, in order from an object side to an image-forming side, a first lens having negative refraction power, a second lens having positive refraction power, a third lens having positive refraction power, a fourth lens having negative refraction power, a fifth lens having positive refraction power, and a sixth lens having refraction power. The sixth lens has an inflection point on a surface toward the image-forming side, the inflection point is separated from an optical axis by a distance h13, the radius of the sixth lens is H3, and |h13/H13|?0.55.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: May 15, 2018
    Assignee: ABILITY ENTERPRISE CO., LTD.
    Inventors: Jung-Yao Chen, Yu-Min Chang, Sih-Han Wu
  • Patent number: 9966339
    Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: May 8, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Yu-Min Chang, You-Hua Chou, Chih-Wei Chang, Sheng-Hsuan Lin
  • Patent number: 9966304
    Abstract: An improved interconnect structure and a method for forming the interconnect structure is disclosed that allows the interconnect structure to achieve a lower Rc. To lower the Rc of the interconnect structure, an ?-phase inducing metal layer is introduced on a first Ta barrier layer of ? phase to induce the subsequent deposition of Ta thereon into the formation of an ?-phase Ta barrier layer. The subsequently deposited Ta barrier layer with a primary crystallographic structure of ? phase has a lower Rc than that of the ?-phase Ta barrier layer.
    Type: Grant
    Filed: September 12, 2016
    Date of Patent: May 8, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Hung Lin, Ching-Fu Yeh, Hsin-Chen Tsai, Yao-Hsiang Liang, Yu-Min Chang, Shih-Chi Lin
  • Publication number: 20180121346
    Abstract: A memory apparatus including memory modules, a command input module, a power supply module and a data access module is disclosed. Each memory module includes a memory bank including memory units. The command input module receives a non-random access command and generates a corresponding switch control signal according to the non-random access command. The power supply module is coupled to the command input module and the memory modules. The data access module is coupled to the command input module and the memory modules. At a first time, the power supply module selectively provides power only to a first memory module of the memory modules according to the switch control signal and the data access module will perform data access on the first memory module.
    Type: Application
    Filed: October 13, 2017
    Publication date: May 3, 2018
    Inventors: Yu-Min Chang, Tsorng-Yang Mei, Yi-Ping Lee
  • Patent number: 9892963
    Abstract: A method of fabricating an integrated circuit includes depositing a cap layer on a substrate; depositing a dielectric layer on the cap layer; and forming a trench in the dielectric layer. The method further includes depositing a tantalum nitride (TaN) layer on a sidewall of the trench such that the TaN layer has a greater concentration of nitrogen than tantalum. The method further includes depositing a tantalum (Ta) layer on the TaN layer using physical vapor deposition (PVD); and depositing a metal layer over the Ta layer.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: February 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ya-Lien Lee, Hung-Wen Su, Kuei-Pin Lee, Yu-Hung Lin, Yu-Min Chang
  • Patent number: 9810882
    Abstract: An optical lens includes seven lenses. An first lens has a negative refractive power: an second lens, an third lens, an fifth lens, an sixth lens and an seventh lens have refractive powers respectively, and the fourth lens has a positive refractive power. One of the second lens and the third lens has a positive refractive power, and the other has a negative refractive power. One of the fifth lens and the sixth lens has a positive refractive power and the other has a negative refractive power. An object-side surface of the first lens has a refractive rate R1, an image-side surface of the first lens has a refractive rate R2, and |R2/R1|?0.01.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: November 7, 2017
    Assignee: ABILITY ENTERPRISE CO., LTD
    Inventors: Jung-Yao Chen, Yu-Min Chang, Yun-Yi Lin, Chun-Lin Huang
  • Publication number: 20170285299
    Abstract: An optical lens is provided. The optical lens includes, in order from an object side to an image-forming side, a first lens having negative refractive power, a second lens having negative refractive power, a third lens having refractive power and having an Abbe number Vd3, a cemented lens having refractive power, and a fourth lens having refractive power and having an Abbe number Vd4, wherein 15?Vd3 and/or Vd3?30, and 60?Vd4 and/or Vd4?85.
    Type: Application
    Filed: March 14, 2017
    Publication date: October 5, 2017
    Inventors: Jung-Yao Chen, Yu-Min Chang, Shuo-Hsien Cheng
  • Publication number: 20170167027
    Abstract: A method includes applying a first amount of heat to a vapor region of a precursor canister, measuring an indication of saturated vapor pressure within the vapor region during the applying the first amount of heat, and applying a second amount of heat to the vapor region of the precursor canister, the second amount of heat being adjusted from the first amount of heat based on the indication of saturated vapor pressure.
    Type: Application
    Filed: February 24, 2017
    Publication date: June 15, 2017
    Inventors: Ke-Chih Liu, Chia-Ming Tsai, Yen-Yu Chen, Yueh-Ching Pai, Yu-Min Chang
  • Publication number: 20170088970
    Abstract: Methods for use in electrochemical plating processes are described herein. An exemplary method includes determining a wafer electrical property associated with a wafer, wherein the wafer electrical property affects the wafer during an electrochemical plating (ECP) process; adjusting a process parameter to be applied to the wafer during the ECP process based on the determined wafer electrical property, wherein the process parameter specifies at least one of a current or a voltage; and applying the adjusted process parameter to the wafer undergoing the ECP process. In some implementations, the process parameter is adjusted, such that a peak entry current of the ECP process substantially matches a plating current of the ECP process induced following the peak entry current.
    Type: Application
    Filed: December 12, 2016
    Publication date: March 30, 2017
    Inventors: Chen-Kuang Lien, Lun-Chieh Chiu, Yu-Min Chang