Patents by Inventor Yu-Ming Chang

Yu-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11730667
    Abstract: A wearable stimulation device includes a wearable member, a stimulation unit, and a driver. The stimulation unit is secured to the wearable member. The stimulation unit includes an immovable end, a stimulation end, and a power element. The power element is connected between the immovable end and the stimulation end for driving the stimulation end to reciprocate relative to the immovable end. The driver is in signal connection with the power element. The driver is configured to output a vibration signal to the power element for the stimulation end to have a stroke of between 8.8 mm and 10.8 mm, a thrust of between 5.6 N and 7.6 N and a reciprocating frequency of between 180 Hz and 220 Hz, thereby stimulating the deep muscles of the abdomen or waist of a human body without affecting the superficial muscles.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: August 22, 2023
    Assignee: Tzu Chi University
    Inventors: Chich-Haung Yang, Ya-Hui Chang, Yu-Ming Chang, Cheng-Chun Cheng
  • Publication number: 20230079431
    Abstract: A solid modeling and non-fungible virtual and anti-counterfeiting integration system mainly comprises a 3D modeling device, an elliptic curve cryptographic module, and a non-fungible transaction platform. The 3D modeling device mainly obtains a 3D image file with a characteristic value from a physical object, the elliptic curve cryptographic module generates a sub-public key and a sub-private key, and the non-fungible transaction platform comprises a master private key and a master public key. The sub-public key is capable of encrypting the characteristic value, the sub-private key decrypts the sub-public key to restore the characteristic value and display the 3D image file, the master private key signs the sub-public key and the sub-private key, the master public key verifies the signature, by obtaining the sub-public key and the sub-private key, the sub-private key is capable of decrypting the sub-public key to restore the characteristic value and display the 3D image file.
    Type: Application
    Filed: September 13, 2021
    Publication date: March 16, 2023
    Applicant: M-ONE INC.
    Inventors: JUAN-HUNG WU, PO-HUAN LEE, YU-MING CHANG
  • Publication number: 20220354737
    Abstract: A wearable stimulation device includes a wearable member, a stimulation unit, and a driver. The stimulation unit is secured to the wearable member. The stimulation unit includes an immovable end, a stimulation end, and a power element. The power element is connected between the immovable end and the stimulation end for driving the stimulation end to reciprocate relative to the immovable end. The driver is in signal connection with the power element. The driver is configured to output a vibration signal to the power element for the stimulation end to have a stroke of between 8.8 mm and 10.8 mm, a thrust of between 5.6 N and 7.6 N and a reciprocating frequency of between 180 Hz and 220 Hz, thereby stimulating the deep muscles of the abdomen or waist of a human body without affecting the superficial muscles.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 10, 2022
    Inventors: CHICH-HAUNG YANG, YA-HUI CHANG, YU-MING CHANG, CHENG-CHUN CHENG
  • Patent number: 11074183
    Abstract: A method and apparatus for read wearing control for storage class memory (SCM) are disclosed. The read data control apparatus, located between a host and the SCM subsystem, comprises a read data cache, an address cache and an SCM controller. The address cache stores pointers pointing to data stored in logging area(s) located in the SCM. For a read request, the read wearing control determines whether the read request is a read data cache hit, an address cache hit or neither (i.e., read data cache miss and address cache miss). For the read data cache hit, the requested data is returned from the read data cache. For the address cache hit, the requested data is returned from the logging area(s) and the read data becomes a candidate to be placed in the read data cache. For read data cache and address cache misses, the requested data is returned from SCM.
    Type: Grant
    Filed: December 28, 2019
    Date of Patent: July 27, 2021
    Assignee: Wolley Inc.
    Inventors: Yu-Ming Chang, Tai-Chun Kuo, Chuen-Shen Bernard Shung
  • Patent number: 11056906
    Abstract: An integrated power supply system includes a grid power source, at least one renewable power source, a rechargeable battery assembly, a DC bus, a bi-directional AC-to-DC converter, at least one first DC-to-DC converter, a bi-directional DC-to-DC converter, and a controller. The bi-directional AC-to-DC converter is coupled to the grid power source and the DC bus. The at least one first DC-to-DC converter is coupled to the at least one renewable power source and the DC bus. The bi-directional DC-to-DC converter is coupled to the rechargeable battery assembly and the DC bus. The controller controls power electricity feeding into and being drawn from the DC bus, thereby keeping a bus voltage of the DC bus substantially fixed at a system voltage.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: July 6, 2021
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Ming Chang, Sheng-Hua Li
  • Publication number: 20210200676
    Abstract: A method and apparatus for read wearing control for storage class memory (SCM) are disclosed. The read data control apparatus, located between a host and the SCM subsystem, comprises a read data cache, an address cache and an SCM controller. The address cache stores pointers pointing to data stored in logging area(s) located in the SCM. For a read request, the read wearing control determines whether the read request is a read data cache hit, an address cache hit or neither (i.e., read data cache miss and address cache miss). For the read data cache hit, the requested data is returned from the read data cache. For the address cache hit, the requested data is returned from the logging area(s) and the read data becomes a candidate to be placed in the read data cache. For read data cache and address cache misses, the requested data is returned from SCM.
    Type: Application
    Filed: December 28, 2019
    Publication date: July 1, 2021
    Inventors: Yu-Ming Chang, Tai-Chun Kuo, Chuen-Shen Bernard Shung
  • Patent number: 11016686
    Abstract: A method and apparatus of bad location management for storage class memory are disclosed. A nonvolatile memory is partitioned into a non-reserved space and a reserved space, which are divided into multiple data units. The health status of the data units in the non-reserved space are classified into multiple classes including a mostly-good class. For host data read, the data from a mostly-good data unit are read and whether the data includes a pointer is checked. If no pointer, the data read are returned as the host data. Otherwise, the data unit pointed by the pointer is read. For data write, the data from a mostly-good data unit are read. If no pointer in the read data, the host data are written into the mostly-good data unit. Otherwise, the host data are written into the data unit in the reserved space pointed by the pointer.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: May 25, 2021
    Assignee: Wolly Inc.
    Inventors: Yu-Ming Chang, Chuen-Shen Bernard Shung
  • Publication number: 20210081107
    Abstract: A method and apparatus of bad location management for storage class memory are disclosed. A nonvolatile memory is partitioned into a non-reserved space and a reserved space, which are divided into multiple data units. The health status of the data units in the non-reserved space are classified into multiple classes including a mostly-good class. For host data read, the data from a mostly-good data unit are read and whether the data includes a pointer is checked. If no pointer, the data read are returned as the host data. Otherwise, the data unit pointed by the pointer is read. For data write, the data from a mostly-good data unit are read. If no pointer in the read data, the host data are written into the mostly-good data unit. Otherwise, the host data are written into the data unit in the reserved space pointed by the pointer.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Inventors: Yu-Ming Chang, Chuen-Shen Bernard Shung
  • Patent number: 10752118
    Abstract: An electric vehicle charging circuit includes a first power converting circuit configured to provide an output current to charge an electric vehicle, a power storage device, and a second power converting circuit electrically coupled between the power storage device and a bus, and configured to bi-directionally transmit power between the storage device and the bus. The first power converting circuit includes an AC/DC converter configured to convert an AC voltage to a bus voltage to the bus, and a DC/DC converter electrically coupled to the AC/DC converter at the bus and configured to output the output current. The second power converting circuit includes an isolated bidirectional converter.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: August 25, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Ming Chang
  • Patent number: 10615698
    Abstract: A power converter includes a primary-side switching circuit, a resonant circuit, a transformer, a secondary-side rectifying circuit, and a processing circuit. The primary-side switching circuit includes switches and configured to switch the switches to be on or off based on a switching frequency to convert a dc input voltage to an AC signal. The resonant circuit is coupled to the primary-side switching circuit and configured to receive the AC signal to provide a resonant current. The primary winding of the transformer is coupled to the resonant circuit. The secondary-side rectifying circuit is coupled to the secondary winding of the transformer and configured to rectify the secondary ac signal output by the secondary winding and output an output voltage. The processing circuit receives a cut-off current detecting signal via a current detecting circuit if the corresponding switch is turned off, and adjusts the switching frequency accordingly.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: April 7, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Ming Chang
  • Patent number: 10445008
    Abstract: A data management method for memory and a memory apparatus are provided. The memory includes a number of memory pages. Each of the memory pages includes multiple memory cells. Each of the memory cells includes a first bit and a second bit. Each of the memory cells has a first logical state, a second logical state, a third logical state, and a fourth logical state. The data management method for memory includes the following steps. A data update command corresponding to a logical address is received. The logical address corresponds to a physical address before receiving the data update command. A sanitizing voltage is applied to a first target memory cell of the memory cells in a target memory page of the memory pages located at the physical address. The logical state of the first target memory cell is changed.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: October 15, 2019
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yung-Chun Li, Ping-Hsien Lin, Yu-Ming Chang
  • Publication number: 20190087110
    Abstract: A data management method for memory and a memory apparatus are provided. The memory includes a number of memory pages. Each of the memory pages includes multiple memory cells. Each of the memory cells includes a first bit and a second bit. Each of the memory cells has a first logical state, a second logical state, a third logical state, and a fourth logical state. The data management method for memory includes the following steps. A data update command corresponding to a logical address is received. The logical address corresponds to a physical address before receiving the data update command. A sanitizing voltage is applied to a first target memory cell of the memory cells in a target memory page of the memory pages located at the physical address. The logical state of the first target memory cell is changed.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 21, 2019
    Inventors: Yung-Chun Li, Ping-Hsien Lin, Yu-Ming Chang
  • Publication number: 20190081506
    Abstract: An integrated power supply system includes a grid power source, at least one renewable power source, a rechargeable battery assembly, a DC bus, a bi-directional AC-to-DC converter, at least one first DC-to-DC converter, a bi-directional DC-to-DC converter, and a controller. The bi-directional AC-to-DC converter is coupled to the grid power source and the DC bus. The at least one first DC-to-DC converter is coupled to the at least one renewable power source and the DC bus. The bi-directional DC-to-DC converter is coupled to the rechargeable battery assembly and the DC bus. The controller controls power electricity feeding into and being drawn from the DC bus, thereby keeping a bus voltage of the DC bus substantially fixed at a system voltage.
    Type: Application
    Filed: June 21, 2018
    Publication date: March 14, 2019
    Inventors: Yu-Ming CHANG, Sheng-Hua LI
  • Patent number: 10224825
    Abstract: A power converter includes a primary-side switching circuit, a resonant circuit, a transformer including primary and secondary windings, a secondary-side rectifying circuit, voltage and current sensing circuits, and a processing circuit. The primary-side switching circuit controls switches to be on or off based on a pulse signal to convert an input voltage to a square wave signal. The resonant circuit is coupled to the primary-side switching circuit and receives the square wave signal to provide a primary-side current. The primary winding is coupled to the resonant circuit. The secondary-side rectifying circuit is coupled to the secondary winding and rectifies the secondary ac signal output by the secondary winding and outputs an output voltage. The voltage and current sensing circuits detect the voltage and current of the primary winding and output voltage and current sensing signals. The processing circuit outputs the pulse signal according to the voltage and current sensing signals.
    Type: Grant
    Filed: November 1, 2017
    Date of Patent: March 5, 2019
    Assignee: DELTA ELECTRONICS, INC.
    Inventor: Yu-Ming Chang
  • Publication number: 20180339595
    Abstract: An electric vehicle charging circuit includes a first power converting circuit configured to provide an output current to charge an electric vehicle, a power storage device, and a second power converting circuit electrically coupled between the power storage device and a bus, and configured to bi-directionally transmit power between the storage device and the bus. The first power converting circuit includes an AC/DC converter configured to convert an AC voltage to a bus voltage to the bus, and a DC/DC converter electrically coupled to the AC/DC converter at the bus and configured to output the output current. The second power converting circuit includes an isolated bidirectional converter.
    Type: Application
    Filed: December 7, 2017
    Publication date: November 29, 2018
    Inventor: Yu-Ming Chang
  • Patent number: 10120605
    Abstract: A data allocating method includes steps of: determining whether data to be written into a physical memory block is hot data or cold data; when the data is hot data, according to a hot data allocating order, searching at least one first empty sub-block from the physical memory block to allocate the data; when the data is cold data, according to a cold data allocating order, searching at least one second empty sub-block from the physical memory block to allocate the data.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: November 6, 2018
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Hung-Sheng Chang, Yu-Ming Chang, Hsiang-Pang Li, Yuan-Hao Chang, Tei-Wei Kuo
  • Publication number: 20180309373
    Abstract: A power converter includes a primary-side switching circuit, a resonant circuit, a transformer including primary and secondary windings, a secondary-side rectifying circuit, voltage and current sensing circuits, and a processing circuit. The primary-side switching circuit controls switches to be on or off based on a pulse signal to convert an input voltage to a square wave signal. The resonant circuit is coupled to the primary-side switching circuit and receives the square wave signal to provide a primary-side current. The primary winding is coupled to the resonant circuit. The secondary-side rectifying circuit is coupled to the secondary winding and rectifies the secondary ac signal output by the secondary winding and outputs an output voltage. The voltage and current sensing circuits detect the voltage and current of the primary winding and output voltage and current sensing signals. The processing circuit outputs the pulse signal according to the voltage and current sensing signals.
    Type: Application
    Filed: November 1, 2017
    Publication date: October 25, 2018
    Inventor: Yu-Ming CHANG
  • Patent number: 10108555
    Abstract: A memory management method includes: providing a hybrid memory comprising a first type memory and a second type memory; providing an inactive list and a read active list for recording in-used pages on the first type memory; providing a write active list for recording in-used pages on the second type memory; allocating a page from the first type memory according to a system request, and inserting the page into the inactive list accordingly; moving the page from the inactive list to the write active list or the read active list in response to two or more successive access operations on the page; and referring the page to a physical address on the second type memory when the page is in the write active list.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: October 23, 2018
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Ming Chang, Yuan-Hao Chang, Hsiu-Chang Chen, Tei-Wei Kuo
  • Publication number: 20180301995
    Abstract: A power converter includes a primary-side switching circuit, a resonant circuit, a transformer, a secondary-side rectifying circuit, and a processing circuit. The primary-side switching circuit includes switches and configured to switch the switches to be on or off based on a switching frequency to convert a dc input voltage to an AC signal. The resonant circuit is coupled to the primary-side switching circuit and configured to receive the AC signal to provide a resonant current. The primary winding of the transformer is coupled to the resonant circuit. The secondary-side rectifying circuit is coupled to the secondary winding of the transformer and configured to rectify the secondary ac signal output by the secondary winding and output an output voltage. The processing circuit receives a cut-off current detecting signal via a current detecting circuit if the corresponding switch is turned off, and adjusts the switching frequency accordingly.
    Type: Application
    Filed: November 3, 2017
    Publication date: October 18, 2018
    Inventor: Yu-Ming CHANG
  • Patent number: 10007446
    Abstract: A method for writing data into a persistent storage device includes grouping a plurality of data entries stored in a temporary storage device to form a data unit, such that the data unit has a size equal to an integer multiple of a size of an access unit of the persistent storage device. The method further includes writing the data unit into the persistent storage device.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: June 26, 2018
    Assignee: Macronix International Co., Ltd.
    Inventors: Wei-Chieh Huang, Li-Chun Huang, Yu-Ming Chang, Hung-Sheng Chang, Hsiang-Pang Li, Ting-Yu Liu, Chien-Hsin Liu, Nai-Ping Kuo