Patents by Inventor Yu Pin

Yu Pin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9692462
    Abstract: A transmitter includes a first pre-distortion circuit, a second pre-distortion circuit, a transmitting circuit and a pre-distortion parameters generating circuit. The first pre-distortion circuit uses a plurality of first pre-distortion parameters to perform a pre-distortion operation upon a first input signal to generate a pre-distorted first input signal. The second pre-distortion circuit uses a plurality of second pre-distortion parameters to perform a pre-distortion operation upon a second input signal to generate a pre-distorted second input signal. The transmitting circuit is arranged to process the pre-distorted first input signal and the pre-distorted second input signal to generate an output signal. The pre-distortion parameters generating circuit generates the first pre-distortion parameters and the second pre-distortion parameters according to the first input signal, the second input signal and the output signal.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: June 27, 2017
    Assignee: Realtek Semiconductor Corp.
    Inventor: Yu-Pin Chang
  • Publication number: 20170167765
    Abstract: An evaporator includes a casing and a plurality of circulation units disposed on the casing. Each of the circulation units includes a flow path formed in the casing, an inlet formed in the casing for entry of one of refrigerants into the casing and fluidly communicating with the flow path, and an outlet formed in the casing spaced apart from the inlet for exit of the one of the refrigerants out the casing and fluidly communicating with the flow path. The circulation units are independent from each other and do not fluidly communicate with each other.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Ying-Chi TSAI, Yu-Pin HSU, Chia-Pin SUN
  • Publication number: 20170167758
    Abstract: A cascade refrigeration system includes first and second cooling devices. The first cooling device includes a first compressor, a condenser, an expansion device, an evaporator having first and second passages independent from and not communicating with each other, and a first conduit interconnecting the first compressor, the condenser, the expansion device and the first passage. The second cooling device includes a second compressor, a heat exchanger, and a second conduit interconnecting the second compressor, the second passage and the heat exchanger. A circulation switching device includes a switching mechanism connected to the first conduit downstream of the condenser and upstream of the expansion device.
    Type: Application
    Filed: December 15, 2015
    Publication date: June 15, 2017
    Inventors: Ying-Chi TSAI, Yu-Pin HSU, Chia-Pin SUN
  • Publication number: 20170125310
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Application
    Filed: January 18, 2017
    Publication date: May 4, 2017
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng TSAO, Cheng-Hung WANG, Chun-Chieh LIN, Hsiu-Hsiung YANG, Yu-Pin TSAI
  • Patent number: 9627318
    Abstract: In some embodiments, an interconnect structure includes a base layer, a plurality of dielectric layers and a conductive structure. The base layer includes a conductive region. The plurality of dielectric layers are formed over the base layer. The plurality of dielectric layers includes a first dielectric layer and an etch stop layer under the first dielectric layer. The conductive structure includes a plug. The plug includes a central region and one or more footing regions. The footing regions are formed around the central region and formed at least partially in the first etch stop layer. A total width of the central region and one or more footing regions at a bottom level of the plurality of dielectric layers is at least about 5% more than a width of the central region at the bottom level of the plurality of dielectric layers.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: April 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ling Mei Lin, Chun Li Wu, Yu-Pin Chang
  • Patent number: 9582850
    Abstract: An apparatus for mode detection for a display device includes a front-end circuit, adapted to fetch an image signal according to a determined mode to generate a fetched image signal, and to adjust the determined mode according to a control signal, and a back-end circuit, connected to the front-end circuit, adapted to process the fetched image signal according to the determined mode. The back-end circuit is adapted to generate an indication signal according to an abnormal status, wherein the back-end circuit comprises a buffer adapted to temporarily store the fetched image signal, and wherein the abnormal status comprises an underflow or overflow state of the buffer. The back-end circuit further includes a determining unit, connected to the front-end circuit and the back-end circuit, adapted to generate the control signal according to the indication signal indicating the determined mode needs to adjust.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: February 28, 2017
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yu-Pin Chou, Szu-Ping Chen
  • Patent number: 9564376
    Abstract: The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: February 7, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yu-Cheng Tsao, Cheng-Hung Wang, Chun-Chieh Lin, Hsiu-Hsiung Yang, Yu-Pin Tsai
  • Publication number: 20160367745
    Abstract: A filter for a hemodialysis apparatus is provided, which includes: a first cover member, a second cover member coupled to the first cover member, and a membrane disposed in a chamber of the first cover member. The membrane has a first membrane layer and two second membrane layers respectively bonded to two opposite sides of the first membrane layer. A plurality of first ridges and second ridges are formed on a side surface of the second cover member, spaced apart from one another and having different widths so as to increase the friction force. The non-directional three-layer structure of the membrane has a high water pressure resistance, greatly reduces the chance of fluid leakage, and avoids erroneous disposition.
    Type: Application
    Filed: August 19, 2015
    Publication date: December 22, 2016
    Inventors: Ying-Yeh LIU, Chia-Chen CHEN, Yu-Pin LlN
  • Publication number: 20160354997
    Abstract: A water-proof and dust-proof membrane assembly which has a satisfactory water-proof property, dust-proof property, sound transmission capability and air permeability, as well as excellent supporting intensity and pressure resistance is provided. A water-proof and dust-proof membrane assembly having a body and a supporting member, in which the body is an asymmetric porous structure in the form of membrane having a first surface and a second surface, the supporting member is composed of a polymeric material, includes a first contact surface and a second contact surface and the porosity (second porosity) of the supporting member is larger than the first porosity, i.e. 10% to 99.9%, and the first surface of the body and the first contact surface of the supporting member are bonded is provided.
    Type: Application
    Filed: August 22, 2016
    Publication date: December 8, 2016
    Applicant: EF-MATERIALS INDUSTRIES INC.
    Inventors: James Huang, Sean Chen, Radium Huang, Jeff Han, Yu Pin Lin
  • Publication number: 20160269057
    Abstract: A transmitter includes a first pre-distortion circuit, a second pre-distortion circuit, a transmitting circuit and a pre-distortion parameters generating circuit. The first pre-distortion circuit uses a plurality of first pre-distortion parameters to perform a pre-distortion operation upon a first input signal to generate a pre-distorted first input signal. The second pre-distortion circuit uses a plurality of second pre-distortion parameters to perform a pre-distortion operation upon a second input signal to generate a pre-distorted second input signal. The transmitting circuit is arranged to process the pre-distorted first input signal and the pre-distorted second input signal to generate an output signal. The pre-distortion parameters generating circuit generates the first pre-distortion parameters and the second pre-distortion parameters according to the first input signal, the second input signal and the output signal.
    Type: Application
    Filed: December 21, 2015
    Publication date: September 15, 2016
    Inventor: Yu-Pin Chang
  • Publication number: 20160267625
    Abstract: An apparatus for mode detection for a display device includes a front-end circuit, adapted to fetch an image signal according to a determined mode to generate a fetched image signal, and to adjust the determined mode according to a control signal, and a back-end circuit, connected to the front-end circuit, adapted to process the fetched image signal according to the determined mode. The back-end circuit is adapted to generate an indication signal according to an abnormal status, wherein the back-end circuit comprises a buffer adapted to temporarily store the fetched image signal, and wherein the abnormal status comprises an underflow or overflow state of the buffer. The back-end circuit further includes a determining unit, connected to the front-end circuit and the back-end circuit, adapted to generate the control signal according to the indication signal indicating the determined mode needs to adjust.
    Type: Application
    Filed: May 26, 2016
    Publication date: September 15, 2016
    Inventors: Yu-Pin CHOU, Szu-Ping CHEN
  • Publication number: 20160261509
    Abstract: A method for performing uplink traffic shaping of an electronic device and an associated apparatus are provided, where the method includes the steps of: monitoring at least one modulator-demodulator (modem) state of a radio modem of the electronic device; and according to the at least one modem state and according to at least one uplink traffic gating strategy, dynamically controlling whether to allow uplink traffic to pass through the radio modem, and more particularly, in a situation an alarm-aware uplink traffic gating strategy is involved, determining whether a time interval between a wake-up type alarm trigger and a last time point when uplink traffic is previously allowed because of another alarm trigger reaches a predetermined alarm-triggered gate open threshold; and controlling whether to allow uplink traffic to pass through the radio modem according to whether the time interval reaches the predetermined alarm-triggered gate open threshold.
    Type: Application
    Filed: September 7, 2015
    Publication date: September 8, 2016
    Inventors: Jun-Hua Chou, Wen-Hung Su, Chia-Chun Hsu, Yu-Pin Lin
  • Patent number: 9373291
    Abstract: A method for mapping an input grayscale into an output luminance includes selecting a reference grayscale and a curvature according to an input grayscale; and generating an output luminance according to the reference grayscale, the curvature, and the input grayscale.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: June 21, 2016
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Yu-Hsing Chuang, Chih-Yuan Yang, Yu-Pin Chang, Feng-Ting Pai
  • Publication number: 20160154649
    Abstract: A switching method for context migration among a plurality of physical processor cores is provided. Each of the physical processor cores is mapped to a corresponding logical processor core. The switching method includes migrating a processor hardware context from a first physical processor core to a second physical processor core which is different from the first physical processor core. The first physical processor core and the second physical processor core are mapped to a first logical processor core and a second logical processor core which is different from the first logical processor core, respectively prior to the migration. The switching method further includes remapping the first physical processor core to the second logical processor core and remapping the second physical processor core to the first logical processor core.
    Type: Application
    Filed: July 15, 2015
    Publication date: June 2, 2016
    Inventors: Yu-Teng LIN, Wan-Ching HUANG, Yu-Pin LIN, Nicholas Ching Hui TANG
  • Patent number: 9318061
    Abstract: A method for mapping an input grayscale into an output luminance includes selecting a first reference grayscale, a first reference luminance, a second reference grayscale and a second reference luminance according to an input grayscale, generating a middle reference grayscale and a middle luminance, replacing a value of the first or second reference grayscale by a value of the middle reference grayscale, and replacing a value of the first or second reference luminance by a value of the middle luminance according to the middle reference grayscale and the input grayscale, and generating an output luminance by computing a linear transformation equation.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: April 19, 2016
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Yu-Pin Chang, Kai-I Dai, Jie-Jung Huang, Yu-Hsing Chuang, Shih-Hung Huang
  • Publication number: 20160019850
    Abstract: A method for mapping an input grayscale into an output luminance includes selecting a reference grayscale and a curvature according to an input grayscale; and generating an output luminance according to the reference grayscale, the curvature, and the input grayscale.
    Type: Application
    Filed: July 16, 2014
    Publication date: January 21, 2016
    Inventors: Yu-Hsing Chuang, Chih-Yuan Yang, Yu-Pin Chang, Feng-Ting Pai
  • Publication number: 20160019849
    Abstract: A method for mapping an input grayscale into an output luminance includes selecting a first reference grayscale, a first reference luminance, a second reference grayscale and a second reference luminance according to an input grayscale, generating a middle reference grayscale and a middle luminance, replacing a value of the first or second reference grayscale by a value of the middle reference grayscale, and replacing a value of the first or second reference luminance by a value of the middle luminance according to the middle reference grayscale and the input grayscale, and generating an output luminance by computing a linear transformation equation.
    Type: Application
    Filed: July 15, 2014
    Publication date: January 21, 2016
    Inventors: Yu-Pin Chang, Kai-I Dai, Jie-Jung Huang, Yu-Hsing Chuang, Shih-Hung Huang
  • Publication number: 20150364420
    Abstract: In some embodiments, an interconnect structure includes a base layer, a plurality of dielectric layers and a conductive structure. The base layer includes a conductive region. The plurality of dielectric layers are formed over the base layer. The plurality of dielectric layers includes a first dielectric layer and an etch stop layer under the first dielectric layer. The conductive structure includes a plug. The plug includes a central region and one or more footing regions. The footing regions are formed around the central region and formed at least partially in the first etch stop layer. A total width of the central region and one or more footing regions at a bottom level of the plurality of dielectric layers is at least about 5% more than a width of the central region at the bottom level of the plurality of dielectric layers.
    Type: Application
    Filed: June 16, 2014
    Publication date: December 17, 2015
    Inventors: LING MEI LIN, CHUN LI WU, YU-PIN CHANG
  • Patent number: 9196210
    Abstract: The present invention discloses a driving module for a liquid crystal display device. The driving module includes a data line signal processing unit, for generating a plurality of data driving signals, a scan line signal processing unit, for generating a plurality of gate driving signals, and a control unit, for controlling the data line signal processing unit and the gate line signal processing unit, such that a plurality of sub-pixels corresponding to a data line are with different charging orders in different frames, or are charged with different charging periods in a same frame.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: November 24, 2015
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Yu-Pin Chang, Chih-Peng Hsia, Tsung-Yin Yu
  • Patent number: 9098915
    Abstract: An image processing apparatus for adjusting the luminance of a target pixel of an image is provided. The target pixel includes original pixel data and corresponds to a mask value. The image processing apparatus includes a luminance detection unit, a luminance compensation unit and a mapping unit. The luminance detection unit generates an original luminance value according to the original pixel data. The luminance compensation unit adjusts the original luminance value according to a non-linear function to generate a compensated luminance value. The mapping unit generates adjusted pixel data according to the compensated luminance value. The non-linear function at least includes a first monomial function, which has a base part associated with an inverse value of the original luminance value and an exponent part associated with the mask value.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: August 4, 2015
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yu-Hsing Chuang, Yu-Pin Chang, Chih-Yuan Yang, Feng-Ting Pai