Patents by Inventor Yu-Shih Wang

Yu-Shih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220375868
    Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 24, 2022
    Inventors: Cheng-Wei CHANG, Chia-Hung CHU, Kao-Feng LIN, Hsu-Kai CHANG, Shuen-Shin LIANG, Sung-Li WANG, Yi-Ying LIU, Po-Nan YEH, Yu Shih WANG, U-Ting CHIU, Chun-Neng LIN, Ming-Hsi YEH
  • Patent number: 11508904
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: November 22, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20220367258
    Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.
    Type: Application
    Filed: July 26, 2022
    Publication date: November 17, 2022
    Inventors: Po-Nan Yeh, Yu-Shih Wang, Ming-Hsi Yeh
  • Publication number: 20220367254
    Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 17, 2022
    Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20220359235
    Abstract: A method for processing a substrate is provided. The method includes the following operations: placing a substrate over a first injector in a substrate processing apparatus, the substrate having a front surface and a back surface opposite to the front surface, and the front surface having a plurality of concentric regions; adjusting a temperature of each of the plurality of concentric regions by controlling at least one of a flow rate and a temperature associated with a fluid dispensing from the first injector; and rotating the substrate by a spin base disposed below the substrate, the substrate is rotated with respect to a center axis perpendicular to the front surface thereof when adjusting the temperature. The spin base includes a ring opening for rotating relative to the first injector, and the first injector is displaced from a projection of a center of the substrate from a top view perspective.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 10, 2022
    Inventors: PO-YUAN WANG, TZU ANG CHIANG, JIAN-JOU LIAN, YU SHIH WANG, CHUN-NENG LIN, MING-HSI YEH
  • Patent number: 11488859
    Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Nan Yeh, Yu Shih Wang, Ming-Hsi Yeh
  • Patent number: 11488857
    Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: November 1, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
  • Publication number: 20220342451
    Abstract: A portable electronic device including a main display and at least one external display detachable relative to one side of the main display is provided. The external display includes a body, a slider slidably disposed in the body, at least one latch pivoted to the body, and at least one elastic member connected between the slider and the body. The latch has a driving column and a tenon portion opposite to each other, and the driving column is movably connected to the slider, such that when the slider slides relative to the body, the latch is driven to pivot relative to the body, and the tenon portion is rotated out of the body or hidden in body. The tenon portion that is rotated out of the body is inserted into the main display, so that the external display is combined to the main display.
    Type: Application
    Filed: March 4, 2022
    Publication date: October 27, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
  • Patent number: 11480869
    Abstract: A photomask includes a substrate, a multilayer stack disposed over the substrate and configured to reflect a radiation, a capping layer over the multilayer stack, and an anti-reflective layer over the capping layer. The anti-reflective layer comprises a first pattern, wherein the first pattern exposes the capping layer and is configured as a printable feature. The photomask also includes an absorber spaced apart from the printable feature from a top-view perspective.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: October 25, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chien-Hung Lai, Hao-Ming Chang, Chia-Shih Lin, Hsuan-Wen Wang, Yu-Hsin Hsu, Chih-Tsung Shih, Yu-Hsun Wu
  • Publication number: 20220302374
    Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, a top electrode layer on the magnetic tunnel junction stack, and a hard mask layer on said top electrode layer, wherein the material of top electrode layer is titanium nitride, a material of said hard mask layer is tantalum or tantalum nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
    Type: Application
    Filed: June 9, 2022
    Publication date: September 22, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, Jing-Yin Jhang, I-Ming Tseng, Yu-Ping Wang, Chien-Ting Lin, Kun-Chen Ho, Yi-Syun Chou, Chang-Min Li, Yi-Wei Tseng, Yu-Tsung Lai, JUN XIE
  • Publication number: 20220285209
    Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.
    Type: Application
    Filed: March 5, 2021
    Publication date: September 8, 2022
    Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220283670
    Abstract: A three-dimensional sensing device includes a pressure sensing film, a silver nanowire electrode, a first touch sensing electrode layer, and a second touch sensing electrode layer. The pressure sensing film includes a substrate and a polarized pressure sensing layer. The polarized pressure sensing layer is disposed on and in contact with a first side of the substrate. The silver nanowire electrode is disposed on a side of the polarized pressure sensing layer opposite to the substrate. The first touch sensing electrode layer is disposed on and in contact with a second side of the substrate and includes a patterned electrode with burr etching. The patterned electrode includes first-axis electrodes. A gap between adjacent two first-axis electrodes is between 20 ?m to 35 ?m. The second touch sensing electrode layer is disposed on a side of the first touch sensing electrode layer opposite to the polarized pressure sensing layer.
    Type: Application
    Filed: March 3, 2021
    Publication date: September 8, 2022
    Inventors: Feng-Ming Lin, Yu-Ting Chan, Lien-Hsin Lee, Tai-Shih Cheng, Ren-Hung Wang
  • Patent number: 11424185
    Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Wei Chang, Chia-Hung Chu, Kao-Feng Lin, Hsu-Kai Chang, Shuen-Shin Liang, Sung-Li Wang, Yi-Ying Liu, Po-Nan Yeh, Yu Shih Wang, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh
  • Publication number: 20220238600
    Abstract: An MRAM structure includes a dielectric layer. A contact hole is disposed in the dielectric layer. A contact plug fills in the contact hole and protrudes out of the dielectric layer. The contact plug includes a lower portion and an upper portion. The lower portion fills in the contact hole. The upper portion is outside of the contact hole. The upper portion has a top side and a bottom side greater than the top side. The top side and the bottom side are parallel. The bottom side is closer to the contact hole than the top side. An MRAM is disposed on the contact hole and contacts the contact plug.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Hui Lee, I-Ming Tseng, Ying-Cheng Liu, Yi-An Shih, Yu-Ping Wang
  • Publication number: 20220236766
    Abstract: An electronic device assembly is provided, including an electronic device body and a detachable lens module. The electronic device body has a housing and a first joining unit, wherein the first joining unit is disposed on the housing. The detachable lens module is detachably assembled onto the housing and has a second joining unit, wherein the first joining unit is joined to the second joining unit to electrically connect the detachable lens module to the electronic device body.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai, Chi-Hung Lai, Wu-Chen Lee, Pin-Chueh Lin, Chih-Wei Liao, Ting-Wen Pai, Wen-Chieh Chen
  • Patent number: 11398391
    Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a plurality of holding members and at least a first injector. The plurality of holding members are configured to hold a substrate. The substrate includes a front surface and a back surface opposite to the front surface. The first injector is below the holding members and is configured to face the back surface of the substrate. The first injector is displaced from a projection of a center of the substrate from a top view perspective. A method for processing a substrate is also provided.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: July 26, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Po-Yuan Wang, Tzu Ang Chiang, Jian-Jou Lian, Yu Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
  • Patent number: 11387408
    Abstract: A magnetoresistive random access memory (MRAM), including a bottom electrode layer on a substrate, a magnetic tunnel junction stack on the bottom electrode layer, and a top electrode layer on the magnetic tunnel junction stack, wherein the material of top electrode layer is titanium nitride, and the percentage of nitrogen in the titanium nitride gradually decreases from the top surface of top electrode layer to the bottom surface of top electrode layer.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: July 12, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, Jing-Yin Jhang, I-Ming Tseng, Yu-Ping Wang, Chien-Ting Lin, Kun-Chen Ho, Yi-Syun Chou, Chang-Min Li, Yi-Wei Tseng, Yu-Tsung Lai, Jun Xie
  • Publication number: 20220206600
    Abstract: A touch pad structure includes a touch module, a first bracket, a second bracket, and a plurality of linkage rods. The touch module is disposed on the first bracket. The second bracket is surrounding the first bracket and the touch module. A plurality of outer edges of the first bracket faces to a plurality of inner edges of the second bracket respectively. Each of the linkage rods is pivotally connected the outer edge and the inner edge facing to each other, so that the touch module is moved together with the first bracket and relative to the second bracket when the touch module is pressed or released, and the linkage rods have synchronized seesaw motion.
    Type: Application
    Filed: March 21, 2022
    Publication date: June 30, 2022
    Applicant: Acer Incorporated
    Inventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu
  • Publication number: 20220172945
    Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.
    Type: Application
    Filed: February 14, 2022
    Publication date: June 2, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 11340659
    Abstract: An electronic device includes a casing, a stylus, a first magnet, a magnetic ring, and a pair of second magnets. The casing has a surface and an accommodation groove recessed from the surface. The stylus has a front end and a rear end. The first magnet is disposed at one of the front end and the rear end of the stylus, and the magnetic ring is disposed at the other of the front end and the rear end of the stylus. The second magnets are disposed in the casing and located below the accommodation groove, where locations of the first magnet and the magnetic ring correspond to locations of the second magnets.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: May 24, 2022
    Assignee: Acer Incorporated
    Inventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu