Patents by Inventor Yu-Shih Wang
Yu-Shih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230041753Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.Type: ApplicationFiled: October 19, 2022Publication date: February 9, 2023Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 11557512Abstract: In one exemplary aspect, a method comprises providing a semiconductor structure having a substrate, one or more first dielectric layers over the substrate, a first metal plug in the one or more first dielectric layers, and one or more second dielectric layers over the one or more first dielectric layers and the first metal plug. The method further comprises etching a via hole into the one or more second dielectric layers to expose the first metal plug, etching a top surface of the first metal plug to create a recess thereon, and applying a metal corrosion protectant comprising a metal corrosion inhibitor to the top surface of the first metal plug.Type: GrantFiled: December 14, 2020Date of Patent: January 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu Shih Wang, Shian Wei Mao, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 11532446Abstract: A button structure of an input device, including a circuit board, a dome element, and a trigger, is provided. The dome element is disposed on the circuit board, and is electrically conductive and elastic. The trigger is disposed at a center of the dome element, and is electrically insulative and flexible. The trigger has a conductive layer facing the circuit board. The dome element is configured to be pressed to drive the conductive layer of the trigger to abut against a trigger circuit of the circuit board to generate a trigger signal.Type: GrantFiled: May 25, 2021Date of Patent: December 20, 2022Assignee: Acer IncorporatedInventors: Yu-Shih Wang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
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Publication number: 20220392803Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.Type: ApplicationFiled: August 9, 2022Publication date: December 8, 2022Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
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Publication number: 20220375868Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.Type: ApplicationFiled: July 27, 2022Publication date: November 24, 2022Inventors: Cheng-Wei CHANG, Chia-Hung CHU, Kao-Feng LIN, Hsu-Kai CHANG, Shuen-Shin LIANG, Sung-Li WANG, Yi-Ying LIU, Po-Nan YEH, Yu Shih WANG, U-Ting CHIU, Chun-Neng LIN, Ming-Hsi YEH
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Publication number: 20220367254Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.Type: ApplicationFiled: July 22, 2022Publication date: November 17, 2022Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20220367258Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.Type: ApplicationFiled: July 26, 2022Publication date: November 17, 2022Inventors: Po-Nan Yeh, Yu-Shih Wang, Ming-Hsi Yeh
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Publication number: 20220359235Abstract: A method for processing a substrate is provided. The method includes the following operations: placing a substrate over a first injector in a substrate processing apparatus, the substrate having a front surface and a back surface opposite to the front surface, and the front surface having a plurality of concentric regions; adjusting a temperature of each of the plurality of concentric regions by controlling at least one of a flow rate and a temperature associated with a fluid dispensing from the first injector; and rotating the substrate by a spin base disposed below the substrate, the substrate is rotated with respect to a center axis perpendicular to the front surface thereof when adjusting the temperature. The spin base includes a ring opening for rotating relative to the first injector, and the first injector is displaced from a projection of a center of the substrate from a top view perspective.Type: ApplicationFiled: July 21, 2022Publication date: November 10, 2022Inventors: PO-YUAN WANG, TZU ANG CHIANG, JIAN-JOU LIAN, YU SHIH WANG, CHUN-NENG LIN, MING-HSI YEH
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Patent number: 11488859Abstract: In an embodiment, a device includes: a semiconductor substrate; a first inter-layer dielectric (ILD) over the semiconductor substrate; a first conductive feature extending through the first ILD; a first etch stop layer over the first conductive feature and the first ILD, the first etch stop layer being a first dielectric material; a second ILD over the first etch stop layer; a contact having a first portion extending through the second ILD and a second portion extending through the first etch stop layer, the contact being physically and electrically coupled to the first conductive feature; and a first protective layer surrounding the second portion of the contact, the first portion of the contact being free from the first protective layer, the first protective layer being a second dielectric material, the second dielectric material being different from the first dielectric material.Type: GrantFiled: December 27, 2019Date of Patent: November 1, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Po-Nan Yeh, Yu Shih Wang, Ming-Hsi Yeh
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Patent number: 11488857Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.Type: GrantFiled: June 19, 2020Date of Patent: November 1, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yu-Shih Wang, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Chia-Cheng Chen, Liang-Yin Chen, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20220342451Abstract: A portable electronic device including a main display and at least one external display detachable relative to one side of the main display is provided. The external display includes a body, a slider slidably disposed in the body, at least one latch pivoted to the body, and at least one elastic member connected between the slider and the body. The latch has a driving column and a tenon portion opposite to each other, and the driving column is movably connected to the slider, such that when the slider slides relative to the body, the latch is driven to pivot relative to the body, and the tenon portion is rotated out of the body or hidden in body. The tenon portion that is rotated out of the body is inserted into the main display, so that the external display is combined to the main display.Type: ApplicationFiled: March 4, 2022Publication date: October 27, 2022Applicant: Acer IncorporatedInventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai
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Publication number: 20220285209Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.Type: ApplicationFiled: March 5, 2021Publication date: September 8, 2022Inventors: U-Ting Chiu, Po-Nan Yeh, Yu-Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
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Patent number: 11424185Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.Type: GrantFiled: July 31, 2020Date of Patent: August 23, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Cheng-Wei Chang, Chia-Hung Chu, Kao-Feng Lin, Hsu-Kai Chang, Shuen-Shin Liang, Sung-Li Wang, Yi-Ying Liu, Po-Nan Yeh, Yu Shih Wang, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh
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Publication number: 20220236766Abstract: An electronic device assembly is provided, including an electronic device body and a detachable lens module. The electronic device body has a housing and a first joining unit, wherein the first joining unit is disposed on the housing. The detachable lens module is detachably assembled onto the housing and has a second joining unit, wherein the first joining unit is joined to the second joining unit to electrically connect the detachable lens module to the electronic device body.Type: ApplicationFiled: April 12, 2022Publication date: July 28, 2022Applicant: Acer IncorporatedInventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai, Chi-Hung Lai, Wu-Chen Lee, Pin-Chueh Lin, Chih-Wei Liao, Ting-Wen Pai, Wen-Chieh Chen
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Patent number: 11398391Abstract: A substrate processing apparatus is provided. The substrate processing apparatus includes a plurality of holding members and at least a first injector. The plurality of holding members are configured to hold a substrate. The substrate includes a front surface and a back surface opposite to the front surface. The first injector is below the holding members and is configured to face the back surface of the substrate. The first injector is displaced from a projection of a center of the substrate from a top view perspective. A method for processing a substrate is also provided.Type: GrantFiled: May 19, 2020Date of Patent: July 26, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Po-Yuan Wang, Tzu Ang Chiang, Jian-Jou Lian, Yu Shih Wang, Chun-Neng Lin, Ming-Hsi Yeh
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Publication number: 20220206600Abstract: A touch pad structure includes a touch module, a first bracket, a second bracket, and a plurality of linkage rods. The touch module is disposed on the first bracket. The second bracket is surrounding the first bracket and the touch module. A plurality of outer edges of the first bracket faces to a plurality of inner edges of the second bracket respectively. Each of the linkage rods is pivotally connected the outer edge and the inner edge facing to each other, so that the touch module is moved together with the first bracket and relative to the second bracket when the touch module is pressed or released, and the linkage rods have synchronized seesaw motion.Type: ApplicationFiled: March 21, 2022Publication date: June 30, 2022Applicant: Acer IncorporatedInventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu
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Publication number: 20220172945Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.Type: ApplicationFiled: February 14, 2022Publication date: June 2, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
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Patent number: 11340659Abstract: An electronic device includes a casing, a stylus, a first magnet, a magnetic ring, and a pair of second magnets. The casing has a surface and an accommodation groove recessed from the surface. The stylus has a front end and a rear end. The first magnet is disposed at one of the front end and the rear end of the stylus, and the magnetic ring is disposed at the other of the front end and the rear end of the stylus. The second magnets are disposed in the casing and located below the accommodation groove, where locations of the first magnet and the magnetic ring correspond to locations of the second magnets.Type: GrantFiled: August 13, 2020Date of Patent: May 24, 2022Assignee: Acer IncorporatedInventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu
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Patent number: 11334115Abstract: An electronic device assembly is provided, including an electronic device body and a detachable lens module. The electronic device body has a housing and a first joining unit, wherein the first joining unit is disposed on the housing. The detachable lens module is detachably assembled onto the housing and has a second joining unit, wherein the first joining unit is joined to the second joining unit to electrically connect the detachable lens module to the electronic device body.Type: GrantFiled: June 19, 2020Date of Patent: May 17, 2022Assignee: Acer IncorporatedInventors: Yu-Shih Wang, Yi-Ta Huang, Chih-Chun Liu, Cheng-Nan Ling, Wen-Chieh Tai, Chi-Hung Lai, Wu-Chen Lee, Pin-Chueh Lin, Chih-Wei Liao, Ting-Wen Pai, Wen-Chieh Chen
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Patent number: 11314343Abstract: A touch pad structure includes a touch module, a first bracket, a second bracket, and a plurality of linkage rods. The first bracket has a plurality of first pivoting portions, and the touch module is disposed on the first bracket. The second bracket has a plurality of second pivoting portions. Each of the linkage rods is pivotally connected between the first pivoting portion and the second pivoting portion, so that the touch module is moved together with the first bracket when the touch module is pressed. One portion of each of the linkage rods is pivotally rotated at the first pivoting portion, and another portion of each of the linkage rods is pivotally rotated and moved at the second pivoting portion, so that the touch module and the first bracket are moved toward a plane where the second bracket is located.Type: GrantFiled: January 14, 2021Date of Patent: April 26, 2022Assignee: Acer IncorporatedInventors: Yu-Shih Wang, Wen-Chieh Tai, Cheng-Nan Ling, Chih-Chun Liu