Patents by Inventor Yu Yuan

Yu Yuan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12272679
    Abstract: A display panel and a manufacturing method thereof are provided. The display panel includes a circuit substrate and a plurality of micro light-emitting diode structures. The micro light-emitting diode structures each include a micro light-emitting chip and a molding structure. The micro light-emitting chip is electrically bonded to the circuit substrate, and includes a first surface, a second surface, and a peripheral surface. The first surface is located on a side of the micro light-emitting chip facing the circuit substrate. The second surface is disposed opposite to the first surface. The peripheral surface connects the first surface and the second surface. The molding structure surrounds the peripheral surface and encloses the second surface of the micro light-emitting chip. The molding structure extends in a direction away from the circuit substrate and forms an inner side wall. The inner side wall and the second surface constitute an accommodating portion.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: April 8, 2025
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Shiang-Ning Yang, Sheng-Yuan Sun, Loganathan Murugan, Yu-Yun Lo, Bo-Wei Wu
  • Publication number: 20250110662
    Abstract: A computer vision processing system is provided. The system includes one or more target devices and a processing unit. The target devices are configured to run the executable code of an image processing pipeline. The processing unit is configured to receive a series of application programming interface (API) calls and create a raw graph accordingly, redraw the raw graph into a compilable graph by sequentially processing each node, and compile the compilable graph into the executable code of the image processing pipeline. The series of API calls includes at least one tiling API call to set at least one of the nodes and at least one of the data objects as tileable. Each tileable node corresponds to multiple parallel processing nodes in multiple branches in the compilable graph, and each tileable data object corresponds to multiple tile data objects in the branches in the compilable graph.
    Type: Application
    Filed: September 20, 2024
    Publication date: April 3, 2025
    Inventors: Po-Yuan JENG, Hung-Chun LIU, Yu-Chieh LIN, Chien-Han SU, Yung-Chih CHIU, Lei CHEN
  • Publication number: 20250110291
    Abstract: Provided are a package structure and a method of forming the same. The package structure includes a bottom package having a first sidewall and a second sidewall opposite to each other; a hybrid path layer disposed on the bottom package, wherein the hybrid path layer comprises an optical path layer and an electrical path layer, and at least one optical path of the optical path layer extends from the first sidewall of the bottom package beyond a center of the bottom package; and a plurality of dies bonded onto the hybrid path layer.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 3, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Ming Weng, Yu-Hao Chen, Hao-Yi Tsai, An-Jhih Su, Tzuan-Horng Liu, Po-Yuan Teng, Tsung-Yuan Yu, Che-Hsiang Hsu
  • Patent number: 12265774
    Abstract: Boundary cells may be provided. A boundary of a first functional cell of a circuit is determined. A first plurality of a first type of dummy cells are placed along a first portion of the determined boundary. The first portion extends in a first direction. Each of the first type of dummy cells comprises first pre-defined dimensions. A second plurality of a second type of dummy cells are placed along a second portion of the determined boundary. The second portion extends in a second direction. Each of the second type of dummy cells comprises second pre-defined dimensions. The second pre-defined dimensions is different than the first pre-defined dimensions.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Jung Chang, Min-Yuan Tsai, Wen-Ju Yang
  • Patent number: 12266566
    Abstract: A method includes forming a first conductive feature on a substrate, forming a via that contacts the first conductive feature, the via comprising a conductive material, performing a Chemical Mechanical Polishing (CMP) process to a top surface of the via, depositing an Interlayer Dielectric (ILD) layer on the via, forming a trench within the ILD layer to expose the via, and filling the trench with a second conductive feature that contacts the via, the second conductive feature comprising a same material as the conductive material.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Yuan Chen, Shih-Chuan Chiu, Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin
  • Publication number: 20250105084
    Abstract: A method includes forming a dummy component, including: forming through-substrate vias (TSVs) in a substrate; forming a thermal structure over the TSVs, wherein the thermal structure includes metal lines in dielectric layers; forming a bonding layer over the thermal structure; and forming bond pads within the bonding layer; bonding the dummy component to a package component; and bonding a semiconductor die to the package component.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 27, 2025
    Inventors: Yu-Chia Lai, Chen-Shien Chen, Ting Hao Kuo, Jen-Yuan Chang
  • Publication number: 20250105509
    Abstract: An antenna system includes: a first group of MIMO antennas including a first dual-band antenna arranged at first corner of the base, a second dual-band antenna arranged on a first side of the base, a first single band antenna arranged at a second corner of the base, a second single band antenna parallel to the base; a second group of MIMO antennas including a third single band antenna vertically arranged in a third corner of the base, a fourth single band antenna arranged at a fourth corner of the base, a fifth single band antenna in planar structure, a sixth single band antenna arranged between the first single band antenna and the third single band antenna; a first isolation component arranged between the second dual-band antenna and the fifth single band antenna; a second isolation component arranged between the second single band antenna and the sixth single band antenna.
    Type: Application
    Filed: April 19, 2024
    Publication date: March 27, 2025
    Inventors: YU-YUAN GUO, CHUN-CHIEH CHANG
  • Publication number: 20250098449
    Abstract: A display substrate and a display apparatus are provided. In the display substrate, the pixel definition layer defines opening regions of a plurality of sub-pixels; two adjacent sub-pixels are respectively an upper sub-pixel and a lower sub-pixel; the first electrode of the upper sub-pixel has a first edge close to the lower sub-pixel and a second edge intersecting with the first edge; the opening region of the upper sub-pixel has a first edge close to the lower sub-pixel and a second edge intersecting with the first edge; the distance between the first edge of the first electrode of the upper sub-pixel and the first edge of the opening region of the upper sub-pixel is greater than the distance between the second edge of the first electrode of the upper sub-pixel and the second edge of the opening region of the upper sub-pixel.
    Type: Application
    Filed: April 29, 2022
    Publication date: March 20, 2025
    Inventors: Can YUAN, Yongqian LI, Dacheng ZHANG, Bin ZHOU, Yu WANG, Xinxin WANG, Ning LIU
  • Publication number: 20250096203
    Abstract: A manufacturing method of a semiconductor package includes the following steps. A first lower semiconductor device and a second lower semiconductor device are provided. A plurality of first conductive pillars are formed on the first lower semiconductor device along a first direction parallel to a side of the first lower semiconductor device. A plurality of second conductive pillars are formed on the second lower semiconductor device along a second direction parallel to a side of the second lower semiconductor device, wherein the first direction is substantially collinear with the second direction. An upper semiconductor device is disposed on the first lower semiconductor device and the second lower semiconductor device and revealing a portion where the plurality of first conductive pillars and the plurality of second conductive pillars are disposed.
    Type: Application
    Filed: November 7, 2024
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Kang Hsieh, Hung-Yi Kuo, Hao-Yi Tsai, Kuo-Lung Pan, Ting Hao Kuo, Yu-Chia Lai, Mao-Yen Chang, Po-Yuan Teng, Shu-Rong Chun
  • Publication number: 20250097444
    Abstract: A method of decoding video data performed by an electronic device is provided. The method receives the video data and determines a block unit from a current frame included in the video data. The method determines an extrapolation merge list of the block unit. The extrapolation merge list includes multiple extrapolation merge candidates. The method selects an extrapolation reference candidate from the extrapolation merge candidates for the block unit. Each of the extrapolation merge candidates includes multiple previous extrapolation parameters used to reconstruct a corresponding one of multiple extrapolation-reconstructed blocks. The extrapolation reference candidate is one of the extrapolation merge candidates. The method then determines an extrapolation prediction filter of the block unit based on the extrapolation reference candidate, and reconstructs the block unit based on the extrapolation prediction filter.
    Type: Application
    Filed: September 13, 2024
    Publication date: March 20, 2025
    Inventors: CHIH-YUAN CHEN, Yu-Chiao Yang
  • Publication number: 20250098416
    Abstract: A display substrate and a display apparatus are provided. In the display substrate, the light emitting device includes a common electrode connected to a common voltage terminal. The display unit includes an auxiliary electrode line, a first auxiliary electrode and an auxiliary insulation layer. The auxiliary electrode line includes a longitudinal portion located in the display region and a transverse portion at least partially located in the non-light-emitting region, and the transverse portion is connected with the longitudinal portion; the first auxiliary electrode is located in the non-luminous region and electrically connected with the common electrode; the auxiliary insulation layer includes a first auxiliary via hole located in the non-light emitting region and exposing at least part of the lateral portion, and the first auxiliary electrode is connected with the lateral portion through the first auxiliary via hole.
    Type: Application
    Filed: April 29, 2022
    Publication date: March 20, 2025
    Inventors: Can YUAN, Yongqian LI, Yu WANG, Dacheng ZHANG, Xinxin WANG, Bin ZHOU, Ning LIU
  • Patent number: 12253409
    Abstract: A light sensing method having a sensing order adjusting mechanism is provided. The method includes steps of: in a previous sensing cycle, sensing a first light signal that is emitted by both of an ambient light source and a light-emitting component and then is reflected by a tested object; in the previous sensing cycle, sensing a second light signal that is emitted by both of the ambient light source and the light-emitting component and then is reflected by the tested object; in the previous sensing cycle, sensing an ambient light signal emitted by only the ambient light source; and in a next sensing cycle, sensing the first light signal, the second light signal and the ambient light signal in an order different from that in the previous sensing cycle.
    Type: Grant
    Filed: September 22, 2022
    Date of Patent: March 18, 2025
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Yu-Yu Chen, Jia-Hua Hong, Chih-Yuan Chen
  • Publication number: 20250085470
    Abstract: A light module includes a light guide plate, a first light source and a second light source. The light guide plate has an inner light emitting surface, an outer light emitting surface opposite to the inner light emitting surface, and a light incident surface connecting the inner light emitting surface and the outer light emitting surface. The first light source is disposed on the light incident surface and located between the inner light emitting surface and the outer light emitting surface, and the first light source emits light of a first color temperature. The second light source is disposed on the light incident surface and located between the first light source and the inner light emitting surface, and the second light source emits light of a second color temperature, and the difference between the first color temperature and the second color temperature is greater than 2000K.
    Type: Application
    Filed: August 2, 2024
    Publication date: March 13, 2025
    Inventors: Jen-Yuan CHI, Yu-Nan PAO, Chia Feng HO
  • Publication number: 20250082580
    Abstract: A bilayer controlled-release oral formulation comprises a first composition as an immediate release layer, and a second composition as a controlled-release layer. The first composition includes a xanthine derivative. The second composition includes a xanthine derivative and an enteric excipient. The in vitro dissolution of the second composition releases less than 35% by weight of the xanthine derivative in the second composition within 90 minutes, and the in vitro dissolution of the second composition releases 50% by weight or more of the xanthine derivative in the second composition within 3 hours.
    Type: Application
    Filed: July 30, 2021
    Publication date: March 13, 2025
    Applicant: PANION & BF BIOTECH INC.
    Inventors: Jwey Yuan Chuang, Yu De Su, Shao Chuan Lu
  • Publication number: 20250085562
    Abstract: A three-dimensional reflective display device includes a reflective display panel, a lens array disposed on the reflective display panel, and a front light module disposed on the lens array. The reflective display panel includes pixel structures, and each pixel structure includes a left-eye pixel and a right-eye pixel. The lens array includes lenticular lenses extending in a first direction and arranged in a second direction perpendicular to the first direction. The lenticular lenses are respectively corresponding to the pixel structures. The front light module includes two front light components. The two front light components both include a light guide plate and a light source disposed on a light incident surface of the light guide plate, where the light incident surfaces face to each other in the second direction.
    Type: Application
    Filed: September 5, 2024
    Publication date: March 13, 2025
    Inventors: Shin-Bo LIN, Jen-Yuan CHI, Yu-Nan PAO, Chia-Ming HSIEH, Sheng-Wei CHEN, Chi-Mao HUNG
  • Publication number: 20250087601
    Abstract: An electronic package is provided in which an electronic module and a heat dissipation structure combined with the electronic module are disposed on a carrier structure, and at least one adjustment structure is coupled with the heat dissipation structure and located around the electronic module. Therefore, the adjustment structure disperses thermal stress to avoid warpage of the electronic module.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 13, 2025
    Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Yu-Po WANG, Po-Yuan SU
  • Publication number: 20250089492
    Abstract: A display substrate, a method for operating the same, and a display apparatus are provided. In the display substrate, the scanning signal line extends along the first direction, passes through the non-light-emitting region and the display region; the longitudinal signal line is in the display region and extends along a second direction; the scanning signal line includes an outer ring portion, and the outer ring portion includes a first conductive line and a second conductive line. The second conductive line is spaced from the first conductive line in the second direction, both the first conductive line and the second conductive line extend along the first direction, extend from the non-light-emitting region to the display region, and overlap with the longitudinal signal line; the scanning signal line includes a trunk portion extending along the first direction, and electrically connected with both the first conductive line and the second conductive line.
    Type: Application
    Filed: April 29, 2022
    Publication date: March 13, 2025
    Inventors: Can YUAN, Yongqian LI, Xinxin WANG, Ning LIU, Bin ZHOU, Dacheng ZHANG, Yu WANG
  • Publication number: 20250085590
    Abstract: A backlight module includes a light-emitting substrate, at least one chip-on-film and a backplane. The light-emitting substrate includes a signal line group and a plurality of light-emitting units, and the plurality of light-emitting units are electrically connected to the signal line group. The at least one chip-on-film is arranged on a non-light exit side of the light-emitting substrate, and electrically connected to the signal line group. The backplane is disposed on the non-light exit side of the light-emitting substrate, and the at least one chip-on-film is located between the backplane and the light-emitting substrate. The backplane is provided with a groove therein, a notch of the groove faces the light-emitting substrate, and at least portion of a chip-on-film film of the at least one chip-on-film is disposed in the groove.
    Type: Application
    Filed: February 20, 2023
    Publication date: March 13, 2025
    Applicants: Chongqing BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yu WANG, Wencheng LUO, Meilong HU, Jinhong ZHANG, Wenqi QUAN, Wei RAN, Zhi LI, Hening ZHANG, Bowen XIONG, Qiong YUAN, Xin CEN, Ke LIAO, Yiming CHENG
  • Publication number: 20250085863
    Abstract: A processing device, operatively coupled with a memory device, receives a request to perform a programming operation on a first set of cells addressable by a first wordline of a first die of the memory device. The processing device identifies a programming order associated with the first wordline. The processing device adjusts, based on the programming order, a biasing scheme associated with the first wordline. The processing device further performs, using the programming order and biasing scheme, the programming operation on the first set of cells addressable by the first wordline.
    Type: Application
    Filed: July 22, 2024
    Publication date: March 13, 2025
    Inventors: Yu-Chung Lien, Huai-Yuan Tseng, Tomer Tzvi Eliash, Zhenming Zhou
  • Publication number: 20250087899
    Abstract: An antenna system, installed on a base, includes: a first group of MIMO antennas, including multiple first MIMO antennas, and each first MIMO antenna is provide with a grounding structure and a fence like structure perpendicular to the base; a second group of MIMO antennas, comprising multiple second MIMO antennas, and each second MIMO antenna is a planar structure, arranged on a substrate, and the substrate is fixed to the base through a support column and the substrate is parallel to the base; a third group of MIMO antennas, comprising multiple third MIMO antennas, and each third MIMO antenna includes a dielectric structure and a wire structure perpendicular to the base, and the wire structure excites the dielectric structure; an AUX antenna, provided with a T-shaped slot parallel to the base.
    Type: Application
    Filed: April 25, 2024
    Publication date: March 13, 2025
    Inventors: JIN Hao, Yu-Yuan Guo, Kai-Hao Chen, Liang-Hsien Hung