Patents by Inventor Yuan Chen

Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240202881
    Abstract: An image processing method is provided. The method includes a first MCNR stage and a second MCNR stage. The first MCNR stage includes blending the current frame with either a cached image or a long-term reference image to obtain a fused image. The cached image is loaded from the buffer unit, and the long-term reference image is derived from the static region of each input frame in a sequence of input frames. The second MCNR stage includes blending the fused image with the other of the cached image or the long-term reference image to obtain an output image.
    Type: Application
    Filed: December 15, 2023
    Publication date: June 20, 2024
    Inventors: Yuan-Chen CHENG, Hao-Tien CHIANG, Tai-Hsiang HUANG, Ying-Jui CHEN, Chi-Cheng JU
  • Publication number: 20240204046
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Application
    Filed: February 29, 2024
    Publication date: June 20, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
  • Publication number: 20240204786
    Abstract: A wireless communication device includes a receiver circuit, a phase shift control circuit, and a digital phase-locked loop (DPLL) circuit. The receiver circuit includes a down-converter circuit that is used to apply down-conversion to an input signal according to a local oscillator (LO) signal. The phase shift control circuit is used to generate a phase shift signal. The DPLL circuit is used to generate the LO signal locked to an initial frequency under a frequency-lock state. In response to the phase shift signal, the DPLL circuit is further used to make the LO signal have a different frequency without leaving the frequency-lock state.
    Type: Application
    Filed: August 1, 2023
    Publication date: June 20, 2024
    Applicant: Airoha Technology Corp.
    Inventors: Chun-Yuan Huang, Chin-Chang Chang, Jeng-Hong Chen, Yun-Xuan Zhang
  • Publication number: 20240203997
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Application
    Filed: March 4, 2024
    Publication date: June 20, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Publication number: 20240204016
    Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.
    Type: Application
    Filed: February 29, 2024
    Publication date: June 20, 2024
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Hsiao-Hui Tseng, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Wei Chuang Wu, Yen-Ting Chiang, Chia Ching Liao, Yen-Yu Chen
  • Publication number: 20240203472
    Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Inventors: Fa-Shen Jiang, Hsia-Wei Chen, Hsun-Chung Kuang, Hai-Dang Trinh, Cheng-Yuan Tsai
  • Publication number: 20240197803
    Abstract: A method for treating psoriasis is provided, including administering a pharmaceutical composition to a subject suffering from psoriasis, wherein the pharmaceutical composition comprises an effective amount of mangosteen fruit shell extract, the mangosteen fruit shell is outer shell of the mangosteen fruit shell and/or inner shell of the mangosteen fruit shell, and the pharmaceutical composition is an external preparation.
    Type: Application
    Filed: November 5, 2021
    Publication date: June 20, 2024
    Applicant: Xantho Biotechnology Co., LTD
    Inventors: Huan-Yuan CHEN, Shih-Yin CHEN, I-Pin CHUANG, Ku-Cheng CHEN, Yen-Ju CHEN
  • Publication number: 20240198455
    Abstract: In some embodiments, the present disclosure relates to a method of trimming an annular portion of a wafer. The method includes aligning the wafer over a wafer chuck. The method uses a rotating blade having a first rotational speed to remove the annular portion from an upper surface of the wafer. While the rotating blade is removing the annular portion of the upper surface of the wafer, measuring a parameter of the wafer at a position adjacent to the rotating blade. Lastly, the method involves changing the first rotation speed of the rotating blade to a second rotational speed when the parameter is greater than a predetermined threshold.
    Type: Application
    Filed: February 28, 2024
    Publication date: June 20, 2024
    Inventors: Kuo-Ming Wu, Yung-Lung Lin, Hau-Yi Hsiao, Sheng-Chau Chen, Cheng-Yuan Tsai
  • Publication number: 20240198179
    Abstract: A cycling sport training suggestion system (10) includes a sport real-time analysis module (102), a cyclist information module (104), a route feature module (106) and a sport role data base (108). The cyclist information module (104) transmits a cyclist real-time sense information (110) to the sport real-time analysis module (102). The route feature module (106) transmits a route feature information (112) to the sport real-time analysis module (102). The sport role data base (108) transmits a cyclist historical sport information (114) and a perfect cyclist sport information (116) to the sport real-time analysis module (102). The sport real-time analysis module (102) integrates and analyzes the cyclist real-time sense information (110), the route feature information (112), the cyclist historical sport information (114) and the perfect cyclist sport information (116) to generate a cycling sport training suggestion signal (118).
    Type: Application
    Filed: March 25, 2023
    Publication date: June 20, 2024
    Inventors: Chien-Yuan CHEN, Chun-Cheng CHEN, Shao-Hong YANG, Jen-Sheng TSAI
  • Publication number: 20240198180
    Abstract: A training course recommendation device and a training course recommendation method are provided. The training course recommendation device includes a course database, a rider database, and a course recommendation processing module. The course database is configured to store a plurality of riding training courses. The rider database is configured to store rider characteristic data and riding sensing data. The course recommendation processing module is configured to analyze the rider characteristic data and the riding sensing data to obtain a user riding characteristic vector, compare the user riding characteristic vector and a course characteristic vector of each of the plurality of riding training courses to obtain a plurality of matching values of the plurality of riding training courses, and set at least one recommendation course from the plurality of riding training courses according to the matching value(s) which is(are) greater than a threshold.
    Type: Application
    Filed: March 25, 2023
    Publication date: June 20, 2024
    Inventors: Chien-Yuan CHEN, Chun-Cheng CHEN, Shao-Hong YANG, Jen-Sheng TSAI
  • Publication number: 20240195082
    Abstract: An antenna structure includes a ground element, a feeding radiation element, a first radiation element, a second radiation element, a shorting radiation element, a third radiation element, and a fourth radiation element. The feeding radiation element has a feeding point. The first radiation element is coupled to the feeding radiation element. The second radiation element is coupled to the feeding radiation element. The second radiation element and the first radiation element substantially extend in opposite directions. The feeding radiation element is further coupled through the shorting radiation element to the ground element. The third radiation element is coupled to the ground element. The third radiation element is adjacent to the first radiation element. The fourth radiation element is coupled to the ground element. The fourth radiation element is adjacent to the second radiation element.
    Type: Application
    Filed: January 12, 2023
    Publication date: June 13, 2024
    Inventors: Yi-Chih LO, Chung-Ting HUNG, Chun-Yuan WANG, Chun-I CHEN, Jing-Yao XU, Yan-Cheng HUANG, Chu-Yu TANG
  • Publication number: 20240192761
    Abstract: A sampler circuit for use with a serial communication bus includes an amplifier circuit, an isolation circuit, and a latch circuit. During a first phase, the amplifier circuit amplifies a voltage difference between a first input signal and a second input signal received via the communication bus to generate a voltage difference on output nodes of the latch circuit. During an integration phase, the latch circuit increases the voltage difference on the output nodes. During a regeneration phase, the isolation circuit isolates the amplifier circuit from the latch circuit, which generates full-rail signals based on a voltage difference between the output nodes.
    Type: Application
    Filed: December 12, 2022
    Publication date: June 13, 2024
    Inventors: Yudong Zhang, Ming-Shuan Chen, Chen-Yuan Wen, Sanjeev K. Maheshwari
  • Publication number: 20240192538
    Abstract: A display apparatus having a privacy mode and a sharing mode is provided. The display apparatus includes a display panel, a privacy liquid crystal module, and a touch sensing module. The touch sensing module is disposed on a side of the privacy liquid crystal module and is configured to generate a touch signal. When the display apparatus is in the privacy mode, the privacy liquid crystal module is applied with a first voltage. When the display apparatus is in the sharing mode and the touch sensing module generates the touch signal, the privacy liquid crystal module is applied with a second voltage for a predetermined time. After maintaining for the predetermined time, a third voltage is applied to the privacy liquid crystal module. The display apparatus can effectively reduce a smear phenomenon caused by the display apparatus being touched in a sharing mode.
    Type: Application
    Filed: December 3, 2023
    Publication date: June 13, 2024
    Applicant: Coretronic Corporation
    Inventors: Chih-Hsuan Kuo, Ming-Hsiung Fan, Yi-Cheng Lin, Chin-Lung Chen, Cheng-Wei Zhu, Chin-Yuan Chang
  • Publication number: 20240192576
    Abstract: A camera module suited for assembled in a casing is provided. The camera module includes a camera and a switch cover. The camera is disposed in the casing and aligned with a camera hole of the casing. The switch cover is slidably disposed in the casing, wherein the switch cover includes a sliding member and a shielding member secured to the sliding member, and a thickness of the shielding member is less than a thickness of the sliding member. The camera hole is seated on a sliding path of the shielding member. The shielding member is suited for blocking between the camera and the camera hole or moving out between the camera and the camera hole. An electronic device is also provided.
    Type: Application
    Filed: August 13, 2023
    Publication date: June 13, 2024
    Applicant: Acer Incorporated
    Inventors: Yu-Chin Huang, Cheng-Mao Chang, Li-Hua Hu, Pao-Min Huang, Chien-Yuan Chen
  • Publication number: 20240191719
    Abstract: A ceiling fan including a fan device and a remote control is provided. The fan device includes a motor and a control unit. The remote control includes a gesture sensing unit and a processing unit. The gesture sensing unit includes a sensing module that is configured to obtain a sense image of an object, and includes a storage medium that stores a plurality of data sets and different reference tracks that respectively correspond to the data sets. The processing unit is configured to: obtain a movement track of the object; obtain a corresponding one of the data sets when the movement track conforms with one of the reference tracks; and output a command that is related to said corresponding one of the data sets to the control unit. In response to receipt of the command, the control unit adjusts rotational speed of the motor according to the command.
    Type: Application
    Filed: April 11, 2023
    Publication date: June 13, 2024
    Applicant: HOTECK INC.
    Inventors: Te-Yi CHEN, Chia-Wei CHANG, Min-Yuan HSIAO
  • Publication number: 20240193787
    Abstract: Techniques for skin-condition visualization using machine learning. A color image depicting facial skin of a subject is retrieved. A monochromatic version of the color image is generated. Candidate instances of one or more skin conditions are segmented from the monochromatic version based on a segmentation threshold and using a machine learning model. A polarized version of the color image is generated, and based on the polarized version, the candidate instances are filtered. One or more simulation images are generated based on the filtered candidate instances.
    Type: Application
    Filed: December 13, 2022
    Publication date: June 13, 2024
    Inventors: Yuan Yuan DING, Yi Chen ZHONG, Jing ZHANG, Yang LIU, Ziyi JIANG, Ting Ting CAO
  • Publication number: 20240194633
    Abstract: A die bonding tool includes a bond head that secures a semiconductor die against a planar surface of the bond head, an actuator system that moves the bond head and the semiconductor die towards a surface of a target substrate, and at least one contact sensor configured to detect an initial contact between a first region of the semiconductor die and the surface of the target substrate, where in response to detecting the initial contact between the semiconductor die and the target substrate, the actuator tilts the planar surface of the bond head and the semiconductor die to bring a second region of the semiconductor die into contact with the surface of the target substrate and thereby provide improved contact between the semiconductor die and the target substrate and more effective bonding including instances where the planar surface of the bond head and the target substrate surface are not parallel.
    Type: Application
    Filed: March 23, 2023
    Publication date: June 13, 2024
    Inventors: Amram Eitan, Hui-Ting Lin, Chien-Hung Chen, Chih-Yuan Chiu, Kai Jun Zhan
  • Patent number: 12007639
    Abstract: A system such as a vehicle, building, or electronic device system may have a support structure with one or more windows. The support structure and window may separate an interior region within the system from a surrounding exterior region. Control circuitry may receive input such as user input and may adjust an adjustable layer in the window based on the input. The adjustable layer may have a polymer matrix layer with embedded cells. The cells may include intermixed guest-host liquid crystal cells and liquid crystal cells. The guest-host liquid crystal cells and liquid crystal cells may have different liquid crystal materials and/or different sizes that allow the guest-host liquid crystal cells and liquid crystal cells to electrically switch states at different respective threshold voltages. Based on the user input or other input the control circuitry can adjust a drive signal across the adjustable layer to change light transmittance and haze.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: June 11, 2024
    Assignee: Apple Inc.
    Inventors: Yuan Chen, Donald R. Monroe, Peter F. Masschelein, Stephen B. Lynch, Xiaokai Li, Zhibing Ge
  • Patent number: 12009291
    Abstract: The present disclosure provides an electronic device including a substrate, an extending element, a conductive element and a first insulating layer. The substrate includes an edge. The extending element is disposed on the substrate and includes a first conductive layer and a semiconductor layer, the first conductive layer and the semiconductor layer are overlapped, and the semiconductor layer extends to the edge of the substrate. The conductive element is overlapped with the first conductive layer. The insulating layer is disposed between the conductive element and the extending element.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: June 11, 2024
    Assignee: InnoLux Corporation
    Inventors: Chiu-Yuan Huang, Pei-Chieh Chen, Yu-Ting Liu, Tsung-Yeh Ho
  • Patent number: 12009323
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: June 11, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Yu Wei, Cheng-Yuan Li, Yen-Liang Lin, Kuo-Cheng Lee, Hsun-Ying Huang, Hsin-Chi Chen