Abstract: A micro-electro-mechanical system (MEMS) microphone is provided. The MEMS microphone includes a substrate, a diaphragm, a backplate and a first protrusion. The substrate has an opening portion. The diaphragm is disposed on one side of the substrate and extends across the opening portion of the substrate. The backplate includes a plurality of acoustic holes. The backplate is disposed on one side of the diaphragm. An air gap is formed between the backplate and the diaphragm. The first protrusion extends from the backplate towards the air gap.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: A semiconductor device includes a through-silicon via (TSV) in a TSV zone in a substrate and the TSV extends through the substrate; an ESD cell proximal to a first end of the TSV and in contact with the TSV zone, the ESD cell including a set of diodes electrically connected in parallel to each other; an antenna pad electrically connected to a second end of the TSV; and an antenna electrically connected to the antenna pad and extending in a first direction, the first direction is parallel to a major axis of the TSV. The semiconductor device includes a conductive pillar extending parallel to the TSV at a same side of the substrate as the antenna pad, wherein a first end of the conductive pillar electrically connects to the antenna pad, and a second end of the conductive pillar electrically connects to the set of diodes of the ESD cell.

Abstract: The present disclosure relates to a semiconductor device having a backside source/drain contact, and method for forming the device. The semiconductor device includes a source/drain feature having a top surface and a bottom surface, a first silicide layer formed in contact with the top surface of the source/drain feature, a first conductive feature formed on the first silicide layer, and a second conductive feature having a body portion and a first sidewall portion extending from the body portion, wherein the body portion is below the bottom surface of the source/drain feature, and the first sidewall portion is in contact with the first conductive feature.

Abstract: A device for simulating carbon dioxide storage in a deep saline aquifer, including a CO2 gas source, first and second valves, first and second pressure pumps, first, second and third pressure gauges, a water storage tank, a simulation box, a first flow meter, a gas-liquid separator, a recycling tank, a microcomputer-display assembly, a structure plate, core holders, an injection pipeline, a connection pipeline, a baffle, a piezometer, a second flow meter, a heater, a lifter and an acoustic logging tool. The CO2 gas source, the first valve, the first pressure pump and the first pressure gauge for gas injection. The water storage tank, a second pressure pump and a second pressure gauge for water injection. The second valve, the third pressure gauge, the first flow meter, the gas-liquid separator and the recycling tank form an output pipeline.

Abstract: A method of making a semiconductor device includes forming a circuit layer over a substrate. The method further includes depositing an insulator over the substrate. The method further includes patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the first trench is on a portion of the substrate exposed by the circuit layer. The method further includes filling the test line trench to define a test line electrically connected to the circuit layer. The method further includes filling the first trench and the second trench to define a capacitor.

Abstract: Translating applications to a target language includes extracting program integrated information (PII) to be translated and creating translation context datasets based on interpretation of accessibility information associated with particular strings of PII. Translation pairs include PII and corresponding context datasets for context-based translation of application components. A two-stage index contains PII strings for first stage lookup and context datasets for distinguishing duplicate PII strings as a second stage lookup. Real-time translation is facilitated by the two-stage index, which is established by translation pairs and resulting translations.

Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.

Abstract: A memory device includes a memory bank with a memory cell connected to a local bit line and a word line. A first local data latch is connected to the local bit line and has an enable terminal configured to receive a first local clock signal. A word line latch is configured to latch a word line select signal, and has an enable terminal configured to receive a second local clock signal. A first global data latch is connected to the first local data latch by a global bit line, and the first global data latch has an enable terminal configured to receive a global clock signal. A global address latch is connected to the word line latch and has an enable terminal configured to receive the global clock signal. A bank select latch is configured to latch a bank select signal, and has an enable terminal configured to receive the second local clock signal.

Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.

Abstract: An electronic device and a method for protecting an equipment from voltage surge damage are provided. The method includes: electrically connecting an input terminal of a one-way pass circuit to a first equipment and electrically connecting an output terminal of the one-way pass circuit to a second equipment; electrically connecting an over-voltage check circuit to the output terminal and a regenerative resistor circuit, wherein the regenerative resistor circuit includes a resistor; detecting, by the over-voltage check circuit, a voltage of the output terminal; and electrically, by the over-voltage check circuit, connecting the output terminal to the resistor in response to the voltage being greater than a voltage threshold.

Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.

Abstract: The present disclosure relates generally to systems and methods for providing sets of compatible firmware versions (e.g., cross-compatibility solution) for flashing (e.g., programming or re-programming) different devices of a network of devices (e.g., an industrial automation system) when using a flashing application. Providing the compatible firmware versions of such network of devices may facilitate flashing the devices with compatible firmware, based on a topology of the network of devices, to prevent functional errors in the network of devices. The present systems and methods may also be applicable to determining and providing cross-compatibility solution between different firmware, as well as software, used by different devices of a network of devices.

Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.

Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.

Abstract: An electronic device includes a pair of depletion gates, an accumulation gate, and a conductive resonator. The depletion gates are spaced apart from each other. The accumulation gate is over the depletion gates. The conductive resonator is over the depletion gates and the accumulation gate. The conductive resonator includes a first portion, a second portion, and a third portion. The first portion and the second portion are on opposite sides of the accumulation gate. The third portion interconnects the first and second portions of the conductive resonator and across the depletion gates. A bottom surface of the first portion of the conductive resonator is lower than a bottom surface of the accumulation gate.

Abstract: A method for manufacturing and packaging a special-shaped cigarette includes the following steps: designing inner packaging case paper capable of being folded into a special-shaped cigarette accommodating cavity; folding the inner packaging case paper to form the special-shaped cigarette accommodating cavity; filling an interior of the special-shaped cigarette accommodating cavity with an ordinary cigarette; and shelving for a certain period of time, so that a cross section of the ordinary cigarette changes from a circle to a special shape, and the ordinary cigarette is accommodated in the special-shaped cigarette accommodating cavity. A diameter of an inscribed circle of the special-shaped cigarette accommodating cavity is less than a diameter of the ordinary cigarette, and a material of the inner packaging case paper is a paperboard or a food grade PVC sheet.

Abstract: Disclosed are a red light and near-infrared light-emitting material and a preparation method thereof, and a light-emitting device including the light-emitting material. The red light and near-infrared light-emitting material contains a compound represented by a molecular formula, aSc2O3·Ga2O3·bR2O3, wherein the element R includes one or two of Cr, Ni, Fe, Yb, Nd or Er; 0.001?a?0.6; and 0.001?b?0.1. The light-emitting material can be excited by a spectrum having a wide wavelength range (ultraviolet light or purple light or blue light) to emit light with a wide spectrum of 650 nm to 1700 nm or multiple spectra, thus having higher light-emitting intensity.

Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.