Abstract: The present invention relates to a preparation method for an olefin epoxidation catalyst, comprising: (1) preparing a titanium-silicon gel; (2) performing pore-enlarging treatment to the titanium-silicon gel by using organic amine or liquid ammonia, and drying, calcinating to obtain a titanium-silicon composite oxide; (3) optionally performing alcohol solution of organic alkali metal salt treatment; and (4) optionally performing gas-phase silanization treatment. The catalyst prepared by the method of the present invention has adjustable variability for pore size, so that the activity thereof for epoxidation reactions of the olefin molecules with different dynamic diameters is higher; the surface acidity of the catalyst can be reduced effectively through two-step modification to the catalyst, so that the catalyst has higher selectivity for epoxidation product.

Abstract: An intelligent ammunition co-evolution task assignment method is disclosed. The method includes the following steps. A chromosome gene encoding of genetic algorithm for ammunition assignment scheme of multi-platform interception operation is performed. A fitness of chromosome individual function in a genetic population is calculated according to a threat degree of an intercepting target in the ammunition assignment scheme and an interception probability of the intercepting target by different ammunition launching platforms. A probability ranking sequence of effective interception of the intercepting target by different ammunition launching platforms is obtained, and a genetic algorithm selection operation is performed on the chromosome individuals according to probability values of effective interception in descending order of priority.

Abstract: Disclosed by the present application is a crystalline form of a capsid protein assembly inhibitor containing an N hetero five-membered ring; specifically disclosed is the crystalline form of the compound of formula I; also comprised is an the application of said crystalline form in the preparation of a drug for preventing or treating diseases benefiting from the inhibition of capsid protein assembly.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The semiconductor structure includes a first semiconductor device and a second semiconductor device. The first semiconductor device includes a first oxide layer formed below the a first substrate, a first bonding layer formed below the first oxide layer, and a first bonding via formed through the first bonding layer and the first oxide layer. The second semiconductor device includes a second oxide layer formed over a second substrate, a second bonding layer formed over the second oxide layer, and a second bonding via formed through the second bonding layer and the second oxide layer. The semiconductor structure also includes a bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.

Abstract: A method for configuring hardware for implementing a Deep Neural Network (DNN) for performing an activation function, the hardware comprising, at an activation module for performing an activation function, a programmable lookup table for storing lookup data approximating the activation function over a first range of input values to the activation module, the method comprising: providing calibration data to a representation of the hardware; monitoring an input to an activation module of the representation of the hardware so as to determine a range of input values to the activation module; generating lookup data for the lookup table representing the activation function over the determined range of input values; and loading the generated lookup data into the lookup table of the hardware, thereby configuring the activation module of the hardware for performing the activation function over the determined range of input values.

Abstract: Systems and methods for utilizing the dead space around the periphery of a chip for sealing a direct liquid cooled module are disclosed. One of the functions of a direct liquid cooled module is to provide cooling liquid to components located on a chip. A groove member for receiving a sealing member may be applied to the top surface of the chip. The groove member may be directly deposited to the top surface or coupled thereto via an adhesive and/or epoxy. The groove member may be in the form of opposing sidewalls or a u-shaped structure each of which form a partial enclosure for receipt of the sealing member. The groove member may be located entirely within the dead space or at least partially within the dead space and partially within a central area in which the chip components are located. The sealing member may be an O-ring or a gasket.

Abstract: A device includes a processor and a non-transitory computer-readable storage medium coupled to the processor. The non-transitory computer-readable storage medium has programming instructions for being executed by the processor. The programming instructions, when executed by the processor, cause the device to receive configuration information sent by an access network side communications apparatus. The configuration information includes identification information of at least one cell. The device is also caused to detect first indication information sent by the access network side communications apparatus by using a length of a first time as a granularity. The first indication information indicates a transmission structure corresponding to one or more time units included in a second time of the at least one cell identified by the identification information. The length of the first time is different from a length of the second time.

Abstract: A gene ZmPLD3 for inducing maize maternal haploid production and its application thereof. Transgenic homozygous mutant plants or their progeny can be obtained by knocking out the ZmPLD3 gene in maize, and maize maternal haploids can be produced by hybridizing them as paternal materials with other maize materials. A series of allelic mutations of the gene having maternal haploid induction function through hybridization were obtained. The experiments showed that the mutation of maize phospholipase PLD3 could lead to the production of maize maternal haploid, which provides new thoughts for revealing the biological role of phospholipase in maize maternal haploid induction process. At the same time, the mutant individuals have the maternal haploid induction ability in maize, which is of great significance for breeding new types of haploid induction lines with high haploid induction rate and improving the efficiency of maize haploid breeding.

Abstract: The present disclosure describes an interconnect structure and a method forming the same. The interconnect structure can include a substrate, a layer of conductive material over the substrate, a metallic capping layer over the layer of conductive material, a layer of insulating material over top and side surfaces of the metallic capping layer, and a layer of trench conductor formed in the layer of insulating material and the metallic capping layer.

Abstract: Provided are a preparation method for a propylene epoxidation catalyst, and a use thereof. During the preparation, an alkoxide solution of a prepared active component and a silica gel support are mixed, then a rotary evaporation treatment is performed on the mixture to remove a low-carbon alcohol to obtain a catalyst precursor, and then the obtained catalyst precursor is subjected to calcination and silylation treatments to obtain the propylene epoxidation catalyst. The catalyst is prepared in a simple process, can be applied to the chemical process of preparing propylene oxide by propylene epoxidation, has high average selectivity to propylene oxide, and has industrial application prospect.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first bonding layer formed below a first substrate, a first bonding via formed through the first oxide layer and the first bonding layer, a first dummy pad formed in the first bonding layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over a second substrate, a second bonding via formed through the second bonding layer, and a second dummy pad formed in the second bonding layer. The semiconductor structure includes a bonding structure between the first substrate and the second substrate, wherein the bonding structure includes the first bonding via bonded to the second bonding via and the first dummy pad bonded to the second dummy pad.

Abstract: A communication method and a communications apparatus, the method including receiving scheduling information from a network device, where the scheduling information is used to indicate at least one uplink subframe, and the scheduling information includes a first indication field and a second indication field, the first indication field is used to indicate whether each of the at least one uplink subframe is applicable to a first mode, and the second indication field is used to indicate whether a first uplink subframe is applicable to a second mode, and when the first indication field indicates that each of the at least one uplink subframe is applicable to the first mode and the second indication field indicates that the first uplink subframe is applicable to the second mode, sending first uplink information in the first uplink subframe by using the second mode.

Abstract: A method, an apparatus, and a device for determining smoke, and a computer-readable storage medium are provided. The method includes: obtaining a video image of a photographed region by using a camera apparatus, where the photographed region is irradiated by a laser with a predetermined wave band emitted by a laser unit, and the camera apparatus is configured with a filter allowing the laser with the predetermined wave band to pass through; determining, based on a plurality of frames of images in the video image, a motion region in the plurality of frames of images; and determining whether the photographed region includes smoke based on a feature of the motion region.

Abstract: This disclosure provides methods and compositions for sample processing, particularly for sequencing applications. Included within this disclosure are bead compositions, such as diverse libraries of beads attached to large numbers of oligonucleotides containing barcodes. Often, the beads provides herein are degradable. For example, they may contain disulfide bonds that are susceptible to reducing agents. The methods provided herein include methods of making libraries of barcoded beads as well as methods of combining the beads with a sample, such as by using a microfluidic device.

Abstract: A device that includes a first die and a package substrate. The package substrate includes a dielectric layer, a plurality of vias formed in the dielectric layer, a first plurality of interconnects formed on a first metal layer of the package substrate, and a second plurality of interconnects formed on a second metal layer of the package substrate. The device includes a first series of first solder interconnects arranged in a first direction, the first series of first solder interconnects configured to provide a first electrical connection; a second series of first solder interconnects arranged in the first direction, the second series of first solder interconnects configured to provide a second electrical connection; a first series of second solder interconnects arranged in a second direction, the first series of second solder interconnects configured to provide the first electrical connection.