Patents by Inventor Yuichi Takenaga

Yuichi Takenaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140273587
    Abstract: A plug includes a plurality of plug contacts arranged in a row and a plug housing. The plurality of plug contacts each include first bending portion and the like. The first bending portions and the like are aligned in a direction where the plurality of plug contacts are arranged. The receptacle includes second metal parts and a receptacle housing. When the plug and the receptacle are mated, the plurality of plug contacts of the plug are brought into contact with the plurality of respective second metal parts of the receptacle. When the plug contacts are brought into contact with the respective second metal parts, each of the second metal parts exerts a resistance force against pull-out of the plug from the receptacle. An auxiliary metal fitting exerts a resistance force with different magnitude from the magnitude of the receptacle contact.
    Type: Application
    Filed: January 24, 2014
    Publication date: September 18, 2014
    Applicant: Japan Aviation Electronics Industry, Ltd.
    Inventors: Yuichi TAKENAGA, Takayuki Nishimura, Hiroaki Obikane
  • Patent number: 8821174
    Abstract: A floating connector has a stationary housing, a movable housing, and a reinforcing member. The reinforcing member is made of a metal plate and is provided with a first plate portion and a second plate portion. The first plate portion is embedded in a guide portion of the stationary housing so as to extend in a depth direction. The second plate portion is embedded in the guide portion so as to extend inward in a width direction from one end in the depth direction of the first plate portion.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: September 2, 2014
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Masaki Kimura, Yuichi Takenaga
  • Patent number: 8664013
    Abstract: In a continuous processing system, a controller of a heat treatment apparatus calculates a weight of each layer from input target film thicknesses of a phosphorous-doped polysilicon film (D-poly film) and an amorphous silicon film (a-Si film), and calculates activation energy of stacked films based on the calculated weight and activation energy. The controller prepares a stacked film model based on the calculated activation energy and a relationship of a temperature of each zone and film thicknesses of the D-poly film and the a-Si film, and calculates an optimum temperature of each zone by using the prepared stacked film model. The controller controls power controllers of heaters to set a temperature in a reaction tube to be the calculated temperature of each zone and forms stacked films on a semiconductor wafer by controlling a pressure adjusting unit, flow rate adjusting units, etc.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: March 4, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Yuichi Takenaga, Yukio Tojo
  • Publication number: 20130256293
    Abstract: In accordance with some embodiments of the present disclosure, a heat treatment system, a heat treatment method, and a program are provided. The heat treatment system includes a heating unit configured to heat an inside of a processing chamber receiving a plurality of objects to be processed, a heat treatment condition storing unit configured to store a heat treatment condition, a power change model storing unit configured to store a model showing a relationship between a temperature change inside the processing chamber and a power change of the heating unit, a changed temperature receiving unit configured to receive information on a change of the temperature inside the processing chamber, a power calculation unit configured to calculate power of the heating unit required at a changed temperature, and a determining unit configured to determine whether the power of the heating unit calculated by the power calculation unit is saturated.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: Tokyo Electron Limited
    Inventors: Yuichi TAKENAGA, Wenling WANG
  • Publication number: 20130260039
    Abstract: According to an embodiment of the present invention, a heat treatment system is provided. The heat treatment system includes a heating unit, a heat treatment condition memory unit, a power change model memory unit, a heat treatment change model memory unit, a heat treatment result reception unit, and an optimal temperature calculation unit. In the heat treatment system, the optimal temperature calculation unit calculates the power of the heating unit at a corresponding temperature based on the model stored in the power change model memory unit and the calculated temperature, and an optimal temperature is a temperature at which a heat treatment result is closest to the targeted heat treatment result within a range in which the calculated power of the heating unit is not saturated.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 3, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yuichi TAKENAGA, Wenling WANG
  • Publication number: 20130260572
    Abstract: In a continuous processing system, a controller of a heat treatment apparatus calculates a weight of each layer from input target film thicknesses of a phosphorous-doped polysilicon film (D-poly film) and an amorphous silicon film (a-Si film), and calculates activation energy of stacked films based on the calculated weight and activation energy. The controller prepares a stacked film model based on the calculated activation energy and a relationship of a temperature of each zone and film thicknesses of the D-poly film and the a-Si film, and calculates an optimum temperature of each zone by using the prepared stacked film model. The controller controls power controllers of heaters to set a temperature in a reaction tube to be the calculated temperature of each zone and forms stacked films on a semiconductor wafer by controlling a pressure adjusting unit, flow rate adjusting units, etc.
    Type: Application
    Filed: March 14, 2013
    Publication date: October 3, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yuichi TAKENAGA, Yukio TOJO
  • Publication number: 20130260328
    Abstract: A controller of a heat treatment apparatus forms a phosphorous-doped polysilicon film (D-poly film) on a semiconductor wafer, and determines whether the D-poly film satisfies a target heat treatment characteristic. When it is determined that the target heat treatment characteristic is not satisfied, the controller calculates a temperature in a reaction tube and flow rates of process gas supply pipes, which satisfy the target heat treatment characteristic, based on a heat treatment characteristic of the D-poly film and a model indicating relationships between changes in the temperature in the reaction tube and the flow rates of the process gas supply pipes, and a change in a heat treatment characteristic. The controller forms the D-poly film on the semiconductor wafer according to heat treatment conditions including the calculated temperature and the calculated flow rates, so as to satisfy the target heat treatment characteristic.
    Type: Application
    Filed: March 13, 2013
    Publication date: October 3, 2013
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Yuichi TAKENAGA, Daisuke KUDO
  • Publication number: 20130017729
    Abstract: A floating connector has a stationary housing, a movable housing, and a reinforcing member. The reinforcing member is made of a metal plate and is provided with a first plate portion and a second plate portion. The first plate portion is embedded in a guide portion of the stationary housing so as to extend in a depth direction. The second plate portion is embedded in the guide portion so as to extend inward in a width direction from one end in the depth direction of the first plate portion.
    Type: Application
    Filed: May 29, 2012
    Publication date: January 17, 2013
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Masaki KIMURA, Yuichi TAKENAGA
  • Patent number: 8354135
    Abstract: There are provided a thermal processing apparatus, a method for regulating a temperature of a thermal processing apparatus, and a program, by which a temperature can be easily regulated. A control part 50 of a thermal processing apparatus 1 controls the apparatus so as to deposit SiO2 films on semiconductor wafers W, and judges whether the SiO2 films satisfy an in-plane uniformity. When the in-plane uniformity is not judged to be satisfied, the control part 50 calculates a temperature of a preheating part 23 by which temperature the in-plane uniformity can be satisfied. The control part 50 controls the apparatus so as to deposit SiO2 films on semiconductor wafers W under process conditions in which the temperature of the preheating part 23 has been varied into the calculated temperature, and the temperature of the preheating parts 23 is regulated.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: January 15, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Yuichi Takenaga, Wenling Wang, Tatsuya Yamaguchi, Masahiko Kaminishi
  • Publication number: 20130012039
    Abstract: Provided is a connector mountable on a board. The connector comprises a plurality of contacts, a housing holding the contacts, and a monitored member attached to the housing. The monitored member comprises a marker portion and an abutment portion brought into abutment with the board when the connector is mounted on the board in a vertical direction. The abutment portion is apart from the marker portion by a predetermined distance in the vertical direction. The height of the housing is indirectly measured by investigating a position of the marker portion.
    Type: Application
    Filed: June 26, 2012
    Publication date: January 10, 2013
    Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Yasuhiro NOSE, Yuichi TAKENAGA
  • Patent number: 8082054
    Abstract: The present invention is a method of optimizing a process recipe of a substrate processing system including: a substrate processing apparatus that performs a film deposition process of a substrate to be processed according to a process recipe; a data processing unit that executes a calculation for optimizing the process recipe; and a host computer; the substrate processing apparatus, the data processing unit, and the host computer being connected to each other through a network.
    Type: Grant
    Filed: April 14, 2010
    Date of Patent: December 20, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Kaname Yamaji, Kiyoshi Suzuki, Yuichi Takenaga
  • Patent number: 8055372
    Abstract: The present invention provides a processing system, a processing method and a program, which can readily control a gas flow rate. A vertical-type heating apparatus 1 includes a plurality of gas supply pipes 16 to 20 each adapted for supplying a processing gas into a reaction vessel 2 configured to contain therein semiconductor wafers W. For the gas supply pipes 16 to 20, flow rate control units 21 to 25 are provided, respectively, for controlling each flow rate. In a control unit 50, processing conditions including the flow rate of the processing gas and a film thickness-flow rate-relationship model indicative of a relationship between the flow rate of the processing gas and a film thickness, are stored.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: November 8, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Yuki Kataoka, Tatsuya Yamaguchi, Wenling Wang, Yuichi Takenaga
  • Patent number: 7953512
    Abstract: The present invention provides a substrate processing system, a control method for a substrate processing apparatus, and a program for the system and/or method, each of which is intended to achieve effective control for a film-forming amount on processed substrates. The substrate processing system includes a substrate processing unit adapted for forming a film on each of the plurality of substrates; a pattern obtaining unit adapted for obtaining information about an arrangement pattern concerning arrangement of unprocessed substrates and processed substrates among the plurality of substrates; and a memory unit adapted for storing therein an arrangement/film-forming-amount model indicative of influence exerted on the film-forming amount on the substrates by the arrangement of the unprocessed substrates and processed substrates among the plurality of substrates.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: May 31, 2011
    Assignee: Tokyo Electron Limitetd
    Inventors: Yuichi Takenaga, Tatsuya Yamaguchi, Wenling Wang, Toshihiko Takahashi, Masato Yonezawa
  • Publication number: 20100198386
    Abstract: The present invention is a method of optimizing a process recipe of a substrate processing system including: a substrate processing apparatus that performs a film deposition process of a substrate to be processed according to a process recipe; a data processing unit that executes a calculation for optimizing the process recipe; and a host computer; the substrate processing apparatus, the data processing unit, and the host computer being connected to each other through a network.
    Type: Application
    Filed: April 14, 2010
    Publication date: August 5, 2010
    Applicant: Tokyo Electron Limited
    Inventors: Kaname YAMAJI, Kiyoshi Suzuki, Yuichi Takenaga
  • Patent number: 7738983
    Abstract: The present invention is a method of optimizing a process recipe of a substrate processing system including: a substrate processing apparatus that performs a film deposition process of a substrate to be processed according to a process recipe; a data processing unit that executes a calculation for optimizing the process recipe; and a host computer; the substrate processing apparatus, the data processing unit, and the host computer being connected to each other through a network.
    Type: Grant
    Filed: October 4, 2007
    Date of Patent: June 15, 2010
    Assignee: Tokyo Electron Limited
    Inventors: Kaname Yamaji, Kiyoshi Suzuki, Yuichi Takenaga
  • Patent number: D695692
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: December 17, 2013
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Yuichi Takenaga, Takayuki Nishimura, Hiroaki Obikane
  • Patent number: D696201
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: December 24, 2013
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Yuichi Takenaga, Takayuki Nishimura, Hiroaki Obikane
  • Patent number: D699192
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: February 11, 2014
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Yuichi Takenaga, Masamichi Sasaki
  • Patent number: D703146
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: April 22, 2014
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Yuichi Takenaga, Takayuki Nishimura, Hiroaki Obikane
  • Patent number: D703615
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: April 29, 2014
    Assignee: Japan Aviation Electronics Industry, Limited
    Inventors: Yuichi Takenaga, Masamichi Sasaki