Abstract: A fin-semiconductor region (13) is formed on a substrate (11). A first impurity which produces a donor level or an acceptor level in a semiconductor is introduced in an upper portion and side portions of the fin-semiconductor region (13), and oxygen or nitrogen is further introduced as a second impurity in the upper portion and side portions of the fin-semiconductor region (13).

Abstract: In a plasma doping device according to the invention, a vacuum chamber is evacuated with a turbo-molecular pump as an exhaust device via a exhaust port while a predetermined gas is being introduced from a gas supply device in order to maintain the inside of the vacuum chamber to a predetermined pressure with a pressure regulating valve. A high-frequency power of 13.56 MHz is supplied by a high-frequency power source to a coil provided in the vicinity of a dielectric window opposed to a sample electrode to generate inductive-coupling plasma in the vacuum chamber. A high-frequency power source for supplying a high-frequency power to the sample electrode is provided. Uniformity of processing is enhanced by driving a gate shutter and covering a through gate.

Abstract: With the evacuation of an interior of a vacuum chamber halted and with gas supply into the vacuum chamber halted, in a state that a mixed gas of helium gas and diborane gas is sealed in the vacuum chamber, a plasma is generated in a vacuum vessel and simultaneously a high-frequency power is supplied to a sample electrode. By the high-frequency power supplied to the sample electrode, boron is introduced to a proximity to a substrate surface.

Abstract: In a plasma doping device according to the invention, a vacuum chamber (1) is evacuated with a turbo-molecular pump (3) as an exhaust device via a exhaust port 11 while a predetermined gas is being introduced from a gas supply device (2) in order to maintain the inside of the vacuum chamber (1) to a predetermined pressure with a pressure regulating valve (4). A high-frequency power of 13.56 MHz is supplied by a high-frequency power source (5) to a coil (8) provided in the vicinity of a dielectric window (7) opposed to a sample electrode (6) to generate inductive-coupling plasma in the vacuum chamber (1). A high-frequency power source (10) for supplying a high-frequency power to the sample electrode (6) is provided. Uniformity of processing is enhanced by driving a gate shutter (18) and covering a through gate (16).

Abstract: A semiconductor device includes: a fin-type semiconductor region (13) formed on a substrate (11); a gate insulating film (14) formed so as to cover an upper surface and both side surfaces of a predetermined portion of the fin-type semiconductor region (13); a gate electrode (15) formed on the gate insulating film (14); and an impurity region (17) formed on both sides of the gate electrode (15) in the fin-type semiconductor region (13). An impurity blocking portion (15a) for blocking the introduction of impurities is provided adjacent both sides of the gate electrode (15) over an upper surface of the fin-type semiconductor region (13).

Abstract: A plasma doping method and apparatus in which a prescribed gas is introduced into a vacuum container while being exhausted by a turbomolecular pump as an exhaust apparatus. The pressure in the vacuum container is kept at a prescribed value by a pressure regulating valve. High-frequency electric power of 13.56 MHz is supplied to a coil disposed close to a dielectric window which is opposed to a sample electrode, whereby induction-coupled plasma is generated in the vacuum container. Every time a prescribed number of samples have been processed, a dummy sample is subjected to plasma doping and then to heating. The conditions for processing of a sample are controlled so that the measurement value of the surface sheet resistance becomes equal to a prescribed value, whereby the controllability of the impurity concentration can be increased.

Abstract: A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

Abstract: Plasma doping is performed using a plasma made of a gas containing an impurity which will serve as a dopant. In this case, at least one of plasma generation high-frequency power and biasing high-frequency power is supplied in the form of pulses.

Abstract: An impurity is introduced into a fin-type semiconductor region (102) formed on a substrate (100) using a plasma doping process, thereby forming an impurity-introduced layer (105). Carbon is introduced into the fin-type semiconductor region (102) using a plasma doping process to overlap at least a part of the impurity-introduced layer (105), thereby forming a carbon-introduced layer.

Abstract: A fin-type semiconductor region (103) is formed on a substrate (101), and then a resist pattern (105) is formed on the substrate (101). An impurity is implanted into the fin-type semiconductor region (103) by a plasma doping process using the resist pattern (105) as a mask, and then at least a side of the fin-type semiconductor region (103) is covered with a protective film (107). Thereafter, the resist pattern (105) is removed by cleaning using a chemical solution, and then the impurity implanted into the fin-type semiconductor region (103) is activated by heat treatment.

Abstract: An impurity doping system is disclosed, which includes an impurity doping device for doping an impurity into a surface of a solid state base body, a measuring device for measuring an optical characteristic of an area into which the impurity is doped, and an annealing device for annealing the area into which the impurity is doped. The impurity doping system realizes an impurity doping not to bring about a rise of a substrate temperature, and measures optically physical properties of a lattice defect generated by the impurity doping step to control such that subsequent steps are optimized.

Abstract: It is intended to provide a plasma doping method and apparatus which are superior in the controllability of the concentration of an impurity that is introduced into a surface layer of a sample. A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power of 13.56 MHz is supplied from a high-frequency power source 5 to a coil 8 disposed close to a dielectric window 7 which is opposed to a sample electrode 6, whereby induction-coupled plasma is generated in the vacuum container 1. A high-frequency power source 10 for supplying high-frequency electric power to the sample electrode 6 is provided. Every time a prescribed number of samples have been processed, a dummy sample is subjected to plasma doping and then to heating.

Abstract: A fin-type semiconductor region (103) is formed on a substrate (101), and then a resist pattern (105) is formed on the substrate (101). An impurity is implanted into the fin-type semiconductor region (103) by a plasma doping process using the resist pattern (105) as a mask, and then at least a side of the fin-type semiconductor region (103) is covered with a protective film (107). Thereafter, the resist pattern (105) is removed by cleaning using a chemical solution, and then the impurity implanted into the fin-type semiconductor region (103) is activated by heat treatment.

Abstract: After a fin-semiconductor region (13) is formed on a substrate (11), impurity-containing gas and oxygen-containing gas are used to perform plasma doping on the fin-semiconductor region (13). This forms impurity-doped region (17) in at least side portions of the fin-semiconductor region (13).

Abstract: A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region.

Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.

Abstract: There is provided a regulating gas suction device, which forms a regulating gas flow for use in preventing air outside a vacuum container trying to invade into the vacuum container through a sealing member that tightly closes a gap between an upper end surface of the vacuum container and a peripheral edge of a top pate being opposed to each other from flowing toward a substrate at a coupling portion between the top plate and the vacuum container.

Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.

Abstract: Extension regions (17) are provided in side portions of a fin-shaped semiconductor region (13) formed on a substrate (11). A gate electrode (15) is formed to extend across the fin-shaped semiconductor region (13) and to be adjacent to the extension regions (17). A resistance region (37) having a resistivity higher than that of the extension regions (17) is formed in an upper portion of the fin-shaped semiconductor region (13) adjacent to the gate electrode (15).

Abstract: First and second gate insulating films are formed so as to cover at least the upper corner of first and second fin-shaped semiconductor regions. The radius of curvature r1? of the upper corner of the first fin-shaped semiconductor region located outside the first gate insulating film is greater than the radius of curvature r1 of the upper corner of the first fin-shaped semiconductor region located under the first gate insulating film and is less than or equal to 2×r1. The radius of curvature r2? of the upper corner of the second fin-shaped semiconductor region located outside the second gate insulating film is greater than the radius of curvature r2 of the upper corner of the second fin-shaped semiconductor region located under the second gate insulating film and is less than or equal to 2×r2.