Patents by Inventor Yuichiro Sasaki

Yuichiro Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7535220
    Abstract: A measuring device includes a magnetic shielding part for shielding an outer magnetic field, and a plurality of magnetic field sensors which are arranged in a shielding space which is formed by the magnetic shielding part, wherein the magnetic field sensor includes a plurality of magnetic field collection mechanisms which collect magnetic fields which the beam current to be measured generates, and the magnetic field collection mechanism is a cylindrical structural body which has at least a surface thereof formed of a superconductive body and includes a bridge portion which has only a portion thereof formed of a superconductive body on an outer peripheral portion thereof, and a magnetic field which the beam current to be measured generates is measured by the magnetic field sensors. Due to the arrangement of the plurality of magnetic field sensors, a beam position and a beam current can be detected.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: May 19, 2009
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Tamaki Watanabe, Takeo Kawaguchi, Shinichi Watanabe, Takeshi Katayama, Bunji Mizuno, Hisataka Kanada
  • Publication number: 20090104783
    Abstract: To provide an asher, an ashing method and an impurity doping apparatus group which can detect the interface between a surface hardening layer of a resist and an internal nonhardening layer and the interface between the nonhardening layer and a semiconductor substrate, with a high throughput. The invention provides the asher for plasma ashing the surface hardening layer formed on the resist and the internal nonhardening layer, the resist for use as a mask coated on the semiconductor substrate and doped with impurity, characterized by comprising an elipsometer for causing a linearly polarized light to enter the semiconductor substrate to detect a reflected, elliptically polarized light during plasma ashing, and detecting the interface between the hardening layer and the nonhardening layer and the interface between the nonhardening layer and the semiconductor substrate.
    Type: Application
    Filed: March 30, 2006
    Publication date: April 23, 2009
    Inventors: Cheng-Guo Jin, Bunji Mizuno, Yuichiro Sasaki
  • Publication number: 20090068769
    Abstract: An object of the invention is to provide a method and an apparatus for plasma processing which can accurately monitor an ion current applied to the surface of a sample. Predetermined gas is exhausted via an exhaust port 11 by a turbo-molecular pump 3 while introducing the gas within the vacuum chamber 1 from a gas supply device 2, and the pressure within the vacuum chamber 1 is kept at a predetermined value by a pressure regulating valve 4. A high-frequency power supply 5 for a plasma source supplies a high-frequency power to a coil 8 provided near a dielectric window 7 to generate inductively coupled plasma within the vacuum chamber 1. A high-frequency power supply 10 for the sample electrode for supplying the high-frequency power to the sample electrode 6 is provided. A matching circuit 13 for the sample electrode and a high-frequency sensor 14 are provided between the sample electrode high-frequency power supply and the sample electrode 6.
    Type: Application
    Filed: April 4, 2006
    Publication date: March 12, 2009
    Inventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno, Cheng-Guo Jin, Ichiro Nakayama
  • Publication number: 20090042321
    Abstract: Gas supplied to gas flow passages of a top plate from a gas supply device by gas supply lines forms flow along a vertical direction along a central axis of a substrate, so that the gas blown from gas blow holes can be made to be uniform, and a sheet resistance distribution is rotationally symmetric around a substrate center.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 12, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuichiro Sasaki, Tomohiro Okumura, Hiroyuki Ito, Keiichi Nakamoto, Katsumi Okashita, Bunji Mizuno
  • Publication number: 20090035878
    Abstract: There are provided a plasma doping method and apparatus which is excellent in a repeatability and a controllability of an implanting depth of an impurity to be introduced into a sample or a depth of an amorphous layer. A plasma doping method of generating a plasma in a vacuum chamber and colliding an ion in the plasma with a surface of a sample to modify a surface of a crystal sample to be amorphous, includes the steps of carrying out a plasma irradiation over a dummy sample to perform an amorphizing treatment together with a predetermined number of samples, irradiating a light on a surface of the dummy sample subjected to the plasma irradiation, thereby measuring an optical characteristic of the surface of the dummy sample, and controlling a condition for treating the sample in such a manner that the optical characteristic obtained at the measuring step has a desirable value.
    Type: Application
    Filed: March 30, 2006
    Publication date: February 5, 2009
    Inventors: Yuichiro Sasaki, Tomohiro Okumura, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno
  • Publication number: 20090026540
    Abstract: A semiconductor device includes: a first semiconductor region formed on a substrate and having an upper surface and a side surface; a first impurity region of a first conductivity type formed in an upper portion of the first semiconductor region; a second impurity region of a first conductivity type formed in a side portion of the first semiconductor region; and a gate insulating film formed so as to cover at least a side surface and an upper corner of a predetermined portion of the first semiconductor region. A radius of curvature r? of an upper corner of a portion of the first semiconductor region located outside the gate insulating film is greater than a radius of curvature r of an upper corner of a portion of the first semiconductor region located under the gate insulating film and is less than or equal to 2r.
    Type: Application
    Filed: August 19, 2008
    Publication date: January 29, 2009
    Applicant: Matsushita Electric Industrial, Ltd.
    Inventors: Yuichiro Sasaki, Katsumi Okashita, Keiichi Nakamoto, Hisataka Kanada, Bunji Mizuno
  • Publication number: 20090023262
    Abstract: To provide a fine transistor of high precision. A method for fabricating a transistor comprises the step of forming a gate electrode (340) on the surface of a semiconductor substrate, the step of introducing an impurity across said gate electrode (340), and the step of activating said impurity, thereby to form a source/drain region (310, 320) in the region having said impurity introduced thereinto. In the transistor fabricating method, the step of introducing said impurity includes a plasma irradiating step. The method further comprises the step of forming, prior to said activating step, a reflection preventing film (400) on the surface of the region having said impurity introduced thereinto, so that the optical reflectivity of said impurity introduced region may be lower than the reflectivity of said gate electrode surface.
    Type: Application
    Filed: August 3, 2005
    Publication date: January 22, 2009
    Inventors: Cheng-Guo Jin, Yuichiro Sasaki, Hiroyuki Ito, Bunji Mizuno
  • Publication number: 20080318399
    Abstract: A plasma doping method that can control a dose precisely is realized. In-plane uniformity of the dose is improved. It has been found that, if a bias is applied by irradiating B2H6/He plasma onto a silicon substrate, there is a time at which a dose of boron is made substantially uniform, and the saturation time is comparatively long and ease to stably use, compared with a time at which repeatability of an apparatus control can be secured. The invention has been finalized focusing on the result. That is, if plasma irradiation starts, a dose is initially increased, but a time at which the dose is made substantially uniform without depending on a time variation is continued. In addition, if the time is further increased, the dose is decreased. The dose can be accurately controlled through a process window of the time at which the dose is made substantially uniform without depending on the time variation.
    Type: Application
    Filed: June 16, 2008
    Publication date: December 25, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuichiro SASAKI, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno, Tomohiro Okumura
  • Publication number: 20080308871
    Abstract: A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region.
    Type: Application
    Filed: July 7, 2008
    Publication date: December 18, 2008
    Inventors: Yuichiro Sasaki, Katsumi Okashita, Keiichi Nakamoto, Hiroyuki Ito, Bunji Mizuno
  • Patent number: 7456085
    Abstract: To provide an impurity introducing method which can repeatedly carry out such a process that plasma irradiation for realization of amorphous and plasma doping were combined, in such a situation that steps are simple and through-put is high, without destroying an apparatus. At the time of switching over plasmas which are used in plasma irradiation for realization of amorphous and plasma doping, electric discharge is stopped, and an initial condition of a matching point of a high frequency power supply and a peripheral circuit is reset so as to adapt to plasma which is used in each step, or at the time of switching, a load, which is applied to the high frequency power supply etc., is reduced by increasing pressure and decreasing a bias voltage.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: November 25, 2008
    Assignee: Panasonic Corporation
    Inventors: Yuichiro Sasaki, Tomohiro Okumura, Bunji Mizuno, Cheng-Guo Jin, Ichiro Nakayama, Satoshi Maeshima, Katsumi Okashita
  • Publication number: 20080258082
    Abstract: It is intended to provide a plasma processing method and apparatus capable of increasing the uniformity of amorphyzation processing. A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 through a gas inlet 11 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus through an exhaust hole 12. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power of 13.56 MHz is supplied from a high-frequency power source 5 to a coil 8 disposed close to a dielectric window 7 which is opposed to a sample electrode 6, whereby induction-coupled plasma is generated in the vacuum container 1. A high-frequency power source 10 for supplying high-frequency electric power to the sample electrode 6 is provided and functions as a voltage source for controlling the potential of the sample electrode 6.
    Type: Application
    Filed: October 27, 2005
    Publication date: October 23, 2008
    Inventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Cheng-Guo Jin, Satoshi Maeshima, Hiroyuki Ito, Ichiro Nakayama, Bunji Mizuno
  • Publication number: 20080233723
    Abstract: There are provided a plasma doping method and an apparatus which have excellent reproducibility of the concentration of impurities implanted into the surfaces of samples. In a vacuum container, in a state where gas is ejected toward a substrate placed on a sample electrode through gas ejection holes provided in a counter electrode, gas is exhausted from the vacuum container through a turbo molecular pump as an exhaust device, and the inside of the vacuum container is maintained at a predetermined pressure through a pressure adjustment valve, the distance between the counter electrode and the sample electrode is set to be sufficiently small with respect to the area of the counter electrode to prevent plasma from being diffused outward, and capacitive-coupled plasma is generated between the counter electrode and the sample electrode to perform plasma doping. The gas used herein is a gas with a low concentration which contains impurities such as diborane or phosphine.
    Type: Application
    Filed: June 12, 2008
    Publication date: September 25, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd
    Inventors: Tomohiro Okumura, Yuichiro Sasaki, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno
  • Publication number: 20080210167
    Abstract: It is an object to prevent functions expected originally from being unexhibited when impurities to be introduced into a solid sample are mixed with each other, and to implement plasma doping with high precision. In order to distinguish impurities which may be mixed from impurities which should not be mixed, first of all, an impurity introducing mechanism of a core is first distinguished. In order to avoid a mixture of the impurities in very small amounts, a mechanism for delivering a semiconductor substrate to be treated and a mechanism for removing a resin material to be formed on the semiconductor substrate are used exclusively.
    Type: Application
    Filed: May 16, 2008
    Publication date: September 4, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Bunji Mizino, Ichiro Nakayama, Yuichiro Sasaki, Tomohiro Okumura, Cheng-Guo Jin, Hiroyuki Ito
  • Publication number: 20080196834
    Abstract: A liquid phase etching method which comprises spraying a chemically reactive liquid, with a specific speed, to a solid article, an aggregate of solid articles or a gelatinous material to be treated; and a liquid etching apparatus having a mechanism for holding a processing object to be treated and a nozzle structure for spraying a chemically reactive liquid to the processing object to be treated which is held by the mechanism. The method and apparatus allow the significant improvement of the etching rate while maintaining the accuracy of etching.
    Type: Application
    Filed: April 25, 2008
    Publication date: August 21, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Bunji Mizuno, Yuichiro Sasaki, Ichiro Nakayama, Hisataka Kanada
  • Publication number: 20080194086
    Abstract: There is provided a method of introducing impurity capable of efficiently realizing a shallow impurity introduction. The impurity introducing method includes a first step of making a surface of a semiconductor layer to be amorphous by reacting plasma composed of particles which are electrically inactive in the semiconductor layer to a surface of a solid base body including the semiconductor layer, and a second step of introducing impurity to the surface of the solid base body. After performing the first step, by performing the second step, an amorphous layer with fine pores is formed on the surface of the solid base body including the semiconductor layer, and impurity are introduced in the amorphous layer to form an impurity introducing layer.
    Type: Application
    Filed: May 31, 2005
    Publication date: August 14, 2008
    Inventors: Yuichiro Sasaki, Bunji Mizuno, Katsumi Okashita, Cheng-Guo Jin, Hiroyuki Ito
  • Patent number: 7407874
    Abstract: A plasma doping method that can control a dose precisely is realized. In-plane uniformity of the dose is improved. It has been found that, if a bias is applied by irradiating B2H6/He plasma onto a silicon substrate, there is a time at which a dose of boron is made substantially uniform, and the saturation time is comparatively long and ease to stably use, compared with a time at which repeatability of an apparatus control can be secured. The invention has been finalized focusing on the result. That is, if plasma irradiation starts, a dose is initially increased, but a time at which the dose is made substantially uniform without depending on a time variation is continued. In addition, if the time is further increased, the dose is decreased. The dose can be accurately controlled through a process window of the time at which the dose is made substantially uniform without depending on the time variation.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: August 5, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yuichiro Sasaki, Katsumi Okashita, Hiroyuki Ito, Bunji Mizuno, Tomohiro Okumura
  • Publication number: 20080182348
    Abstract: A subject of the present invention is to realize an impurity doping not to bring about a rise of a substrate temperature. Another subject of the present invention is to measure optically physical properties of a lattice defect generated by the impurity doping step to control such that subsequent steps are optimized. An impurity doping method, includes a step of doping an impurity into a surface of a solid state base body, a step of measuring an optical characteristic of an area into which the impurity is doped, a step of selecting annealing conditions based on a measurement result to meet the optical characteristic of the area into which the impurity is doped, and a step of annealing the area into which the impurity is doped, based on the selected annealing conditions.
    Type: Application
    Filed: September 22, 2004
    Publication date: July 31, 2008
    Inventors: Cheng-Guo Jin, Yuichiro Sasaki, Bunji Mizuno
  • Publication number: 20080179683
    Abstract: A semiconductor region having an upper surface and a side surface is formed on a substrate. A first impurity region is formed in an upper portion of the semiconductor region. A second impurity region is formed in a side portion of the semiconductor region. The resistivity of the second impurity region is substantially equal to or smaller than that of the first impurity region.
    Type: Application
    Filed: February 4, 2008
    Publication date: July 31, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuichiro SASAKI, Katsumi OKASHITA, Keiichi NAKAMOTO, Hiroyuki ITO, Bunji MIZUNO
  • Publication number: 20080166861
    Abstract: It is an object to prevent functions expected originally from being unexhibited when impurities to be introduced into a solid sample are mixed with each other, and to implement plasma doping with high precision. In order to distinguish impurities which may be mixed from impurities which should not be mixed, first of all, an impurity introducing mechanism of a core is first distinguished. In order to avoid a mixture of the impurities in very small amounts, a mechanism for delivering a semiconductor substrate to be treated and a mechanism for removing a resin material to be formed on the semiconductor substrate are used exclusively.
    Type: Application
    Filed: March 27, 2008
    Publication date: July 10, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Bunji Mizuno, Ichiro Nakayama, Yuichiro Sasaki, Tomohiro Okumura, Cheng-Guo Jin, Hiroyuki Ito
  • Publication number: 20080160728
    Abstract: A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.
    Type: Application
    Filed: February 29, 2008
    Publication date: July 3, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yuichiro SASAKI, Bunji Mizuno, Cheng-Guo Jin