Patents by Inventor Yuki Nakano

Yuki Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250051349
    Abstract: A compound having structures represented by the following formulas (1) or (2): wherein in the formulas (1) and (2), at least one of R1 to R8 is a deuterium atom.
    Type: Application
    Filed: September 20, 2024
    Publication date: February 13, 2025
    Applicant: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki NAKANO, Taro Yamaki, Satomi Tasaki, Tomoki Kato
  • Publication number: 20250057041
    Abstract: A compound represented by a formula (1). In the formula (1): X1 to X4 are each independently a nitrogen atom or CRx; at least one of X1 to X4 is a nitrogen atom; a ring A, a ring B, and a ring C are each independently an aromatic hydrocarbon ring or a heterocycle; Ar1 is a hydrogen atom, an aryl group, or a group represented by a formula (2); and Ar2 is an aryl group or a group represented by a formula (3).
    Type: Application
    Filed: July 16, 2024
    Publication date: February 13, 2025
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Ryo NAGATA, Shintaro BAN, Yuki NAKANO, Ryota TAKAHASHI, Kiyoshi IKEDA, Tomokatsu KUSHIDA, Sigma HASHIMOTO, Yuichiro KAWAMURA
  • Patent number: 12218187
    Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal that is constituted of a hexagonal crystal and having a first main surface as a device surface facing a c-plane of the SiC monocrystal and has an off angle inclined with respect to the c-plane, a second main surface at a side opposite to the first main surface, and a side surface facing an a-plane of the SiC monocrystal and has an angle less than the off angle with respect to a normal to the first main surface when the normal is 0°.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: February 4, 2025
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Masaya Ueno, Sawa Haruyama, Yasuhiro Kawakami, Seiya Nakazawa, Yasunori Kutsuma
  • Patent number: 12216695
    Abstract: Provided are an information processing apparatus, an information processing method, and a program capable of performing analysis of a text with high accuracy. An information processing apparatus includes one or more processors and one or more memories that store a command executed by the one or more processors. The one or more processors are configured to acquire a text, classify attributes of information described in the text into a fixed unit of the text, analyze the text for each of the same classifications based on a result of the classification, and output a result of the analysis.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: February 4, 2025
    Assignee: FUJIFILM Corporation
    Inventors: Ryota Ozaki, Yuki Tagawa, Norihisa Nakano
  • Publication number: 20250040211
    Abstract: An SiC semiconductor device includes an SiC semiconductor layer of a first conductivity type having a main surface, a source trench formed in the main surface and having a side wall and a bottom wall, a source electrode embedded in the source trench and having a side wall contact portion in contact with a region of the side wall of the source trench at an opening side of the source trench, a body region of a second conductivity type formed in a region of a surface layer portion of the main surface along the source trench, and a source region of the first conductivity type electrically connected to the side wall contact portion of the source electrode in a surface layer portion of the body region.
    Type: Application
    Filed: October 16, 2024
    Publication date: January 30, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Kenji YAMAMOTO, Seigo MORI
  • Publication number: 20250040436
    Abstract: An organic electroluminescence device including: a cathode, an anode, and an organic layer disposed between the cathode and the anode, wherein the organic layer comprises an emitting layer and a first layer, the first layer is disposed between the cathode and the emitting layer, the emitting layer comprises one or both of a compound represented by the following formula (1A) and a compound represented by the following formula (1B), and the first layer comprises a compound represented by the following formula (BE1):
    Type: Application
    Filed: September 20, 2024
    Publication date: January 30, 2025
    Applicant: Idemitsu Kosan Co., Ltd.
    Inventors: Hiroaki ITOI, Yuki NAKANO, Satomi TASAKI, Taro YAMAKI, Tetsuya MASUDA
  • Patent number: 12208607
    Abstract: An image recording apparatus includes a controller to calculate n that is a maximum natural number satisfying nX?X0, where X0 represents a width of a sheet medium, and X represents a longest one of respective lengths, in a width direction of the sheet medium, of a plurality of first images or a single second image based on image data. The plurality of first images are arranged along a longitudinal direction of the sheet medium. When the calculated n is equal to or more than two, the controller performs a juxtaposed image recording process to control a print engine in such a manner that two or more and n or less images, among the plurality of first images or among a plurality of divisional images into which the single second image is divided, are recorded to be arranged side by side along the width direction.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: January 28, 2025
    Assignee: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Yushi Deura, Taisei Okuzono, Haruka Azechi, Yasuhiro Nakano, Gakuro Kanazawa, Yuki Tsujimura
  • Patent number: 12202837
    Abstract: A compound having structures represented by the following formulas (1) or (2): wherein in the formulas (1) and (2), at least one of R1 to R8 is a deuterium atom.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: January 21, 2025
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki Nakano, Taro Yamaki, Satomi Tasaki, Tomoki Kato
  • Publication number: 20250022926
    Abstract: A semiconductor device (1A) includes a chip (2) that includes an SiC monocrystal and has a main surface (3), a trench structure (20) that has a first side wall (22A) extending in an a-axis direction of the SiC monocrystal and a second side wall (22B) extending in an m-axis direction of the SiC monocrystal and is formed in the main surface, and a contact region (50) of a first conductivity type that is formed in a region inside the chip along the trench structure at an interval in the a-axis direction from the second side wall.
    Type: Application
    Filed: September 30, 2024
    Publication date: January 16, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Keisuke NAGAYA, Yuki NAKANO, Kenji YAMAMOTO, Seigo MORI
  • Publication number: 20250022916
    Abstract: An SiC semiconductor device comprises: a chip that includes an SiC monocrystal and has a main surface; a trench structure that has a first side wall extending in an a-axis direction of the SiC monocrystal and a second side wall extending in an m-axis direction of the SiC monocrystal and is formed in the main surface; and a contact region of a first conductivity type that is formed in a region inside the chip along the trench structure at an interval in the m-axis direction from the first side wall.
    Type: Application
    Filed: September 30, 2024
    Publication date: January 16, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Keisuke NAGAYA, Yuki NAKANO, Kenji YAMAMOTO, Seigo MORI
  • Publication number: 20250022796
    Abstract: A semiconductor device includes a chip having a main surface, a trench resistance structure formed in the main surface, a gate pad that has a resistance value lower than that of the trench resistance structure and that is arranged on the trench resistance structure so as to be electrically connected to the trench resistance structure, and a gate wiring line that has a resistance value lower than that of the trench resistance structure and that is arranged on the trench resistance structure so as to be electrically connected to the gate pad via the trench resistance structure.
    Type: Application
    Filed: September 30, 2024
    Publication date: January 16, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Seigo MORI, Yuki NAKANO, Keigo MINODE
  • Publication number: 20250022920
    Abstract: An SiC semiconductor device includes a chip that includes an SiC monocrystal and has a main surface, a trench structure that has a side wall and a bottom wall and is formed in the main surface, and a contact region of a first conductivity type that includes a first region formed in a region along the side wall in a surface layer portion of the main surface and a second region formed in a region along the bottom wall inside the chip and having an impurity concentration lower than an impurity concentration of the first region.
    Type: Application
    Filed: September 30, 2024
    Publication date: January 16, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Keisuke NAGAYA, Yuki NAKANO, Kenji YAMAMOTO, Seigo MORI
  • Patent number: 12199178
    Abstract: A semiconductor device includes a semiconductor layer made of SiC. A transistor element having an impurity region is formed in a front surface portion of the semiconductor layer. A first contact wiring is formed on a back surface portion of the semiconductor layer, and defines one electrode electrically connected to the transistor element. The first contact wiring has a first wiring layer forming an ohmic contact with the semiconductor layer without a silicide contact and a second wiring layer formed on the first wiring layer and having a resistivity lower than that of the first wiring layer.
    Type: Grant
    Filed: September 26, 2023
    Date of Patent: January 14, 2025
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Publication number: 20250015177
    Abstract: A semiconductor device includes a chip having a first main surface which serves as a device surface and a second main surface which serves as a non-device surface, and a first conductivity type drift gradient region formed in the chip, and having a concentration profile in which an impurity concentration of an end portion on the first main surface side is lower than an impurity concentration of an end portion on the second main surface side.
    Type: Application
    Filed: September 25, 2024
    Publication date: January 9, 2025
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Publication number: 20250015078
    Abstract: A semiconductor device includes a chip that has a main surface, a gate resistor that includes a trench resistor structure formed in the main surface, a gate pad that has a lower resistance value than the trench resistor structure and is arranged on the main surface such as to be electrically connected to the trench resistor structure, and a gate wiring that has a lower resistance value than the trench resistor structure and is arranged on the main surface such as to be electrically connected to the gate pad via the trench resistor structure.
    Type: Application
    Filed: September 25, 2024
    Publication date: January 9, 2025
    Applicant: ROHM CO., LTD.
    Inventors: Seigo MORI, Yuki NAKANO, Keigo MINODE
  • Publication number: 20250006580
    Abstract: A semiconductor device including a chip having a main surface, a first inorganic film including an insulator and covering the main surface, a second inorganic film including an insulator and covering the first inorganic film, at least one through hole formed in the second inorganic film, and an organic film embedded in the through hole and covering the second inorganic film.
    Type: Application
    Filed: September 13, 2024
    Publication date: January 2, 2025
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Patent number: 12171141
    Abstract: An organic electroluminescence device including a cathode, an anode, and an emitting layer disposed between the cathode and the anode, wherein the emitting layer includes a compound represented by the following formula (1) and one or more compounds selected from the group consisting of compounds represented by each of formulas (11), (21), (31), (41), (51), (61), (71) and (81). In the formula (1), at least one of R1 to R8 is a deuterium atom, and Ar2 is a monovalent group represented by following formula (2), (3) or (4).
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: December 17, 2024
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki Nakano, Taro Yamaki, Satomi Tasaki, Tomoki Kato
  • Publication number: 20240405072
    Abstract: An SiC semiconductor device includes an SiC semiconductor layer having a first main surface and a second main surface, a gate electrode embedded in a trench with a gate insulating layer, a source region of a first conductivity type formed in a side of the trench in a surface layer portion of the first main surface, a body region of a second conductivity type formed in a region at the second main surface side with respect to the source region in the surface layer portion of the first main surface, a drift region of the first conductivity type formed in a region at the second main surface side in the SiC semiconductor layer, and a contact region of the second conductivity type having an impurity concentration of not more than 1.0×1020 cm?3 and formed in the surface layer portion of the first main surface.
    Type: Application
    Filed: August 9, 2024
    Publication date: December 5, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Masatoshi AKETA, Takui SAKAGUCHI, Yuichiro NANEN
  • Patent number: 12156467
    Abstract: An organic electroluminescence device, comprising: a cathode; an anode; and an emitting layer disposed between the cathode and the anode, wherein the emitting layer includes a compound represented by the following formula (1) and a compound represented by the following formula (11), provided that at least one of Ar101 and Ar102 is a monovalent group represented by the following formula (12).
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: November 26, 2024
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Yuki Nakano, Taro Yamaki, Satomi Tasaki
  • Patent number: D1056861
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 7, 2025
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Kenji Yamamoto, Yasunori Kutsuma