Patents by Inventor Yuki Nakano

Yuki Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978778
    Abstract: A semiconductor device includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: May 7, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura, Katsuhisa Nagao
  • Publication number: 20240147846
    Abstract: An organic electroluminescent element including, an anode, a cathode, and an organic layer disposed between the anode and the cathode and including a light emitting zone. The organic layer includes a first layer containing a first compound and a second layer containing a second compound. The first layer and the second layer are different layers.
    Type: Application
    Filed: December 8, 2021
    Publication date: May 2, 2024
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Shota TANAKA, Shintaro BAN, Satomi TASAKI, Hiroaki ITOI, Tasuku HAKETA, Yuki NAKANO
  • Patent number: 11967627
    Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, and a surface insulating film disposed in a manner extending across the cell portion and the outer peripheral portion, and in the cell portion, formed to be thinner than a part in the outer peripheral portion.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: April 23, 2024
    Assignee: ROHM CO, LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Publication number: 20240128315
    Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota NAKAMURA
  • Publication number: 20240120384
    Abstract: An SiC semiconductor device includes an SiC chip that has a main surface, and an n-type drift region that is formed in a surface layer portion of the main surface and has an impurity concentration adjusted by at least two types of pentavalent elements.
    Type: Application
    Filed: November 18, 2021
    Publication date: April 11, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Kenji YAMAMOTO, Yuki NAKANO
  • Publication number: 20240120499
    Abstract: An electrode according to an embodiment includes a support, and a catalyst layer including a sheet layer and a gap layer stacked, alternately on the support. The catalyst layer includes noble oxide and non-noble oxide. 4 [wt %] or more and 8 [wt %] or less of metal elements included in the catalyst layer is non-noble metal. An average thickness of the gap layer is 6 [nm] or more and 50 [nm] or less.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Norihiro YOSHINAGA, Hyangmi JUNG, Taishi FUKAZAWA, Yoshihiko NAKANO, Hiroaki HIRAZAWA, Yoshitsune SUGANO, Yuki KUDO, Akihiko ONO
  • Patent number: 11950498
    Abstract: This compound is represented by formula (1)
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: April 2, 2024
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Ryota Takahashi, Keita Seda, Yuki Nakano
  • Publication number: 20240105836
    Abstract: The semiconductor device includes a semiconductor layer having an active portion and a gate finger portion, an MIS transistor formed at the active portion including a gate trench and a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches.
    Type: Application
    Filed: December 13, 2023
    Publication date: March 28, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Patent number: 11932137
    Abstract: A regenerative torque upper limit is set to a larger value when a rear-wheel distribution ratio is small than when the rear-wheel distribution ratio is large. Accordingly, when a distribution of a drive power to front wheels is large, a regenerative torque of a second rotary machine can be increased such that wheels are less likely to slip at the time of performing of regeneration control when the distribution of the drive power to the front wheels is small in comparison with a case in which the regenerative torque upper limit is set to a constant value similarly to when the distribution of the drive power to the front wheels is small. In this way, it is possible to increase the regenerative torque of the second rotary machine according to the rear-wheel distribution ratio.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: March 19, 2024
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Atsushi Tabata, Koichi Okuda, Masato Nakano, Yuki Makino
  • Publication number: 20240090329
    Abstract: A compound includes: at least one group represented by a formula (11) below; and a single benz[de]anthracene derivative skeleton represented by a formula (1000) below in a molecule, in which Ar1 is a substituted or unsubstituted aryl group including at least four rings, at least one of R10 to R19 is a group represented by the formula (11), L1 is a substituted or unsubstituted arylene group having 6 to 15 ring carbon atoms or a substituted or unsubstituted divalent heterocyclic group having 5 to 15 ring atoms, and mx is 1, 2, or 3.
    Type: Application
    Filed: October 1, 2021
    Publication date: March 14, 2024
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Hiroaki ITOI, Yuki NAKANO, Taro YAMAKI, Maiko IIDA, Takamoto MORITA, Shintaro BAN, Ryota TAKAHASHI, Yu KUDO, Yoshinao SHIRASAKI
  • Patent number: 11929394
    Abstract: A semiconductor device of the present invention includes a semiconductor layer of a first conductivity type having a cell portion and an outer peripheral portion disposed around the cell portion, formed with a gate trench at a surface side of the cell portion, and a gate electrode buried in the gate trench via a gate insulating film, forming a channel at a portion lateral to the gate trench at ON-time, the outer peripheral portion has a semiconductor surface disposed at a depth position equal to or deeper than a depth of the gate trench, and the semiconductor device further includes a voltage resistant structure having a semiconductor region of a second conductivity type formed in the semiconductor surface of the outer peripheral portion.
    Type: Grant
    Filed: January 13, 2022
    Date of Patent: March 12, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Publication number: 20240072108
    Abstract: An SiC semiconductor device includes an SiC semiconductor chip that has a main surface, an n-type drift region that is formed in a surface layer portion of the main surface and has an impurity concentration adjusted by at least two types of pentavalent elements, and a p-type impurity region that is formed inside the drift region such as to form a pn-junction portion with the drift region.
    Type: Application
    Filed: November 18, 2021
    Publication date: February 29, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Hiroaki SHIRAGA, Kenji YAMAMOTO
  • Patent number: 11916069
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Yuki Nakano
  • Patent number: 11916112
    Abstract: An SiC semiconductor device includes an SiC semiconductor layer including an SiC monocrystal and having a first main surface as a device surface, a second main surface at a side opposite to the first main surface, and a side surface connecting the first main surface and the second main surface, a main surface insulating layer including an insulating material, covering the first main surface of the SiC semiconductor layer, and having an insulating side surface continuous to the side surface of the SiC semiconductor layer, and a boundary modified layer including a first region that is modified to be of a property differing from the SiC monocrystal and a second region that is modified to be of a property differing from the insulating material, and being formed across the side surface of the SiC semiconductor layer and the insulating side surface of the main surface insulating layer.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: February 27, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yasuhiro Kawakami, Yuki Nakano, Masaya Ueno, Seiya Nakazawa, Sawa Haruyama, Yasunori Kutsuma
  • Patent number: 11888058
    Abstract: The semiconductor device of the present invention includes a semiconductor layer which includes an active portion and a gate finger portion, an MIS transistor which is formed at the active portion and includes a gate trench as well as a source region, a channel region and a drain region sequentially along a side surface of the gate trench, a plurality of first gate finger trenches arranged by an extended portion of the gate trench at the gate finger portion, a gate electrode embedded each in the gate trench and the first gate finger trench, a second conductive-type first bottom-portion impurity region formed at least at a bottom portion of the first gate finger trench, a gate finger which crosses the plurality of first gate finger trenches and is electrically connected to the gate electrode, and a second conductive-type electric field relaxation region which is formed more deeply than the bottom portion of the first gate finger trench between the mutually adjacent first gate finger trenches.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: January 30, 2024
    Assignee: ROHM CO., LTD.
    Inventor: Yuki Nakano
  • Publication number: 20240030303
    Abstract: A semiconductor device of the present invention includes a gate electrode buried in a gate trench of a first conductivity-type semiconductor layer, a first conductivity-type source region, a second conductivity-type channel region, and a first conductivity-type drain region formed in the semiconductor layer, a second trench selectively formed in a source portion defined in a manner containing the source region in the surface of the semiconductor layer, a trench buried portion buried in the second trench, a second conductivity-type channel contact region selectively disposed at a position higher than that of a bottom portion of the second trench in the source portion, and electrically connected with the channel region, and a surface metal layer disposed on the source portion, and electrically connected to the source region and the channel contact region.
    Type: Application
    Filed: October 5, 2023
    Publication date: January 25, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Publication number: 20240023436
    Abstract: There is provided an organic electroluminescence device including: an anode; a cathode; a first emitting layer provided between the anode and the cathode and containing a first compound; and a second emitting layer provided between the first emitting layer and the cathode and containing a second compound, in which at least one of the first emitting layer or the second emitting layer contains a compound having at least one deuterium atom, at least one of the first emitting layer or the second emitting layer contains a compound having a fused ring that includes four or more rings, and the first emitting layer and the second emitting layer are in direct contact with each other.
    Type: Application
    Filed: March 11, 2021
    Publication date: January 18, 2024
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Satomi TASAKI, Hiroaki ITOI, Taro YAMAKI, Maiko IIDA, Kazuki NISHIMURA, Yuki NAKANO
  • Publication number: 20240014258
    Abstract: A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota NAKAMURA
  • Publication number: 20240014317
    Abstract: A semiconductor device includes a semiconductor layer made of SiC. A transistor element having an impurity region is formed in a front surface portion of the semiconductor layer. A first contact wiring is formed on a back surface portion of the semiconductor layer, and defines one electrode electrically connected to the transistor element. The first contact wiring has a first wiring layer forming an ohmic contact with the semiconductor layer without a silicide contact and a second wiring layer formed on the first wiring layer and having a resistivity lower than that of the first wiring layer.
    Type: Application
    Filed: September 26, 2023
    Publication date: January 11, 2024
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Ryota NAKAMURA
  • Patent number: D1021831
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: April 9, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Kenji Yamamoto, Yasunori Kutsuma