Patents by Inventor Yuki Nakano

Yuki Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230421073
    Abstract: A switching device according to the present invention is a switching device for switching a load by on-off control of voltage, and includes an SiC semiconductor layer where a current path is formed by on-control of the voltage, a first electrode arranged to be in contact with the SiC semiconductor layer, and a second electrode arranged to be in contact with the SiC semiconductor layer for conducting with the first electrode due to the formation of the current path, while the first electrode has a variable resistance portion made of a material whose resistance value increases under a prescribed high-temperature condition for limiting current density of overcurrent to not more than a prescribed value when the overcurrent flows to the current path.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Applicant: ROHM CO., LTD.
    Inventors: Yuki NAKANO, Hiroyuki SAKAIRI
  • Publication number: 20230395713
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Application
    Filed: August 24, 2023
    Publication date: December 7, 2023
    Applicant: ROHM CO., LTD.
    Inventors: Shuhei MITANI, Yuki NAKANO, Heiji WATANABE, Takayoshi SHIMURA, Takuji HOSOI, Takashi KIRINO
  • Patent number: 11839153
    Abstract: A compound represented by formula (1) as defined, wherein in any one pair selected from R4 and R5, R5 and R6, and R6 and R7, one member represents a single bond bonded to *a of a group represented by the formula (11), and the other member represents a single bond bonded to *b, in any one pair selected from R1 and R2, R2 and R3, R8 and R9, R9 and R10, and R10 and R11, one member represents a single bond bonded to *a of a group represented by the formula (11) and the other member represents a single bond bonded to *b, or one member represents a single bond bonded to *c of a group represented by the formula (21), and the other member represents a single bond bonded to *d, and R1 to R11 except for the single bonds, Ar, and R21 to R24 are defined.
    Type: Grant
    Filed: October 9, 2018
    Date of Patent: December 5, 2023
    Assignee: IDEMITSU KOSAN CO.,LTD.
    Inventors: Ryota Takahashi, Hidetsugu Ikeda, Yuki Nakano
  • Patent number: 11839148
    Abstract: An organic electroluminescence device includes an anode, a cathode, a first emitting layer, and a second emitting layer disposed between the first emitting layer and the cathode, the first emitting layer containing a first host material in a form of a first compound represented by a formula (101) below, the second emitting layer containing a second host material in a form of a second compound represented by a formula (2) below, the first emitting layer and the second emitting layer being in direct contact with each other.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: December 5, 2023
    Assignee: IDEMITSU KOSAN CO., LTD.
    Inventors: Satomi Tasaki, Kazuki Nishimura, Yuki Nakano, Hiroaki Itoi
  • Publication number: 20230369392
    Abstract: A semiconductor device includes a chip which has a first main surface on one side and a second main surface on the other side and which includes an active surface set at an inner portion of the first main surface and an outside surface set at a peripheral edge portion of the first main surface, a functional device which is formed at the active surface side, a projecting structure which includes an inorganic substance and projects at the outside surface side, and an organic film which covers the projecting structure.
    Type: Application
    Filed: November 4, 2021
    Publication date: November 16, 2023
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Patent number: 11817487
    Abstract: A semiconductor device of the present invention includes a gate electrode buried in a gate trench of a first conductivity-type semiconductor layer, a first conductivity-type source region, a second conductivity-type channel region, and a first conductivity-type drain region formed in the semiconductor layer, a second trench selectively formed in a source portion defined in a manner containing the source region in the surface of the semiconductor layer, a trench buried portion buried in the second trench, a second conductivity-type channel contact region selectively disposed at a position higher than that of a bottom portion of the second trench in the source portion, and electrically connected with the channel region, and a surface metal layer disposed on the source portion, and electrically connected to the source region and the channel contact region.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: November 14, 2023
    Assignee: ROHM CO., LTD.
    Inventor: Yuki Nakano
  • Publication number: 20230361210
    Abstract: A semiconductor device includes a semiconductor layer having a first surface and a second surface, a unit cell including a diode region of a first conductivity type formed in a surface layer portion of the first surface of the semiconductor layer, a well region of a second conductivity type formed in the surface layer portion of the first surface of the semiconductor layer along a peripheral edge of the diode region, and a first conductivity type region formed in a surface layer portion of the well region, a gate electrode layer facing the well region and the first conductivity type region through a gate insulating layer and a first surface electrode covering the diode region and the first conductivity type region on the first surface of the semiconductor layer, and forming a Schottky junction with the diode region and an ohmic junction with the first conductivity type region.
    Type: Application
    Filed: July 17, 2023
    Publication date: November 9, 2023
    Applicant: ROHM CO., LTD.
    Inventors: Takui SAKAGUCHI, Masatoshi AKETA, Yuki NAKANO
  • Publication number: 20230352371
    Abstract: A semiconductor device includes a semiconductor layer which has a main surface and includes SiC as a main component, a gate structure which is formed in the main surface, an insulating layer which is formed on the main surface such as to cover the gate structure, a gate main electrode which is arranged on the insulating layer and electrically connected to the gate structure, and a gate pad electrode which includes a connecting portion which is arranged on the gate main electrode such as to be connected to the gate main electrode and connected to the gate main electrode with a first area in plan view and an electrode surface having a second area exceeding the first area in plan view.
    Type: Application
    Filed: April 30, 2021
    Publication date: November 2, 2023
    Applicant: ROHM CO., LTD.
    Inventor: Yuki NAKANO
  • Patent number: 11804520
    Abstract: A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: October 31, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Patent number: 11804545
    Abstract: A semiconductor device includes a semiconductor layer made of SiC. A transistor element having an impurity region is formed in a front surface portion of the semiconductor layer. A first contact wiring is formed on a back surface portion of the semiconductor layer, and defines one electrode electrically connected to the transistor element. The first contact wiring has a first wiring layer forming an ohmic contact with the semiconductor layer without a silicide contact and a second wiring layer formed on the first wiring layer and having a resistivity lower than that of the first wiring layer.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: October 31, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Ryota Nakamura
  • Publication number: 20230345816
    Abstract: A compound represented by the formula (12X). In the formula (12X), Py1 and Py2 each independently represent a substituted or unsubstituted 1-pyrenyl group, L1 and L2 each independently represent a substituted or unsubstituted phenylene group or a substituted or unsubstituted naphthylene group. When L1 and L2 each independently represent a substituted or unsubstituted phenylene group, -L1-L2- in the formula (12X) represents a group represented by one of the formulae (13-1) to (13-6), (10-1), (20-1), and (30-1). When L1 and L2 each independently represent a substituted or unsubstituted naphthylene group, a bonding position of the naphthylene group in L1 is different from a bonding position of the naphthylene group in L2.
    Type: Application
    Filed: November 26, 2020
    Publication date: October 26, 2023
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Yuki NAKANO, Taro YAMAKI, Hiroaki ITOI, Takamoto MORITA, Tomoki KATO, Nozomi TAJIMA, Satomi TASAKI, Kazuki NISHIMURA
  • Publication number: 20230330809
    Abstract: A wafer polishing method includes acquiring in-plane thickness distribution information regarding a wafer to be polished or a wafer subjected to the same processing treatment, determining a difference in pressure between a pressure Pc to be applied to the central part of the wafer by introducing a gas into the central region and a pressure Pe to be applied to the outer peripheral part of the wafer by introducing a gas into the outer peripheral region, determining any one pressure of Pc and Pe, and determining the other pressure, determining the pressure Pg to be applied, based on a set value Pr of a contact pressure to be applied to the lower surface of the second ring-shaped member due to contact with the polishing pad at the time of polishing, and bringing the lower surface of the wafer into contact with the polishing pad to conduct polishing.
    Type: Application
    Filed: July 1, 2021
    Publication date: October 19, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Hiroki OTA, Yuki NAKANO
  • Publication number: 20230335633
    Abstract: A wide bandgap semiconductor device includes a chip that includes a wide bandgap semiconductor and that has a main surface, a main surface electrode arranged on the main surface, and a thermosetting resin that includes a matrix resin and a plurality of fillers and that covers the main surface such as to expose a part of the main surface electrode.
    Type: Application
    Filed: February 3, 2022
    Publication date: October 19, 2023
    Inventors: Yuki NAKANO, Yasunori KUTSUMA
  • Patent number: 11784580
    Abstract: A switching device according to the present invention is a switching device for switching a load by on-off control of voltage, and includes an SiC semiconductor layer where a current path is formed by on-control of the voltage, a first electrode arranged to be in contact with the SiC semiconductor layer, and a second electrode arranged to be in contact with the SiC semiconductor layer for conducting with the first electrode due to the formation of the current path, while the first electrode has a variable resistance portion made of a material whose resistance value increases under a prescribed high-temperature condition for limiting current density of overcurrent to not more than a prescribed value when the overcurrent flows to the current path.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: October 10, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Hiroyuki Sakairi
  • Patent number: 11777030
    Abstract: A semiconductor device includes a semiconductor layer of a first conductivity type. A well region that is a second conductivity type well region is formed on a surface layer portion of the semiconductor layer and has a channel region defined therein. A source region that is a first conductivity type source region is formed on a surface layer portion of the well region. A gate insulating film is formed on the semiconductor layer and has a multilayer structure. A gate electrode is opposed to the channel region of the well region where a channel is formed through the gate insulating film.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: October 3, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Shuhei Mitani, Yuki Nakano, Heiji Watanabe, Takayoshi Shimura, Takuji Hosoi, Takashi Kirino
  • Patent number: 11750334
    Abstract: The data collection management device (10) is connected via a network to a plurality of communication devices (20) performing cyclic communication and includes: a network configuration storage (17) to store network configuration information indicating the communication devices participating in the cyclic communication; a data receiving unit (11) to receive communication data multicast from each communication device (20); a received data storage (12) to store the received communication data as collected data; a received data determination unit (13) to determine whether there is missing data in the collected data and identify unreceived communication data, based on information specifying communication cycles included in the collected data, on information specifying sender communication devices included in the collected data, and on network configuration information; and a retransmission requesting unit (15) to transmit a retransmission request of the unreceived communication data to one of the plurality of comm
    Type: Grant
    Filed: December 25, 2019
    Date of Patent: September 5, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Yuki Nakano
  • Patent number: 11749749
    Abstract: A semiconductor device includes a semiconductor layer having a first main surface on one side and a second main surface on the other side, a unit cell including a diode region of a first conductivity type formed in a surface layer portion of the first main surface of the semiconductor layer, a well region of a second conductivity type formed in the surface layer portion of the first main surface of the semiconductor layer along a peripheral edge of the diode region, and a first conductivity type region formed in a surface layer portion of the well region, a gate electrode layer facing the well region and the first conductivity type region through a gate insulating layer and a first main surface electrode covering the diode region and the first conductivity type region on the first main surface of the semiconductor layer, and forming a Schottky junction with the diode region and an ohmic junction with the first conductivity type region.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: September 5, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Takui Sakaguchi, Masatoshi Aketa, Yuki Nakano
  • Publication number: 20230253399
    Abstract: The semiconductor device of the present invention includes a semiconductor substrate, a switching element which is defined on the semiconductor substrate, and a temperature sense element which is provided on the surface of the semiconductor substrate independently from the switching element and characterized by being dependent on a temperature.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 10, 2023
    Inventor: Yuki NAKANO
  • Publication number: 20230242465
    Abstract: A compound represented by a formula (1) and having at least one deuterium atom is provided. In the formula (1), n is 1 to 4, L1 is a divalent group or a group represented by a formula (11) and R111 to R119 and R211 to R219 are each independently a hydrogen atom or a substituent, where the compound represented by the formula (1) does not include a group represented by —N(R906) (R907) and R906 and R907 are each independently a hydrogen atom, an alkyl group having 1 to 50 carbon atoms, or the like. In the formula (11), X13 is an oxygen atom or a sulfur atom, Y1 to Y8 are each independently CR300 or a nitrogen atom, and two of R300 are a single bond bonded with *a or other L1 and a single bond bonded with *b or other L1.
    Type: Application
    Filed: March 11, 2021
    Publication date: August 3, 2023
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Yuki NAKANO, Satomi TASAKI, Kazuki NISHIMURA, Hiroaki ITOI
  • Patent number: D994624
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: August 8, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Yuki Nakano, Kenji Yamamoto, Yasunori Kutsuma