Abstract: A structure for a variable-resistance element using an electrochemical reaction. The structure limits a position at which metal cross-linking breaks to a position most preferred for cross-linking break: namely, a part of an ion conduction layer closest to a first electrode. Also provided is a method for manufacturing the variable-resistance element, which has a first electrode serving as a source for a metal ion(s), a second electrode which is less ionizable (i.e. has a higher redox potential) than the first electrode, and an ion conduction layer which is interposed between the first and second electrodes and can conduct the metal ion(s). There is a first region in the ion conduction layer, adjacent to the first electrode, having a diffusion coefficient that increases continuously towards the first electrode right upto contacting the first electrode.

Abstract: A semiconductor integrated circuit includes a plurality of first non-volatile registers including a retention circuit that retains volatile data and one or more non-volatile elements capable of retaining non-volatile data, and a second non-volatile register that retains a load enable bit that decides in which one of the plurality of first non-volatile registers data is loaded. The semiconductor integrated circuit also includes a non-volatile register control circuit that, when supply power is delivered from outside, loads to the retention circuit data retained by the non-volatile element(s) contained in the first non-volatile register specified by the load enable bit loaded from the second non-volatile register (FIG. 1).

Abstract: A semiconductor device includes non-volatile registers, each including a holding circuit to hold data in a volatile manner and a non-volatile element. An address is allocated to each of the non-volatile registers. A non-volatile register control circuit performs control such that, in response to a write instruction, data held in the holding circuit is written to the non-volatile element in the non-volatile register having the address specified by the instruction and in response to a load instruction, data held in the non-volatile element is held in the holding circuit in the non-volatile register having the address specified by the instruction.

Abstract: Provided is an excellent nonvolatile storage device having advantageous in miniaturization and less variation in initial threshold value, and exhibiting a high writing efficiency, without an erasing failure and a retention failure. The nonvolatile storage device is characterized by including a film stack extending from between a semiconductor substrate and a gate electrode onto at least a surface of the gate electrode lying on a first impurity diffusion region side, the film stack including a charge accumulating layer and a tunnel insulating film sequentially from a gate electrode side.

Abstract: A switching element includes: a first electrode supplying metal ions; a second electrode less ionizable than the first electrode; and an ion conducting layer arranged between the first electrode and the second electrode and containing a metal oxide that can conduct the metal ions. The ion conducting layer includes two or more layers of different types, and one of the ion conducting layers that is closest to the first electrode has a larger diffusion coefficient for the metal ions than that of the other ion conducting layer(s).

Abstract: Provided is an excellent nonvolatile storage device having advantageous in miniaturization and less variation in initial threshold value, and exhibiting a high writing efficiency, without an erasing failure and a retention failure. The nonvolatile storage device is characterized by including a film stack extending from between a semiconductor substrate and a gate electrode onto at least a surface of the gate electrode lying on a first impurity diffusion region side, the film stack including a charge accumulating layer and a tunnel insulating film sequentially from a gate electrode side.

Abstract: A structure for a variable-resistance element using an electrochemical reaction. The structure limits a position at which metal cross-linking breaks to a position most preferred for cross-linking break: namely, a part of an ion conduction layer closest to a first electrode. Also provided is a method for manufacturing the variable-resistance element, which has a first electrode serving as a source for a metal ion(s), a second electrode which is less ionizable (i.e. has a higher redox potential) than the first electrode, and an ion conduction layer which is interposed between the first and second electrodes and can conduct the metal ion(s). There is a first region in the ion conduction layer, adjacent to the first electrode, having a diffusion coefficient that increases continuously towards the first electrode right upto contacting the first electrode.

Abstract: Provided are an architecture for a non-volatile memory device that can increase the write efficiency for split-gate trap memory, as well as increase resistance to disturbances; and a method of manufacturing said memory device. The device includes, at least: a layered film having traps, formed on top of the semiconductor substrate; a memory gate electrode formed on top of the layered film; a word gate electrode laid out so as to contact the memory gate electrode and the substrate through an insulating film; and source and drain regions in the substrate, sandwiching the two gate electrodes. The equivalent oxide thickness of the insulating film sandwiched between the word gate electrode and the substrate is made greater where the layered film is in contact than where there is no contact.

Abstract: A switching element includes: a first electrode supplying metal ions; a second electrode less ionizable than the first electrode; and an ion conducting layer arranged between the first electrode and the second electrode and containing a metal oxide that can conduct the metal ions. The ion conducting layer includes two or more layers of different types, and one of the ion conducting layers that is closest to the first electrode has a larger diffusion coefficient for the metal ions than that of the other ion conducting layer(s).

Abstract: Provided are an architecture for a non-volatile memory device that can increase the write efficiency for split-gate trap memory, as well as increase resistance to disturbances; and a method of manufacturing said memory device. The device includes, at least: a layered film having traps, formed on top of the semiconductor substrate; a memory gate electrode formed on top of the layered film; a word gate electrode laid out so as to contact the memory gate electrode and the substrate through an insulating film; and source and drain regions in the substrate, sandwiching the two gate electrodes. The equivalent oxide thickness of the insulating film sandwiched between the word gate electrode and the substrate is made greater where the layered film is in contact than where there is no contact.

Abstract: Provided is an excellent nonvolatile storage device having advantageous in miniaturization and less variation in initial threshold value, and exhibiting a high writing efficiency, without an erasing failure and a retention failure. The nonvolatile storage device is characterized by including a film stack extending from between a semiconductor substrate and a gate electrode onto at least a surface of the gate electrode lying on a first impurity diffusion region side, the film stack including a charge accumulating layer and a tunnel insulating film sequentially from a gate electrode side.