Patents by Inventor Yukio Shakuda

Yukio Shakuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8934513
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: January 13, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8709843
    Abstract: The present invention provides a method of manufacturing a nitride semiconductor capable of improving the crystallinity and the surface state of the nitride semiconductor crystal formed on top of a high-temperature AlN buffer layer. An AlN buffer layer is formed on top of a growth substrate, and then nitride semiconductor crystals are grown on top of the AlN buffer layer. In a stage of manufacturing the nitride semiconductor, the crystal of the AlN buffer layer is grown at a high temperature of 900° C. or higher. In addition, an Al-source material of the AlN buffer layer is started to be supplied first to a reaction chamber and continues to be supplied without interruption, and then a N-source material is supplied intermittently.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: April 29, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8421119
    Abstract: A GaN related compound semiconductor element includes: a channel layer made of a GaN related compound semiconductor; and a source layer and a drain layer, which are disposed in a manner of sandwiching the channel layer. The source layer includes two adjacent ridge portions which are formed by selective growth. A source electrode is formed over the surface, sandwiched by the ridge portions, of the channel layer, and the surfaces of the respective two adjacent ridge portions. The selective-growth mask formed between the two ridge portions is removed by wet etching. In addition, as another embodiment, a gate electrode is formed in a manner that the direction of the longer dimension of the gate electrode is aligned with the m plane of the channel layer. Moreover, as still another embodiment, the channel layer has a multilayer structure in which a GaN layer doped with no impurity is used as an intermediate layer.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: April 16, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8411718
    Abstract: The present invention provides a nitride semiconductor light-emitting device capable of preventing shortening of the device lifetime due to increase in the driving voltage of the device and internal heat generation, and also providing uniform laser characteristics, even if the device has a ridge stripe structure. On a GaN substrate 1, an n-type GaN layer 2, an n-type AlGaN layer 3, an active layer 4, a p-type AlGan layer 5 and a p-type GaN layer 6 are laminated sequentially. On the p-type GaN layer 6, an insulating film 7 and a transparent electrode 8 are formed. A portion of the transparent electrode 8 is formed in contact with the p-type GaN layer 6. A ridge stripe portion D to form a waveguide is configured of a transparent film 9. A region, where the transparent electrode 8 and the p-type GaN layer 6 are in contact with each other, serves as a stripe-shaped current injection region.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: April 2, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8399895
    Abstract: Provided is a semiconductor light emitting device which includes a number of hexagon-shaped semiconductor light emitting elements formed two-dimensionally, and in which the positive electrodes and the negative electrodes are formed on its light outputting surface side lest the light outputting efficiency should decrease. A mask 11 for selective growth is formed on a substrate 1 for growth, and an AlN buffer layer 2 is formed in regions from each of which a part of the mask 11 for selective growth is removed. An undoped GaN layer 3, an n-type GaN layer 4, an active layer 5 and a p-type GaN layer 6 are sequentially stacked on the AlN buffer layer 2. An isolation groove A for isolating the elements from one another is formed.
    Type: Grant
    Filed: January 9, 2009
    Date of Patent: March 19, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8101963
    Abstract: A semiconductor light emitter (A) includes an n-type semiconductor layer (2), a p-type semiconductor layer (4), and an active layer (3) between these two layers (2, 4). The light emitter (A) further includes an n-side electrode (5) on the n-type layer (2) and a p-side electrode (6) on the p-type layer (4). An insulating layer (7) covers the n-type and p-type layers (2),(4), while also partially covering the n-side and p-side electrodes (5),(6), leaving part of the electrodes (5, 6) exposed. The n-side electrode (5) has a first Al layer (51) formed on the n-type layer (2) and a second Ni, W, Zr or Pt layer (52) formed on the first layer (51). The p-side electrode (6) has a first Au layer (61) formed on the p-type layer (4), and a second Ni, W, Zr or Pt layer (62) formed on the first layer (61).
    Type: Grant
    Filed: July 3, 2007
    Date of Patent: January 24, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8097532
    Abstract: To provide a method for manufacturing a semiconductor light emitting device capable of providing sufficiently low operating voltage. The method for manufacturing a semiconductor light emitting device of the present invention includes: a semiconductor laminating step of laminating a plurality of nitride semiconductor layers of to form a semiconductor laminating structure; and an electrode forming step of forming n-side electrode and p-side electrodes on the n-type and p-type semiconductor layers. In the electrode forming step, after a first metallic layer including a Ni layer constituting a part of the n-side electrode is formed on a surface of a forming region of the n-side electrode, the first metallic layer is annealed in an atmosphere containing nitrogen and oxygen.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: January 17, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 8030669
    Abstract: There is provided a highly reliable semiconductor light emitting device even in using for street lamps or traffic signals, which can be used in place of electric lamps or fluorescent lamps by protecting from surges such as static electricity or the like. A plurality of light emitting units (1) are formed, by forming a semiconductor lamination portion by laminating semiconductor layers on a substrate so as to form a light emitting layer, by electrically separating the semiconductor lamination portion into a plurality, and by providing a pair of electrodes (19) and (20). The light emitting units (1) are respectively connected in series and/or in parallel with wiring films (3). An inductor (8) absorbing surges is connected, in series, to the plurality of light emitting units (1) connected in series between electrode pads (4a) and (4b) connected to an external power source. For an example, the inductor (8) is formed by arranging the plurality of light emitting units (1) in a whirl shape.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: October 4, 2011
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Toshio Nishida, Masayuki Sonobe
  • Publication number: 20110176571
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Application
    Filed: January 20, 2011
    Publication date: July 21, 2011
    Applicant: Rohm Co., Ltd.
    Inventor: Yukio SHAKUDA
  • Patent number: 7977703
    Abstract: A nitride semiconductor device includes a semiconductor substrate; a first nitride semiconductor layer provided on the semiconductor substrate; a mask layer having opening portions, provided on the first nitride semiconductor layer; a second nitride semiconductor layer selectively grown on the mask layer laterally from the opening portions; and a semiconductor lamination portion formed by laminating nitride semiconductor layers so as to form a semiconductor element on the second nitride semiconductor layer. The substrate may be made of a zinc-based compound, the first nitride semiconductor layer may be provided on, and in contact with, the substrate, and at least a substrate side of the first nitride semiconductor layer may be made of AlyGa1-yN (0.05?y?0.2). Additionally, the semiconductor element may be a light emitting layer in which case the mask layer may include a metal film provided on the first nitride semiconductor layer and an insulating film provided on the metal film.
    Type: Grant
    Filed: November 21, 2006
    Date of Patent: July 12, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7973321
    Abstract: As an example of a nitride semiconductor light emitting device, on a sapphire substrate, a GaN buffer layer, an n-type GaN contact layer, an MQW active layer, and a p-type GaN contact layer are sequentially stacked, and a partial region from the p-type GaN contact layer to the middle of the n-type GaN contact layer is mesa-etched so as to form an n electrode. Meanwhile, a p electrode is provided on the p-type GaN contact layer, and, in addition to the p electrode, multiple ridge parts are formed by crystal growth so as to be scattered. By providing the multiple ridge parts, device characteristics can be improved without causing damage on the GaN-based semiconductor layer.
    Type: Grant
    Filed: November 5, 2008
    Date of Patent: July 5, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Publication number: 20110121337
    Abstract: The present invention provides a nitride semiconductor light-emitting device capable of preventing shortening of the device lifetime due to increase in the driving voltage of the device and internal heat generation, and also providing uniform laser characteristics, even if the device has a ridge stripe structure. On a GaN substrate 1, an n-type GaN layer 2, an n-type AlGaN layer 3, an active layer 4, a p-type AlGan layer 5 and a p-type GaN layer 6 are laminated sequentially. On the p-type GaN layer 6, an insulating film 7 and a transparent electrode 8 are formed. A portion of the transparent electrode 8 is formed in contact with the p-type GaN layer 6. A ridge stripe portion D to form a waveguide is configured of a transparent film 9. A region, where the transparent electrode 8 and the p-type GaN layer 6 are in contact with each other, serves as a stripe-shaped current injection region.
    Type: Application
    Filed: December 19, 2008
    Publication date: May 26, 2011
    Applicant: ROHM CO., LTD.
    Inventor: Yukio Shakuda
  • Patent number: 7939833
    Abstract: There is provided a nitride semiconductor light emitting device having high internal quantum efficiency by accelerating recombination radiation while employing a multiple quantum well structure in which each of well layers has a relatively large thickness. The nitride semiconductor light emitting device is provided with a nitride semiconductor lamination portion (6) provided on a substrate (1). The nitride semiconductor lamination portion (6) includes at least an active layer (4) in which a light emitting portion is formed. And the active layer is constituted with a multiple quantum well structure formed by laminating well layers (7) made of InxGa1-xN (0<x?1), and barrier layers (8) made of AlyInzGa1-y-zN (0?y<1, 0?z<1, 0?y+z<1, z<x) alternately.
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: May 10, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7902770
    Abstract: A light emitting element group includes a plurality of light emitting element units connected in series. A first current limiting circuit is arranged in series with the light emitting element group, and limits a first drive current flowing from one end to the other end of the light emitting element group. A second current limiting circuit is arranged in parallel to the first current limiting circuit, and limits a second drive current flowing in an opposite direction to the first drive current in the light emitting element group. The light emitting element units are configured to include a first light emitting element and a second light emitting element; an anode of the first light emitting element and a cathode of the second light emitting element are connected, and an anode of the second light emitting element and a cathode of the first light emitting element are connected.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: March 8, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7899101
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: March 1, 2011
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 7847305
    Abstract: A plurality of transistors are formed on a substrate in a plurality of columns. Each transistor has a first conductivity type region and second conductivity type regions provided on both sides thereof in a column direction, and has an active layer on the side of each second conductivity type region closer to the substrate. Between two columns adjacent to each other, the second conductivity type region on a first side in the column direction of each transistor arranged on a first column, the second conductivity type region on a second side in the column direction of the transistor adjacent to this transistor on the first side in the column direction and the first conductivity type region of each transistor arranged on a second column are electrically connected by a first wire.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: December 7, 2010
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Publication number: 20100289041
    Abstract: Provided is a semiconductor light emitting device which includes a number of hexagon-shaped semiconductor light emitting elements formed two-dimensionally, and in which the positive electrodes and the negative electrodes are formed on its light outputting surface side lest the light outputting efficiency should decrease. A mask 11 for selective growth is formed on a substrate 1 for growth, and an AlN buffer layer 2 is formed in regions from each of which a part of the mask 11 for selective growth is removed. An undoped GaN layer 3, an n-type GaN layer 4, an active layer 5 and a p-type GaN layer 6 are sequentially stacked on the AlN buffer layer 2. An isolation groove A for isolating the elements from one another is formed.
    Type: Application
    Filed: January 9, 2009
    Publication date: November 18, 2010
    Applicant: ROHM CO., LTD.
    Inventor: Yukio Shakuda
  • Publication number: 20100096649
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Application
    Filed: October 14, 2009
    Publication date: April 22, 2010
    Applicant: Rohm Co., Ltd.
    Inventor: Yukio SHAKUDA
  • Publication number: 20090305448
    Abstract: To provide a method for manufacturing a semiconductor light emitting device capable of providing sufficiently low operating voltage. The method for manufacturing a semiconductor light emitting device of the present invention includes: a semiconductor laminating step of laminating a plurality of nitride semiconductor layers of to form a semiconductor laminating structure; and an electrode forming step of forming n-side electrode and p-side electrodes on the n-type and p-type semiconductor layers. In the electrode forming step, after a first metallic layer including a Ni layer constituting a part of the n-side electrode is formed on a surface of a forming region of the n-side electrode, the first metallic layer is annealed in an atmosphere containing nitrogen and oxygen.
    Type: Application
    Filed: December 4, 2006
    Publication date: December 10, 2009
    Applicant: ROHM CO., LTD.
    Inventor: Yukio Shakuda
  • Publication number: 20090283782
    Abstract: There is provided a nitride semiconductor light emitting device having a vertical type device in which a pair of electrodes is formed on both sides of a chip, by using a semiconductor substrate, and having high luminous efficiency by using MgxZn1-xO (0?x?0.5) as the substrate which is enable to prevent light absorption by the substrate while maintaining high thermal conductivity, and also enable to reduce dislocation density of a nitride semiconductor layer grown on the substrate. A substrate (1) is made of a zinc oxide based compound such as MgxZn1-xO (0?x?0.5), a first nitride semiconductor layer (2) is provided in contact with the substrate (1), a mask layer (4) having opening portions and a second nitride semiconductor layer (5) selectively grown laterally from the opening portions are formed on the first nitride semiconductor layer, and nitride semiconductor layers (6) to (8) are laminated on the second nitride semiconductor layer so as to form a semiconductor element.
    Type: Application
    Filed: November 21, 2006
    Publication date: November 19, 2009
    Applicant: Rohm Co., Ltd.
    Inventor: Yukio Shakuda