Patents by Inventor Yukio Shakuda

Yukio Shakuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6298079
    Abstract: In a semiconductor laser which uses a semiconductor of GaN type compound, an optimum material is used for a current blocking layer, so that it is made possible to obtain a semiconductor laser that satisfies a gain guiding structure of high light emitting efficiency or a refractive index guiding structure or both, thereby facilitating control of the noise of oscillated light (reduction of noise), control of the spread of light in lateral direction, and control of the longitudinal mode.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: October 2, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Haruo Tanaka, Yukio Shakuda
  • Patent number: 6274891
    Abstract: In a semiconductor laser which uses a semiconductor of GaN type compound, an optimism material is used for a current blocking layer, so that it is made possible to obtain a semiconductor laser that satisfies a gain guiding structure of high light emitting efficiency or a refractive index guiding structure or both, thereby facilitating control of the noise of oscillated light (reduction of noise), control of the spread of light in lateral direction, and control of the longitudinal mode.
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: August 14, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Haruo Tanaka, Yukio Shakuda
  • Patent number: 6258619
    Abstract: A semiconductor light emitting device includes a substrate, an n-type layer formed of gallium-nitride based compound semiconductor formed on the substrate, and a p-type layer formed of gallium-nitride based compound semiconductor formed on the substrate. Semiconductor overlying layers are constituted by the n-type layer and the p-type layer on the substrate. A light emitting layer is formed together with the n-type and p-type layers in the semiconductor overlying layers to emit light. At least one of the n-type layer and the p-type layer is formed by three or more overlying sublayers including a sublayer of AlyGa1-yN (0<y≦0.5) and a sublayer of AluGa1-uN (0≦u<y). With this structure, the semiconductor light emitting device is almost free from lattice mismatch to thereby enhance electron mobility and hence light emission efficiency even where the overlying semiconductor layers are different in lattice constant from the substrate.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 10, 2001
    Assignee: Rohm LTD
    Inventors: Masayuki Sonobe, Shunji Nakata, Yukio Shakuda, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6238947
    Abstract: A structure consisting of a substrate and a gallium nitride based compound semiconductor formed on the substrate, includes: a light-emitting layer forming portion consisting at least of a semiconductor layer of a first conductivity type (an n-type cladding layer) and a semiconductor layer of a second conductivity type (a p-type cladding layer); a current blocking layer of the first conductivity type, which is formed within a semiconductor layer of the second conductivity type and in close proximity to the light-emitting layer forming portion, and a portion of which is removed in a region where a current flows; and electrodes connected to the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type, respectively.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: May 29, 2001
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 6236067
    Abstract: A semiconductor light emitting device is disclosed. An emitting layer forming portion for forming an emitting layer made of a compound semiconductor of AlGaInP group or AlGaAs group including a n-type layer, an active layer and a p-type layer laid one on another is formed on a GaAs substrate. Further, a current diffusion layer of GaP is formed on the front surface of the emitting layer forming portion. The p-type layer between the active layer and the current diffusion layer is formed to the thickness of not less than about 2 &mgr;m, or the current diffusion layer is formed to the thickness of about 3 to 7 &mgr;m. As a result, the semiconductor light emitting device of a high luminance is thus realized, in which the distortion due to the lattice mismatch has no effect on the emitting layer.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: May 22, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Yukio Matsumoto, Shunji Nakata
  • Patent number: 6194241
    Abstract: A semiconductor layered portion is formed of a gallium-nitride semiconductor overlying a substrate and having an n-type layer and a p-type layer to form a light emitting layer having a pn junction or a doublehetero junction. A gradient layer is provided at an interfacial portion between an lower layer and an upper layer of the semiconductor layered portion, wherein the gradient layer has a composition varied from a composition from said lower layer to a composition of the upper layer. With this structure, a semiconductor light emitting device which is excellent in light emitting efficiency is provided by reducing crystal lattice mismatch between semiconductor layers formed different in lattice constant on a substrate.
    Type: Grant
    Filed: April 14, 1998
    Date of Patent: February 27, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Tsuyoshi Tsutsui, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Norikazu Itoh
  • Patent number: 6168962
    Abstract: Disclosed is a method of manufacturing a semiconductor light emitting device. Semiconductor overlying layers are formed on a substrate in a state of a wafer so that a light emitting area is provided therein. The semiconductor overlying layers includes first and second conductivity type layers. Part of the semiconductor overlying layers including the first conductivity type layer on a surface thereof is removed so as to expose part of the second conductivity type layer. Electrodes are formed, for each chip, respectively in connection with the surface of the first conductivity type layer and the surface of the exposed second conductivity type layer. The wafer is divided into individual chips. The exposed areas of the second conductivity type semiconductor layer is provided only part of a peripheral area of the chip so that the first conductivity type semiconductor layer is directly separated during dividing the wafer into individual chips.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: January 2, 2001
    Assignee: Rohm Co., Ltd.
    Inventors: Norikazu Itoh, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Tsuyoshi Tsutsui
  • Patent number: 6163037
    Abstract: An active layer is sandwiched between the n-type cladding layer and the p-type cladding layer, forming a light emitting layer forming portion. The n-type cladding layer has a carrier concentration of non-doped or less than 5.times.10.sup.17 cm.sup.-3 on a side thereof close to the active layer, and a carrier concentration of 7.times.10.sup.17 -7.times.10.sup.18 cm .sup.-3 on a side thereof remote from the active layer. With this structure, it is possible to suppress to a minimum the deterioration of crystallinity at an interface between the active layer and the n-type cladding layer as well as in the active layer. thereby providing a semiconductor light emitting device high in brightness.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: December 19, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Matsumoto, Shunji Nakata, Yukio Shakuda
  • Patent number: 6156584
    Abstract: Deposited on a wafer-like substrate for forming a plurality of light emitting device chips is a semiconductor layer laminate with a different property from that of the substrate. Then, electrodes are provided on and in electric connection with a top semiconductor layer of a first conductivity type of the semiconductor layer laminate, and on and in electric connection with a semiconductor layer of a second conductivity type, exposed by locally etching the semiconductor layer laminate, in association with the individual chips. Then, the semiconductor layer laminate is etched at boundary portions between the chips to expose the substrate, and the substrate is broken at the exposed portions into the chips. As the semiconductor layer laminate is etched out at the boundary portions between the chips before breaking the wafer, breaking can be facilitated without damaging the light emitting portions of the semiconductor layer laminate. This helps provide high-performance semiconductor light emitting devices.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: December 5, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Norikazu Itoh, Shunji Nakata, Yukio Shakuda, Masayuki Sonobe, Tsuyoshi Tsutsui
  • Patent number: 6121656
    Abstract: A semiconductor memory device in which a stored information can be simply erased only by an electric signal so as to be rewritten is provided. The semiconductor memory device includes (a) a semiconductor chip having an array of memory cells, stored information in the memory cells being erasable by light irradiation; (b) a light emitting element irradiating a light into the memory cells portion of the semiconductor chip; and (c) a package in which the semiconductor chip and the light emitting element are encapsulated with a resin in one body.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: September 19, 2000
    Assignee: Rohm Co. Ltd.
    Inventors: Haruo Tanaka, Yukio Shakuda
  • Patent number: 6115399
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: September 5, 2000
    Assignee: Rohm Co. Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 6107644
    Abstract: A semiconductor light emitting device has semiconductor layers including a first conductivity type semiconductor layer and a second conductivity type semiconductor layer formed on a substrate. A first electrode is formed in electrical connection with the first conductivity type semiconductor layer on a surface side of the semiconductor layers. The second conductivity type semiconductor layer is exposed by partly etch-removing an end portion of the semiconductor layers. A second electrode is provided in electrical connection with the exposed second conductivity type layer. The first and second electrodes are formed such that the electrodes are in parallel, in plan form, with each other at opposite portions thereof. As a result, the current path is constant in electric resistance, providing a semiconductor light emitting device that is constant in brightness, long in service life and high in brightness.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: August 22, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Shunji Nakata, Masayuki Sonobe, Tsuyoshi Tsutsui, Norikazu Itoh
  • Patent number: 6107648
    Abstract: A light emitting layer forming portion is formed of an AlGaInP-based compound semiconductor and having an n-type layer and a p-type layer to form a light emitting layer on the substrate. A large bandgap energy semiconductor layer is provided on a surface of the light emitting layer forming portion to constitute a window layer. A buffer layer is interposed between the light emitting layer forming portion and the large bandgap energy semiconductor layer to relieve lattice mismatch of between the light emitting layer forming portion and the large bandgap energy semiconductor layer. The interposition of this buffer layer provides a light emitting device that is high in light emitting efficiency and excellent in electrical characteristics without degrading the film property of the window layer.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: August 22, 2000
    Assignee: Rohm Co., Ltd.
    Inventors: Yukio Shakuda, Shunji Nakata, Yukio Matsumoto
  • Patent number: 6107647
    Abstract: A semiconductor light emitting device has a light emitting layer forming portion formed on the substrate and having an n-type layer and a p-type layer to provide a light emitting layer. A window layer is formed on a surface side of the light emitting layer forming portion. The window layer is formed of AlyGal-yAs (0.6.ltoreq.y.ltoreq.0.8) auto-doped in a carrier concentration of 5.times.10.sup.18 -3.times.10.sup.19 cm.sup.-3. The resulting semiconductor light emitting device is free of degradation in crystallinity due to p-type impurity doping, thereby provide a high light emitting efficiency and brightness without encountering device degradation or damage.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: August 22, 2000
    Assignee: Rohm Co. Ltd.
    Inventors: Yukio Matsumoto, Shunji Nakata, Yukio Shakuda
  • Patent number: 6087681
    Abstract: A light emitting device employing gallium nitride type compound semiconductor which generates no crystal defect, dislocation and can be separated easily to chips by cleavage and a method for producing the same are provided. As a substrate on which gallium nitride type compound semiconductor layers are stacked, a gallium nitride type compound semiconductor substrate, a single-crystal silicon, a group II-VI compound semiconductor substrate, or a group III-IV compound semiconductur substrate is employed.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: July 11, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 6084899
    Abstract: A semiconductor light emitting device of double hetero junction includes an active layer and clad layers. The clad layers include an n-type layer and p-type layer. The clad layers sandwich the active layer. A band gap energy of the clad layers is larger than that of the active layer. The band gap energy of the n-type clad layer is smaller than of the p-type clad layer.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: July 4, 2000
    Assignee: Rohm Co. Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 6072819
    Abstract: A structure consisting of a substrate and a gallium nitride based compound semiconductor formed on the substrate includes a light-emitting layer forming portion consisting at least of a semiconductor layer of a first conductivity type (an n-type cladding layer) and a semiconductor layer of a second conductivity type (a p-type cladding layer); a current blocking layer of the first conductivity type, which is formed within a semiconductor layer of the second conductivity type and in close proximity to the light-emitting layer forming portion, and a portion of which is removed in a region where a current flow, and electrodes connected to the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type, respectively.
    Type: Grant
    Filed: May 21, 1997
    Date of Patent: June 6, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 6060727
    Abstract: A light emitting semiconductor device is provided which comprises a common substrate having a support surface, and a plurality of laminate structures formed at different regions on the support surface of the common substrate. Each of the laminate structures has at least one N-type layer, a light emitting layer and at least one P-type layer. The light emitting layer emits light at least perpendicularly to the support surface of the substrate. The laminate structures at the different regions are made to emit light of a different wavelength.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: May 9, 2000
    Assignee: Rohm Co., Ltd.
    Inventor: Yukio Shakuda
  • Patent number: 5981978
    Abstract: A superluminiscent diode includes: a semiconductor substrate of a first conductivity type lower cladding layer of the first conductivity type is provided on the semiconductor substrate. An active layer is provided on the lower cladding layer. An upper cladding layer of a second conductivity type opposite to the first conductivity type bis provided on the active layer. A current blocking layer of the first conductivity type, buried in the upper cladding layer. The current blocking layer has a stripe-shaped groove serving as a current-injection region. The current-injection region is formed in a manner that is extends from an end face of a chip to the inside of the chip, and has a length shorter than that of the chip. The current blocking layer is made of a material having a band gap energy not greater than that of the active layer and a refractive index not smaller than that of the active layer so that light advancing in the active layer is absorbable.
    Type: Grant
    Filed: June 27, 1996
    Date of Patent: November 9, 1999
    Assignee: Rohm Co., Ltd.
    Inventors: Masato Mushiage, Tatsuo Yamauchi, Yukio Shakuda
  • Patent number: 5974069
    Abstract: In a semiconductor laser which uses a semiconductor of GaN type compound, an optimum material is used for a current blocking layer, so that it is made possible to obtain a semiconductor laser that satisfies a gain guiding structure of high light emitting efficiency or a refractive index guiding structure or both, thereby facilitating control of the noise of oscillated light (reduction of noise), control of the spread of light in lateral direction, and control of the longitudinal mode.
    Type: Grant
    Filed: July 14, 1997
    Date of Patent: October 26, 1999
    Assignee: Rohm Co., Ltd
    Inventors: Haruo Tanaka, Yukio Shakuda