Patents by Inventor Yukito Tsunoda
Yukito Tsunoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8064779Abstract: A receiving apparatus which suppresses threshold-voltage changes. A peak voltage detection block detects the peak voltage of a signal. A bottom voltage detection block detects the bottom voltage of the signal. A stop control block generates a stop signal for stopping the operations to detect the peak voltage and the bottom voltage. A threshold value specification block specifies a threshold voltage derived from the peak voltage and the bottom voltage. When receiving the stop signal, the peak voltage detection block stops the operation to detect the peak voltage and retains the peak voltage detected before the reception of the stop signal while the same signal is being received. When receiving the stop signal, the bottom voltage detection block stops the operation to detect the bottom voltage and retains the bottom voltage detected before the reception of the stop signal while the same signal is being received.Type: GrantFiled: November 16, 2007Date of Patent: November 22, 2011Assignee: Fujitsu LimitedInventor: Yukito Tsunoda
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Patent number: 8023776Abstract: A Mach-Zehnder type optical modulator includes an optical waveguide formed in an electro-optical substrate, an input section that inputs light to the optical waveguide, a plurality of branch modulation sections that generate branched input light, extend from the input section and modulate the branched input light, an interference photocoupler including a plurality of input ports and a plurality of output ports, the input ports being coupled to the branch modulation sections, and an output photocoupler including a plurality of input ports coupled to the output ports of the interference photocoupler and also including a plurality of output ports.Type: GrantFiled: August 6, 2009Date of Patent: September 20, 2011Assignee: Fujitsu LimitedInventor: Yukito Tsunoda
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Publication number: 20110181451Abstract: A parallel-serial converter includes a converter circuit that converts parallel data into serial data; a first sampling circuit that samples, according to a first clock signal, the serial data output from the converter circuit; a second sampling circuit that samples, according to a second clock signal that is an inverse of the first clock signal, replica data that is synchronized with the serial data; a third sampling circuit that samples, according to plural third signals respectively having different phases, output from the second sampling circuit; and a control circuit that controls sampling timing of the first sampling circuit, based on each output from the third sampling circuit.Type: ApplicationFiled: January 6, 2011Publication date: July 28, 2011Applicant: FUJITSU LIMITEDInventor: Yukito Tsunoda
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Publication number: 20110122002Abstract: In a parallel-serial converter circuit of a multistage configuration, there is formed a clock propagation path so that when multistage connected data converters are operated according to the timing of a clock signal, a reference clock signal or a clock signal in which the reference clock signal has been frequency-converted, is given sequentially to the data converter of the first stage up to the data converter of the final stage. As a result, even in a case where variations occur in power supply voltage, timing deviation of data signals and clock signals input to the data converters of the second and subsequent stages can be suppressed, and parallel-serial conversion of high-speed data signals can be reliably executed.Type: ApplicationFiled: October 19, 2010Publication date: May 26, 2011Applicant: FUJITSU LIMITEDInventor: Yukito TSUNODA
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Publication number: 20110068959Abstract: A parallel data output device includes a first latch circuit that latches and outputs one of at least two data signals input in parallel in accordance with a first clock signal; a second latch circuit that latches and outputs another of the at least two data signals in accordance with a second clock signal; and a phase set circuit that shifts at least one of a phase of the first clock signal and a phase of the second clock signal based on the phase of the first clock signal and the phase of the second clock signal.Type: ApplicationFiled: September 17, 2010Publication date: March 24, 2011Applicant: FUJITSU LIMITEDInventor: Yukito TSUNODA
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Patent number: 7893760Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.Type: GrantFiled: August 26, 2009Date of Patent: February 22, 2011Assignee: Fujitsu LimitedInventors: Mariko Sugawara, Yukito Tsunoda
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Patent number: 7876491Abstract: To take out monitor light unaffected by a multilevel optical phase-modulated component. For the purpose, a phase-shift unit that controls phases of plural (n, n is an integral number equal to or greater than 2) input lights, plural (n, n is an integral number equal to or greater than 2) phase modulating units that respectively phase-modulate the input lights from the phase-shift units, a first coupling unit that couples and outputs the phase-modulated lights from the plural phase modulating units as multilevel optical phase-modulated signal light, and a second coupling unit that couples and outputs non-phase-modulated lights from the plural phase modulating units as coupled light are provided.Type: GrantFiled: August 11, 2008Date of Patent: January 25, 2011Assignee: Fujitsu LimitedInventors: Satoshi Ide, Yukito Tsunoda
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Publication number: 20100302081Abstract: There is provided a parallel-serial converter including a selector to convert parallel data to serial data, a flip-flop to which the serial data are input so as to latch the serial data, a generator to generate replica data simulating the serial data, a detector to detect a first switching point of the replica data and a second switching point subsequent to the first switching point, and a controller to control relative timings of timing converted to the serial data in the selector and timing when the serial data is latched in the flip-flop, based on the first switching point and the second switching point.Type: ApplicationFiled: May 20, 2010Publication date: December 2, 2010Applicant: FUJITSU LIMITEDInventors: Mariko Sugawara, Yukito Tsunoda, Tetsuji Yamabana
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Publication number: 20100176877Abstract: A current source generates a direct-current potential at a terminal of a resistor by supplying a current to the resistor and a diode-connected transistor coupled to the resistor in series.Type: ApplicationFiled: November 18, 2009Publication date: July 15, 2010Applicant: FUJITSU LIMITEDInventors: Mariko SUGAWARA, Yukito TSUNODA, Satoshi IDE
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Publication number: 20100158541Abstract: An optical communication apparatus includes a receiver configured to receive an optical signal transmitted from an optical transmitting apparatus; a detector configured to detect a predetermined pattern signal included in the optical signal; a calculator configured to calculate, based on a waveform of the predetermined pattern signal, an amount of dispersion of the predetermined pattern signal; and a compensator configured to compensate for dispersion according to the amount of dispersion.Type: ApplicationFiled: February 24, 2010Publication date: June 24, 2010Applicant: FUJITSU OPTICAL COMPONENTS LIMITEDInventors: Yukito Tsunoda, Satoshi Ide, Kazuyuki Mori
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Publication number: 20100158539Abstract: A plurality of inductors are connected in series between a load resistor and a first transistor, and a plurality of second transistors provided in parallel are connected to the plurality of inductors.Type: ApplicationFiled: November 12, 2009Publication date: June 24, 2010Applicant: FUJITSU LIMITEDInventor: Yukito TSUNODA
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Publication number: 20100135678Abstract: There is provided an optical receiving device for deriving a signal using for data identification. The optical receiving device includes a demodulator for demodulating a modulated optical signal to an demodulated optical signal, a convertor for converting the demodulated optical signal to a first and a second electric signals, a generator for generating a complement signal by summing the first electric signal of a normal in phase component and the second electric signal of a reverse in phase component, and a suppressor for suppressing, by the use of the complement signal, a variation of potential which appears in a data signal at a time of phase changing of the modulated optical signal, the data signal being a difference of the normal in phase component and the reverse in phase component.Type: ApplicationFiled: November 23, 2009Publication date: June 3, 2010Applicant: FUJITSU LIMITEDInventors: Mariko SUGAWARA, Yukito Tsunoda, Satoshi Ide
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Publication number: 20100052790Abstract: An amplifier circuit includes a first amplifier amplifying an input signal and outputting a first amplified signal, a second amplifier amplifying the first amplified signal and outputting a second amplified signal, and a feedback circuitry feeding back the second amplified signal to the input of the second amplifier. The feedback circuitry includes a feedback transistor that keeps the input level of the second amplifier constant.Type: ApplicationFiled: August 26, 2009Publication date: March 4, 2010Applicant: FUJITSU LIMITEDInventors: Yukito Tsunoda, Mariko Sugawara
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Publication number: 20100052791Abstract: An amplifier circuit including: a multistage amplifier unit including an input-stage transistor and an output-stage transistor and configured to amplify an input signal and to output an amplified signal; and a feedback unit including a first feedback transistor, a second feedback transistor, and a feedback resistor, and configured to feed back the amplified signal to an input of the output-stage transistor in the multistage amplifier unit via the first feedback transistor, the second feedback transistor, and the feedback resistor.Type: ApplicationFiled: August 26, 2009Publication date: March 4, 2010Applicant: FUJITSU LIMITEDInventors: Mariko Sugawara, Yukito Tsunoda
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Publication number: 20100040321Abstract: A Mach-Zehnder type optical modulator includes an optical waveguide formed in an electro-optical substrate, an input section that inputs light to the optical waveguide, a plurality of branch modulation sections that generate branched input light, extend from the input section and modulate the branched input light, an interference photocoupler including a plurality of input ports and a plurality of output ports, the input ports being coupled to the branch modulation sections, and an output photocoupler including a plurality of input ports coupled to the output ports of the interference photocoupler and also including a plurality of output ports.Type: ApplicationFiled: August 6, 2009Publication date: February 18, 2010Applicant: FUJITSU LIMITEDInventor: Yukito TSUNODA
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Publication number: 20090238582Abstract: In an optical receiver, a light receiving element receives the optical packet signals and converts the optical packet signals to electrical signals. A bias voltage supply section supplies bias voltage to the light receiving element. A monitoring section monitors an input level of each optical packet signal or each electrical signal and transmits a monitored value to the bias voltage supply section. In addition, the bias voltage supply section temporarily increases the bias voltage according to magnitude of the monitored value after an end of receiving of each optical packet signal.Type: ApplicationFiled: May 29, 2009Publication date: September 24, 2009Applicant: FUJITSU LIMITEDInventors: Yukito TSUNODA, Satoshi IDE, Shinichi SAKURAMOTO, Kazuyuki MORI, Toru MATSUYAMA
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Publication number: 20090148167Abstract: A communication apparatus time-division multiplexes a first signal transmitted at a first bit rate and a second signal transmitted at a second bit rate which is an integer multiple of the first bit rate, and sends out the first signal and the second signal to one line. The communication apparatus includes a pulse generating unit and a pulse superimposing unit. The pulse generating unit generates repetitive pulses having a width equal to a width of the first signal. The pulse superimposing unit superimposes the pulses generated by the pulse generating unit on the second signal.Type: ApplicationFiled: February 4, 2009Publication date: June 11, 2009Applicant: FUJITSU LIMITEDInventor: Yukito Tsunoda
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Publication number: 20090141333Abstract: A light modulation device capable of stabilizing a phase set in phase modulation processing and improving optical communication quality. A phase modulator is provided for each of plural branched input lights and performs phase modulation of the input light. A phase shifter is provided at the upstream or downstream of the phase modulator and shifts a phase of the input light or of the phase-modulated light. A light interference section causes the output lights from the light modulator to interfere with each other to generate a multilevel phase modulated signal and interference light having a phase state different from that of the modulated signal. A monitor receives the interference light and outputs an electric signal according to the intensity. A phase shift controller generates a phase control signal based on the electric signal and applies the signal to the shifter to control the phase shift amount to be set by the shifter.Type: ApplicationFiled: September 4, 2008Publication date: June 4, 2009Applicant: FUJITSU LIMITEDInventors: Yukito TSUNODA, Satoshi IDE
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Publication number: 20090086303Abstract: To take out monitor light unaffected by a multilevel optical phase-modulated component. For the purpose, a phase-shift unit that controls phases of plural (n, n is an integral number equal to or greater than 2) input lights, plural (n, n is an integral number equal to or greater than 2) phase modulating units that respectively phase-modulate the input lights from the phase-shift units, a first coupling unit that couples and outputs the phase-modulated lights from the plural phase modulating units as multilevel optical phase-modulated signal light, and a second coupling unit that couples and outputs non-phase-modulated lights from the plural phase modulating units as coupled light are provided.Type: ApplicationFiled: August 11, 2008Publication date: April 2, 2009Applicant: Fujitsu LimitedInventors: Satoshi Ide, Yukito Tsunoda
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Publication number: 20090022502Abstract: A receiving apparatus which suppresses threshold-voltage changes. A peak voltage detection block detects the peak voltage of a signal. A bottom voltage detection block detects the bottom voltage of the signal. A stop control block generates a stop signal for stopping the operations to detect the peak voltage and the bottom voltage. A threshold value specification block specifies a threshold voltage derived from the peak voltage and the bottom voltage. When receiving the stop signal, the peak voltage detection block stops the operation to detect the peak voltage and retains the peak voltage detected before the reception of the stop signal while the same signal is being received. When receiving the stop signal, the bottom voltage detection block stops the operation to detect the bottom voltage and retains the bottom voltage detected before the reception of the stop signal while the same signal is being received.Type: ApplicationFiled: November 16, 2007Publication date: January 22, 2009Applicant: Fujitsu LimitedInventor: Yukito Tsunoda