Patents by Inventor Yun Chang

Yun Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250242640
    Abstract: A positioning system and a positioning method of tire pressure sensor and a vehicle are provided. The vehicle includes a plurality of wheels, each wheel is provided with a tire pressure sensor. The positioning system includes a plurality of positioning devices arranged in the vehicle, each positioning device is configured to receive a plurality of Bluetooth signals from the tire pressure sensors, and obtain a set of positioning data according to the Bluetooth signals; and a receiving device configured to determine a matching relationship between the tire pressure sensors and the wheels according to preset positions of the positioning devices and the sets of positioning data, to locate the tire pressure sensors on the vehicle.
    Type: Application
    Filed: August 16, 2024
    Publication date: July 31, 2025
    Inventors: TANG-YUN CHANG, An-Yao Lee, Yun-Rong Song
  • Patent number: 12374542
    Abstract: A semiconductor structure includes a substrate; an isolation structure over the substrate; a first fin extending from the substrate and through the isolation structure; a first source/drain structure over the first fin; a contact etch stop layer over the isolation structure and contacting a first side face of the first source/drain structure; and a first dielectric structure contacting a second side face of the first source/drain structure. The first side face and the second side face are on opposite sides of the first fin in a cross-sectional view cut along a widthwise direction of the first fin. The first dielectric structure extends higher than the first source/drain structure.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: July 29, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Chang Wen, Chang-Yun Chang, Hsien-Chin Lin, Hung-Kai Chen
  • Publication number: 20250207501
    Abstract: An airfoil and a gas turbine including the airfoil. The airfoil includes a suction side and a pressure side having a cooling hole, a main cavity which is formed in an inner space formed by the suction side and the pressure side and into which a cooling fluid is introduced, an inner cooling flow path formed inside a wall body forming the pressure side and the suction side, and a collision jet hole formed in inner surfaces of the suction side and the pressure side and configured to perform colliding and cooling by introducing the cooling fluid into the inner cooling flow path, and a sub-cavity surrounding an inner cooling flow path outlet formed on an end portion of the inner cooling flow path, the sub-cavity being configured such that the inner cooling flow path outlet and a cooling hole inlet are in communication with each other.
    Type: Application
    Filed: July 30, 2024
    Publication date: June 26, 2025
    Inventor: Yun Chang Jang
  • Publication number: 20250204017
    Abstract: A method includes providing a semiconductor substrate, and forming first and second metal gate stacks in a dummy region of the semiconductor substrate and third metal gate stacks in an active device region of the semiconductor substrate. The active device region is surrounded by the dummy region and includes a main area and a tip area protruding from the main area in a top view. The first metal gate stacks are associated with the tip area and having a first pattern density, and the second metal gate stacks are associated with the main area and having a second pattern density greater than the first pattern density. The method further includes performing a chemical mechanical polishing (CMP) process to the first, the second, and the third metal gate stacks. After the CMP process, the third metal gate stacks in the tip area and in the main area have a same height.
    Type: Application
    Filed: March 3, 2025
    Publication date: June 19, 2025
    Inventors: Ming-Chang Wen, Yi-Ting Fu, Chen-Yu Tai, Keng-Yao Chen, Chang-Yun Chang
  • Patent number: 12329947
    Abstract: A medical injection system is provided. The medical injection system comprises an injection module and the cartridge module coupled to the injection module. The injection module comprises a lead screw movable along an axial line into the cartridge module; a driver sleeve configured to partially accommodate the lead screw and to have a first sleeve end facing a distal end and having sleeve teeth; a dose plate including a first plate end facing the distal end, a second plate end facing a proximal end and having plate teeth corresponding to sleeve teeth, and a side surface located between the first plate end and the second plate end and having a surface tooth; and an indicia tube configured to accommodate the driver sleeve and the dose plate and to have tube concaves near a first tube end facing the distal end. The surface tooth corresponds to one of the tube concaves.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: June 17, 2025
    Assignee: SOLTEAM INCORPORATION
    Inventors: Chun-Yun Chang, Yeong-Lii Lin, Chung-Yu Chen, Ping-Lung Lee, Frederic Delort
  • Publication number: 20250194005
    Abstract: The present invention relates to a stretchable anisotropic conductive film, a method for manufacturing same, and a stretchable electronic device comprising same. The stretchable anisotropic conductive film according to an embodiment of the invention comprises: a patterned stretchable polymer; and liquid metal which fills the patterned portion of the stretchable polymer.
    Type: Application
    Filed: May 8, 2023
    Publication date: June 12, 2025
    Inventors: Un Yong JEONG, Ig Hyun LIM, Min Sik KONG, Se Yun CHANG, Hye Ji PARK
  • Patent number: 12315571
    Abstract: An electrically erasable programmable read only memory (EEPROM) includes a substrate, isolation structures, a row of erase gate and a row of floating gates. The isolation structures are defined in the substrate to extend in a first direction. The row of erase gate having a wave shape is disposed across the substrate. The row of floating gates having staggered islands is disposed parallel to the row of erase gate. A method of forming said electrically erasable programmable read only memory (EEPROM) is also provided.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: May 27, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ning Peng, Hsueh-Chun Hsiao, Tzu-Yun Chang
  • Publication number: 20250149388
    Abstract: A system includes a gate formation tool configured to form a sacrificial gate structure and a replacement gate structure, a device dimension measuring tool configured to measure a dimension of the sacrificial gate structure, and a determination unit configured to pick an etching recipe from a series of etching recipes based on the measured dimension of the sacrificial gate structure. The gate formation tool is also configured to partially remove the sacrificial gate structure using the picked etching recipe to form a gate trench for filling the replacement gate structure therein. A portion of the sacrificial gate structure remains in the gate trench, and the series of etching recipes differ at least in a size of the remaining portion of the sacrificial gate structure.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: Chang-Jhih Syu, Hsiu-Hao Tsao, Chih-Hao Yu, Yu-Jiun Peng, Chang-Yun Chang
  • Patent number: 12269737
    Abstract: The present invention relates to a method of manufacturing gallium nitride quantum dots, and more particularly, to a method of manufacturing gallium nitride quantum dots doped with metal ions, which uses a wet-based synthesis method capable of lowering the fluorescence energy of pure gallium nitride by introducing metal ions into pure gallium nitride.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: April 8, 2025
    Assignee: Korea University Research and Business Foundation
    Inventors: Kwang Seob Jeong, Yun Chang Choi
  • Patent number: 12272397
    Abstract: A forming operation method of a resistive random access memory is provided. The method includes the following steps. A positive pulse and a negative pulse are sequentially applied, by a bit line/source line driver, to multiple resistive random access memory cells in a direction form a farthest location to a nearest location based on the bit line/source line driver through a bit line and a source line to break down a dielectric film of each of the resistive random access memory cells and generate a conductive filament of each of the resistive random access memory cells.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: April 8, 2025
    Assignee: United Microelectronics Corp.
    Inventors: Yi Ting Hung, Ko-Chi Chen, Tzu-Yun Chang
  • Patent number: 12261392
    Abstract: A waterproof structure of a socket connector includes a waterproof housing, a socket, a cable, and a waterproof plug. The waterproof housing includes a wiring opening. The inner surface of the waterproof housing incudes a ring step surface facing the wiring opening. The wiring opening is covered by an end cap. The socket is received in the waterproof housing. The cable is connected to the socket and passes the wiring opening. The waterproof plug wrapping the cable is arranged in the wiring opening to close the wiring opening. The waterproof plug has an inner and an outer end, the inner end faces the socket, and a longitudinal annular rib is arranged on the inner end. The end cover is fastened to the waterproof housing along the longitudinal direction of the waterproof plug to press the outer end to make the longitudinal ring rib press the ring step surface.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: March 25, 2025
    Assignees: JESS-LINK PRODUCTS CO., LTD., ULTRASPEED ELECTRONICS CO., LTD.
    Inventors: Ming-Jun Xu, Wen-Fu Liao, Yun-Chang Yang, Ming-Wei Chen
  • Patent number: 12243782
    Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate and a second metal gate stack in an active device region of the semiconductor substrate, and performing a chemical mechanical polishing (CMP) process using a slurry including charged abrasive nanoparticles. The first and second metal gate stacks are different in composition. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING C0., LTD.
    Inventors: Ming-Chang Wen, Chang-Yun Chang, Keng-Yao Chen, Chen-Yu Tai, Yi-Ting Fu
  • Publication number: 20250063656
    Abstract: The present invention relates to smart wearable clothing including a stretchable circuit electrode and a smart wearable system, and the smart wearable clothing according to an embodiment of the present invention comprises: a fabric; a stretchable circuit electrode formed on the fabric; a stretchable ACF formed on the circuit electrode; and a chipset formed on the stretchable ACF.
    Type: Application
    Filed: December 23, 2022
    Publication date: February 20, 2025
    Applicant: MIDAS H&T INC.
    Inventors: Se Yun CHANG, Hye Yeon CHO, Hye Ji PARK
  • Patent number: 12218239
    Abstract: A semiconductor structure includes an isolation feature formed in the semiconductor substrate and a first fin-type active region. The first fin-type active region extends in a first direction. A dummy gate stack is disposed on an end region of the first fin-type active region. The dummy, gate stack may overlie an isolation structure. In an embodiment, any recess such as formed for a source/drain region in the first fin-type active region will be displaced from the isolation region by the distance the dummy gate stack overlaps the first fin-type active region.
    Type: Grant
    Filed: May 24, 2023
    Date of Patent: February 4, 2025
    Assignee: Mosaid Technologies Incorporated
    Inventors: Shao-Ming Yu, Chang-Yun Chang, Chih-Hao Chang, Hsin-Chih Chen, Kai-Tai Chang, Ming-Feng Shieh, Kuei-Liang Lu, Yi-Tang Lin
  • Publication number: 20250021134
    Abstract: A replaceable electronic device protecting casing includes a front covering pressure plate having an outer frame; a plurality of first screwing holes arranged around the outer frame; a transparent protective film installed in an inner side of a hollow portion of the outer frame; a plurality of second screwing holes arranged around an outer side of the transparent protective film; a waterproof strip attached on an inner side of the transparent protective film; a back seat including a seat body forming a frame body; a plurality of third screwing holes arranged around the frame body; a plurality of screwing units installed in the first screwing holes; and wherein each of the screwing units passes through a respective one first screwing hole, a respective one second screwing hole and a respective one third screwing hole to assemble the front covering pressure plate, the transparent protective film and the back seat.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 16, 2025
    Inventors: Sampson Yang, Yun-Chang Tsui, Wei-Chung Wang
  • Patent number: 12198988
    Abstract: A method includes forming an active region on a substrate, forming a sacrificial gate stack engaging the active region, measuring a gate length of the sacrificial gate stack at a height lower than a top surface of the active region, selecting an etching recipe based on the measured gate length of the sacrificial gate stack, etching the sacrificial gate stack with the etching recipe to form a gate trench, and forming a metal gate stack in the gate trench.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: January 14, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Chang-Jhih Syu, Chih-Hao Yu, Chang-Yun Chang, Hsiu-Hao Tsao, Yu-Jiun Peng
  • Publication number: 20250006514
    Abstract: Disclosed are various systems that allow for plasma delivery from a central location in a multi-station processing chamber to be redirected to different processing stations within the chamber. Such systems may include a deflector plate that is mounted to a wafer indexer such that the deflector plate is centered on the wafer indexer. In other implementations, such systems may include a deflector plate that is mounted in a fixed relationship with a ceiling of the processing chamber.
    Type: Application
    Filed: October 18, 2022
    Publication date: January 2, 2025
    Inventors: Harish Kumar Premakumar, Tongtong Guo, Rachel E. Batzer, Bo Gong, Francisco J. Juarez, Ching-Yun Chang
  • Patent number: 12170687
    Abstract: A method for determining a spam URL includes: (a) extracting a URL from an e-mail; (b) determining whether the extracted URL is a redirecting URL; (c) when the extracted URL is a redirecting URL, accessing a redirection URL that is connected as a result of access to the extracted URL; (d) when the redirection URL is a redirecting URL, accessing a redirection URL that is connected as a result of access to the redirection URL; (e) repeating operation (d); (f) when a last accessed URL in one of operations (c), (d), and (e) is not a redirecting URL, determine whether the last accessed URL is a spam URL; and (g) when it is determined that the last accessed URL is a spam URL, determining the extracted URL, the last accessed URL and any redirection URL connected between the extracted URL and the last accessed URL as spam URLs.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: December 17, 2024
    Assignee: Kakao Corp.
    Inventors: Yun Chang Kang, Kwang Su Oh, Seung Yun Jeong
  • Publication number: 20240397712
    Abstract: An array of programmable memory includes a first floating gate and a second floating gate disposed on a substrate along a first direction, two spacers disposed between and parallel to the first floating gate and the second floating gate, a first word line sandwiched by one of the spacers and the adjacent first floating gate, and a second word line sandwiched by the other one of the spacers and the adjacent second floating gate, and two first spacers disposed on the substrate, wherein one of the first spacer is disposed between the first word line and the first floating gate, and another spacer is disposed between the second word line and the second floating gate, wherein each spacer has substantially the same shape as each first spacer.
    Type: Application
    Filed: August 1, 2024
    Publication date: November 28, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hsueh-Chun Hsiao, Yi-Ning Peng, Tzu-Yun Chang
  • Publication number: 20240397690
    Abstract: A semiconductor structure includes a first transistor and a second transistor, and a dielectric structure separating the first transistor from the second transistor. The first transistor includes a first gate structure and the second transistor includes a second gate structure. The dielectric structure includes a first portion sandwiched between the first gate structure and the second gate structure along a first direction, and a second portion protruding from the first portion along a second direction perpendicular to the first direction. The first portion has a first width and the second portion has a second width less than the first width, the first width and the second width being along the first direction, and the first portion has a first height and the second portion has a second height less than the first height.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 28, 2024
    Inventors: Ming-Chang Wen, Kuo-Hsiu Hsu, Jyun-Yu Tian, Wan-Yao Wu, Chang-Yun Chang, Hung-Kai Chen, Lien Jung Hung