Abstract: An electrostatic discharge protection circuit includes an electrostatic discharge clamp between a first rail and a second rail, a trigger device configured to activate the electrostatic discharge clamp in response to an electrostatic discharge event, and a charge dissipation element between the first rail and the second rail to dissipate a residual charge at an input of the trigger device.

Abstract: A terminal assembly is disclosed. The terminal assembly comprises a main body having a welding platform and a first electrical conductive member having a connection terminal. According to the present invention, a welded structure is formed between the main body and the first electrical conductive member by making the connection terminal be welded on the welding platform. Briefly speaking, when utilizing this terminal assembly to make two electrical nodes be electrically connected to each other, one electrical conductive end of the main body and the first electrical conductive member are firstly connected to the two electrical nodes, respectively. Next, a welding process is applied to the welding platform and the connection terminal, such that an electrical connection is therefore established between the two electrical nodes.

Abstract: An assembly structure for an electronic device protecting casing and an interfacing structure with magnetic connectors includes a protecting casing for protecting a tablet form electronic device and an interfacing device for power or signal transferring to or from the protecting casing. The protecting casing includes a casing side connector. The casing side connector includes an inner connector and an outer connector. The interfacing device includes an interfacing connector. A magnetic connecting device is used for mechanically and magnetically connecting an interfacing connector of the interfacing device with an outer connector of the protecting casing. The magnetic connecting device includes at least one interfacing side magnetic unit which is installed on the interfacing device at the same side installing the interfacing connector, and at least one casing side magnetic unit which is installed one the casing side connector at the same side having the outer connector.

Abstract: In some examples, an electronic device includes a click pad. In some examples, the electronic device includes circuitry disposed under the click pad. In some examples, the circuitry is to activate to reduce click pad travel from a first distance to a second distance. In some examples, the circuitry is to activate in response to a stylus detection.

Abstract: An isolated antibody, comprising heavy chain complementary determining regions CDR1, CDR2, and CDR3 from a heavy chain variable region sequence having SEQ ID NO: 1 or 3; light chain complementary determining regions CDR1, CDR2, and CDR3 from a light chain variable region sequence having SEQ ID NO: 2 or 4; wherein the antibody binds specifically to both vascular endothelial growth factor receptor-2 (VEGFR2) and vascular endothelial growth factor receptor-3 (VEGFR3).

Abstract: A test socket includes: a first body including a fixing portion configured to receive a sample having a plurality of test terminals; a second body facing the first body and coupled with the first body such that the second body rotates relative to the first body about a hinge pin; a test board provided on the second body and configured to test the sample, wherein the test board has a plurality of first openings provided therein; and a plurality of interface pins penetrating through the first openings, wherein each of the plurality of interface pins includes a contact pin and a spring, wherein the contact pin is provided in a first end portion of each of the plurality of interface pin and is configured to come into contact with a test terminal of the plurality of test terminals, and the spring elastically supports the contact pin.

Abstract: The present invention generally relates to a method for producing hematopoietic stem cells and progenitor cells for therapeutic uses through a two-step process manipulating the canonical Wnt signaling pathway. Started from human pluripotent stem cells, the activation of the canonical Wnt signaling pathway of those stem cells is followed by downregulation of the Wnt signaling via various methods, including TGF-beta inhibition. Pharmaceutical composition matters and methods for treating a patient of hematopoietic diseases by administering therapeutically effective amounts of said stem cells or progenitor cells alone or together with other therapeutics are within the scope of this disclosure.

Abstract: A storage device testing module includes a plate and a test board disposed on the plate and including a storage device receiver, the storage device receiver receiving a storage device to be tested. The storage device testing module further includes a sensor including a plurality of switches disposed on an inner surface of the storage device receiver, the plurality of switches being activated by movement of the storage device into the storage device receiver. The storage device testing module further includes a plurality of plungers disposed on the inner surface, contacting and supporting the storage device.

Abstract: A connector includes multiple ground terminals, multiple signal terminals, a cable and a ground assembly. The cable includes multiple ground wires and multiple signal wires. The ground assembly includes a plate and multiple protrusion structures. Each protrusion structure is arranged spacedly and extended from the plate. A top of each protrusion structure is higher than a surface of the plate. Each ground wire is electrically connected with each ground terminal and each protrusion structure. Each signal wire is electrically connected with each signal terminal. Each signal wire is formed between any two of the protrusion structures adjacent to each other. Therefore, high-speed transmission of digital signals may be undistortedly implemented.

Abstract: A ring segment having improved cooling efficiency is provided. The ring segment may include a shield plate mounted to a casing which accommodates a turbine and configured to face an inner wall of the casing, a pair of hooks configured to protrude from the shield plate toward the casing to be coupled to the casing, a cavity defined between the shield plate and the pair of hooks, a plurality of first cooling passages configured to connect the cavity and first side surfaces facing each other of the shield plate, and a plurality of second cooling passages configured to connect the cavity and second side surfaces facing each other of the shield plate, wherein the first cooling passages extend in a longitudinal direction of a central axis of the turbine, and the second cooling passages extend in a circumferential direction of the turbine.

Abstract: A method of controlling gate formation of a semiconductor device includes acquiring a correlation between gate critical dimensions (CDs) and etching recipes for forming gate trenches; measuring a gate CD on a target wafer; determining an etching recipe based on the correction and the measured gate CD; and performing an etching process on the target wafer to form a gate trench with the determined etching recipe.

Abstract: An array of electrically erasable programmable read only memory (EEPROM) includes a first row of floating gate, a second row of floating gate, two spacers, a first row of word line and a second row of word line. The first row of floating gate and the second row of floating gate are disposed on a substrate along a first direction. The two spacers are disposed between and parallel to the first row of floating gate and the second row of floating gate. The first row of word line is sandwiched by one of the spacers and the adjacent first row of floating gate, and the second row of word line is sandwiched by the other one of the spacers and the adjacent second row of floating gate. The present invention also provides a method of forming said array of electrically erasable programmable read only memory (EEPROM).

Abstract: The present invention relates to compositions comprising factor VIII coagulation factors linked to extended recombinant polypeptide (XTEN), isolated nucleic acids encoding the compositions and vectors and host cells containing the same, and methods of making and using such compositions in treatment of factor VIII-related diseases, disorders, and conditions.

Abstract: A ring segment and a turbomachine including the ring segment are provided. The ring segment installed on an inner circumferential surface of a casing and disposed to face an end of a blade disposed inside the casing, the ring segment includes a segment body disposed inside the casing in a radial direction of the casing and including a plurality of cooling channels through which cooling air flows, a pair of segment protrusions protruding outward from the segment body, coupled to the inner circumferential surface of the casing, and spaced apart from each other in a flow direction of fluid flowing through the casing to form an RS cavity into which cooling air is introduced, wherein when the segment body has a cross section along an imaginary plane including a radial straight line of the casing, the cooling channel is formed such that a width in a direction perpendicular to a radial direction of the casing is greater than a width in the radial direction of the casing.

Abstract: An array of electrically erasable programmable read only memory (EEPROM) includes a first row of floating gate, a second row of floating gate, two spacers, a first row of word line and a second row of word line. The first row of floating gate and the second row of floating gate are disposed on a substrate along a first direction. The two spacers are disposed between and parallel to the first row of floating gate and the second row of floating gate. The first row of word line is sandwiched by one of the spacers and the adjacent first row of floating gate, and the second row of word line is sandwiched by the other one of the spacers and the adjacent second row of floating gate. The present invention also provides a method of forming said array of electrically erasable programmable read only memory (EEPROM).

Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate, the first metal gate stack including a first work function metal (WFM) layer; forming a second metal gate stack in an active device region of the semiconductor substrate, the second metal gate stack including a second WFM layer different than the first WFM layer; and performing a CMP process using a slurry including charged abrasive nanoparticles. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region causing different polish rates in the active device region and dummy region. After the performing of the CMP process, the first metal gate stack has a first height different from a second height of the second metal gate stack.

Abstract: A method for fabricating memory device is provided. The method includes forming a transistor on a substrate. Further, a contact structure is formed on a source/drain region of the transistor. A conductive layer is formed on the contact structure. Four memory structures are formed on the conductive layer to form a quadrilateral structure.

Abstract: An electron-device protection casing using magnetic connection includes a protection casing for receiving a tablet form electronic device; a device end connecting unit installed in the protection casing for being connected to the electronic device. The device end connecting unit further includes at least one device end magnetic unit which is positioned in the body; the device end magnetic unit serves to be magnetically connected to an external device so that the external connecting unit can be fixedly connected to the external device. The present invention further includes an intermediate connecting unit which further has at least one intermediate magnetic unit positioned for being magnetically connected to the device end magnetic unit; the positions of the device end magnetic units are corresponding to those of the intermediate magnetic units so that the device end magnetic units are attracted by the intermediate magnetic unit.

Abstract: The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate, the first metal gate stack including a first work function metal (WFM) layer; forming a second metal gate stack in an active device region of the semiconductor substrate, the second metal gate stack including a second WFM layer different than the first WFM layer; and performing a CMP process using a slurry including a charged abrasive nanoparticles. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region causing different polish rates in the active device region and dummy region. After the performing of the CMP process, the first metal gate stack has a first height greater different from a second height of the second metal gate stack.