Abstract: Provided herein are compositions and methods for the treatment or prevention of pathogenic infections.

Abstract: A polyolefin-based porous separator, including a first polyolefin-based porous film on a first surface of a second polyolefin-based porous film, and a third polyolefin-based porous film on a second surface of the second polyolefin-based porous film, each of the first and third polyolefin-based porous films containing inorganic particles having an average particle size of 10 nm to 100 nm, a thickness ratio of the first polyolefin-based porous film, the second polyolefin-based porous film, and the third polyolefin-based porous film being 0.5 to 1.5:1 to 6:0.5 to 1.5, and thermal shrinkage rates of the separator in a machine direction and a transverse direction measured after standing at 120° C. for 1 hour each being 5% or less, and air permeability of the separator being 250 sec/100 cc or less.

Abstract: Provided are an apparatus and method for coating a separator. The method includes supplying a coating solution to a receiving chamber; applying the coating solution received in the receiving chamber to a surface of the separator through a coating bar; collecting coating solution overflowing the receiving chamber by a collection chamber surrounding the receiving chamber; and returning coating solution from the collection chamber to the receiving chamber through a return line.

Abstract: A semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region defined therein. A buried word line is disposed in the substrate in the cell region and has a top surface lower than top surfaces of cell active regions in the cell region. A gate line is disposed on the substrate in the peripheral circuit region. A word line interconnect is disposed in the substrate in the peripheral circuit region, the word line interconnect including a first portion contacting the buried word line and having a top surface lower than a top surfaces of the cell active regions and a second portion that is overlapped by and in contact with the gate line.

Abstract: A solar cell includes a first electrode, a second electrode spaced apart from the first electrode, and a light absorption layer between the first electrode and the second electrode. The light absorption layer includes a first absorption sublayer, a second absorption sublayer and a third absorption sublayer. The first absorption sublayer contacts the first electrode and includes a first quantum dot, the second absorption sublayer is between the first absorption sublayer and the third absorption sublayer and includes a second quantum dot, and the third absorption sublayer contacts the second electrode and includes a third quantum dot. The second quantum dot is larger than the first quantum dot and the third quantum dot.

Abstract: A solar cell includes a crystalline photovoltaic layer, a first impurity region having a first conductivity type and a second impurity region having a second conductivity type in the photovoltaic layer, a third impurity region having the first conductivity type in the first impurity region, a fourth impurity region having the second conductivity type in the second impurity region, a first barrier layer and a second barrier layer contacting the third impurity region and the fourth impurity region, respectively, and a first electrode and a second electrode contacting the first barrier layer and the second barrier layer, respectively. The first impurity region and the second impurity region are spaced apart from each other. The third impurity region and the fourth impurity region have an impurity concentration higher than the first impurity region the second impurity region, respectively.

Abstract: A solar cell and method of manufacturing the same includes a semiconductor substrate having a textured surface and including a plurality of recess portions and a plurality of flat portions, an emitter layer in the plurality of recess portions, a first doping region in at least one of the plurality of flat portions, and doped with a first conductive type impurity selected from one of p-type and n-type impurities, a second doping region in at least one of the plurality of flat portions, and doped with a second conductive type impurity selected from one of p-type and n-type impurities that differs from the first conductive type impurity, and first and second electrodes electrically connected to the first and second doping regions, respectively. The distance between the emitter layer and the first doping region is different from the distance between the emitter layer and the second doping region.

Abstract: A solar cell is provided with a semiconductor substrate including a light-receiving surface, a back surface, a first region of a first conductivity type disposed on the back surface, a second region of a second conductivity type disposed on the light-receiving surface, and a PN junction at the boundary between the first and second regions. An electrode is provided on the light-receiving surface to expose a portion of the light-receiving surface, and the semiconductor substrate includes a plurality of recesses formed by recessing the exposed portion of the light-receiving surface. The recesses may function as a texturing structure.

Abstract: A solar cell may include a PN junction including a semiconductor substrate of a first conductivity and an emitter of a second conductivity, a passivation layer on an exposed surface of the semiconductor substrate, a first electrode connected to the semiconductor substrate, and a second electrode connected to the emitter. The passivation layer may be configured to apply stress to the exposed surface of the substrate such that a mobility of minority charge carriers in the semiconductor substrate is decreased in a first direction perpendicular to a boundary surface of the semiconductor substrate and the passivation layer.

Abstract: A solar cell includes a semiconductor layer including a charge carrier produced therein upon exposure to light, and a passivation layer on a side of the semiconductor layer, the passivation layer configured to apply a stress to the semiconductor layer and change a mobility of the charge carrier into a direction in the semiconductor layer.

Abstract: According to example embodiments, a solar cell includes a transparent base substrate having a first surface and a second surface opposite the first surface, a first photoelectric layer having a thin film shape on the first surface of the base substrate; and a second photoelectric layer having a thin film shape on the second surface of the base substrate. A bandgap of the second photoelectric layer may be different than a bandgap of the first photoelectric layer.

Abstract: According to example embodiments, a solar cell includes a photoelectric member on a passivation member. The photoelectric member is configured to convert incident light into current. The passivation member includes protection material for protecting the-photoelectric member and wavelength conversion material configured to convert light that passes through the photoelectric member into different wavelength.

Abstract: A method of manufacturing a solar cell includes providing a semiconductor substrate; disposing a reflection layer on one side of the semiconductor substrate, wherein the disposing the reflection layer comprises implanting gas into a surface of the one side of the semiconductor substrate and heating the gas; disposing an n+ region and a p+ region separated from each other on the other opposite facing side of the semiconductor substrate; disposing a first electrode connected to the n+ region; and disposing a second electrode connected to the p+ region.

Abstract: According to example embodiments, a solar cell includes a first unit portion, a second unit portion, and an insulating layer. The first and second unit portions may have different bandgaps, and the insulating layer may be between the first unit portion and the second unit portion.

Abstract: A semiconductor device includes a semiconductor substrate having a cell region and a peripheral circuit region defined therein. A buried word line is disposed in the substrate in the cell region and has a top surface lower than top surfaces of cell active regions in the cell region. A gate line is disposed on the substrate in the peripheral circuit region. A word line interconnect is disposed in the substrate in the peripheral circuit region, the word line interconnect including a first portion contacting the buried word line and having a top surface lower than a top surfaces of the cell active regions and a second portion that is overlapped by and in contact with the gate line.

Abstract: According to example embodiments, a solar cell includes a plurality of unit portions. Each of the unit portions may have a stacked structure including a plurality of photoelectric members and at least one insulating layer disposed between the photoelectric members. The photoelectric members in different levels may have different energy bandgaps. The photoelectric members in a level may be connected to each other.

Abstract: Example embodiments of a solar cell including a semiconductor substrate, an N emitter layer formed on a light-absorbing surface of the semiconductor substrate, a p+ region formed on the light-absorbing surface of the semiconductor substrate, a first electrode electrically connected to the p+ region, a second electrode separately formed from the first electrode on the light-absorbing surface of the semiconductor substrate and electrically connected to the N emitter layer, and an auxiliary layer inducing an N+ back surface field (BSF) on the opposite surface to the light-absorbing surface of the semiconductor substrate, and a method of manufacturing the solar cell are provided.

Abstract: A solar cell and method of manufacturing the same includes a semiconductor substrate having a textured surface and including a plurality of recess portions and a plurality of flat portions, an emitter layer in the plurality of recess portions, a first doping region in at least one of the plurality of flat portions, and doped with a first conductive type impurity selected from one of p-type and n-type impurities, a second doping region in at least one of the plurality of flat portions, and doped with a second conductive type impurity selected from one of p-type and n-type impurities that differs from the first conductive type impurity, and first and second electrodes electrically connected to the first and second doping regions, respectively. The distance between the emitter layer and the first doping region is different from the distance between the emitter layer and the second doping region.

Abstract: A solar cell includes a semiconductor substrate having a texturized surface, the semiconductor substrate including a plurality of recess portions and a plurality of flat portions, an insulation layer on the texturized surface of the semiconductor substrate and an electrode on the plurality of flat portions of the semiconductor substrate. The insulation layer on the plurality of recess portions of the semiconductor substrate is thinner than the insulation layer on the plurality of flat portions of the semiconductor substrate.

Abstract: A method of manufacturing a solar cell includes providing a semiconductor substrate; disposing a reflection layer on one side of the semiconductor substrate, wherein the disposing the reflection layer comprises implanting gas into a surface of the one side of the semiconductor substrate and heating the gas; disposing an n+ region and a p+ region separated from each other on the other opposite facing side of the semiconductor substrate; disposing a first electrode connected to the n+ region; and disposing a second electrode connected to the p+ region.