Abstract: A touch sensor includes touch electrodes in a first area and a second area, a first force sensor electrode on a same layer as the touch electrodes and spaced from a first touch electrode in the first area, a first force sensor line on a same layer as the touch electrodes and electrically connected to the first force sensor electrode, the first force sensor line being at a second side of the first touch electrode, and touch lines on a same layer as, and connected to, the touch electrodes, the touch lines including a first touch line connected to the first touch electrode and at a first side of the first touch electrode.

Abstract: Methods of a scan partitioning a circuit are disclosed. One method includes calculating a power score for circuit cells within a circuit design based on physical cell parameters of the circuit cells. For each of the circuit cells, the circuit cell is assigned to a scan group according to the power score for the circuit cell and a total power score for each scan group. A plurality of scan chains is formed. Each of the scan chains is formed from the circuit cells in a corresponding scan group based at least in part on placement data within the circuit design for each of the circuit cells. Interconnect power consumption can be assessed to determine routing among circuit cells in the scan chains.

Abstract: A cartilage repair implant, an auxiliary surgical tool kit and a cartilage repair system are provided. The cartilage repair implant includes a body and a plurality of pins. The body is a porous structure and is configured to carry cartilage repair material. The pins are fixed to the body for being inserted into a patient's bone. The auxiliary surgical tool kit includes a positioning sleeve and a click tool. The positioning sleeve has a through passage. A first alignment structure is disposed on the sidewall of the through passage. The click tool includes an outer tube and a push rod. A second alignment structure mutually aligned with the first alignment structure is disposed on the outer wall of the outer tube. The outer tube is configured to pass through the through passage. The push rod is slidably disposed in the outer tube. One end of the outer tube has a shaping blade for slicing a to-be-implanted region on an affected area of the patient.

Abstract: A display device includes a display panel that includes a substrate, a pixel disposed on the substrate, and an encapsulation layer that covers the pixel, and a touch sensor disposed on the display panel. The touch sensor includes sensing electrodes disposed on the encapsulation layer, and sensing lines respectively connected to the sensing electrodes. Each of the sensing lines includes a first sensing line pattern that extends onto the substrate, a second sensing line pattern connected to the first sensing line pattern outside of the encapsulation region, the second sensing line pattern including a first connection part and a second connection part, and a third sensing line pattern connected to the second connection part of the second sensing line pattern at a lower side of the encapsulation layer.

Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.

Abstract: A SAW filter with an antenna and a transmission terminal includes: a plurality of series resonator groups which are connected in series between the antenna and the transmission terminal; a plurality of parallel resonator groups which are connected in parallel between two neighbor series resonator groups among the plurality of series resonator groups; a parallel inductor which is connected in parallel with the series resonator group adjacent to the antenna; and a series inductor which is connected to in series with some parallel resonator groups among the plurality of parallel resonator groups. The SAW filter has high durability in which even though high power is applied to the filter together with the wide pass band, the filter is not damaged.

Abstract: A testing probe structure for wafer level testing semiconductor IC packaged devices under test (DUT). The structure includes a substrate, through substrate vias, a bump array formed on a first surface of the substrate for engaging a probe card, and at least one probing unit on a second surface of the substrate. The probing unit includes a conductive probe pad formed on one surface of the substrate and at least one microbump interconnected to the pad. The pads are electrically coupled to the bump array through the vias. Some embodiments include a plurality of microbumps associated with the pad which are configured to engage a mating array of microbumps on the DUT. In some embodiments, the DUT may be probed by applying test signals from a probe card through the bump and microbump arrays without direct probing of the DUT microbumps.

Abstract: Electronic system level (ESL) design and verification of the present disclosure is utilized to provide an electronic simulation and modeling of function safety and fault management of an electronic device. A method for simulating a safety circuit includes providing an electronic architectural design to perform one or more functional behaviors of the electronic device in accordance with an electronic design specification. The method further includes modeling the safety circuit of the electronic architectural design and one or more other electronic circuits of the electronic architectural design that communicate with the safety circuit. The method further includes simulating, using the modeling, operation of the safety circuit while the electronic architectural design is performing the one or more functional behaviors. The method also includes determining whether the simulated operation of the safety circuit satisfies the electronic design specification.

Abstract: A touch screen includes a base film which includes a sensing area and a non-sensing area; a plurality of first touch electrodes including a plurality of sub-touch electrodes disposed in the sensing area; a plurality of second touch electrodes disposed in the sensing area; first and second sensing lines disposed in the non-sensing area; and a bridge line which is disposed in the non-sensing area and is connected to the first sensing line. The bridge line includes a multilayer structure in which at least two sub-bridge lines are stacked to overlap each other in plan view.

Abstract: An electronic device, according to one of the various embodiments of the present disclosure, includes: a memory; a communication module that transmits and receives messages; and a processor that, when a non-IP service-based message is received, creates an IP-based message including at least some of the non-IP service-based message, and provides the created IP-based message. In addition, various embodiments are provided.

Abstract: A network-on-chip (NoC) system includes a default communication path between a master device and a slave device, and a backup communication path between the master device and the slave device. The default communication path is configured to work in a normal operation state of the chip. The backup communication path is configured to replace the default communication path when a fault arises in the default communication path.

Abstract: Electronic design automation (EDA) of the present disclosure, in various embodiments, optimizes designing, simulating, analyzing, and verifying of one or more electronic architectural designs for an electronic device. The EDA of the present disclosure identifies one or more electronic architectural features from the one or more electronic architectural designs. In some situations, the EDA of the present disclosure can manipulate one or more electronic architectural models over multiple iterations using a machine learning process until one or more electronic architectural models from among the one or more electronic architectural models satisfy one or more electronic design targets. The EDA of the present disclosure substitutes the one or more electronic architectural models that satisfy the one or more electronic design targets for the one or more electronic architectural features in the one or more electronic architectural designs to optimize the one or more electronic architectural designs.

Abstract: An integrated circuit includes a first through fourth devices positioned over a substrate, the first device including first through third transceivers, the second device including a fourth transceiver, the third device including a fifth transceiver, and the fourth device including a sixth transceiver. A first radio frequency interconnect (RFI) includes the first transceiver coupled to the fourth transceiver through a first guided transmission medium, a second RFI includes the second transceiver coupled to the fifth transceiver through a second guided transmission medium, and a third RFI includes the third transceiver coupled to the sixth transceiver by the second guided transmission medium.

Abstract: A package includes an Integrated Voltage Regulator (IVR) die, wherein the IVR die includes metal pillars at a top surface of the first IVR die. The package further includes a first encapsulating material encapsulating the first IVR die therein, wherein the first encapsulating material has a top surface coplanar with top surfaces of the metal pillars. A plurality of redistribution lines is over the first encapsulating material and the IVR die. The plurality of redistribution lines is electrically coupled to the metal pillars. A core chip overlaps and is bonded to the plurality of redistribution lines. A second encapsulating material encapsulates the core chip therein, wherein edges of the first encapsulating material and respective edges of the second encapsulating material are vertically aligned to each other. An interposer or a package substrate is underlying and bonded to the IVR die.

Abstract: A signal processing method is provided. First, at least one transmitted signal is output to at least one target, and the target reflects at least one reflected signal to receiving antennas, which then generate receiving signals upon receipt of the reflected signal. Next, the transmitted signal and each receiving signal are processed to generate processing signals. The processing signals are arranged in a form of matrix, to generate a channel coefficient matrix having M×N channel coefficient matrix blocks. Next, the channel coefficient matrix is divided into Ndivide×Mdivide secondary channel coefficient matrices, which are then substituted into a snapshot vector matrix equation to generate a snapshot vector matrix for calculating an angle of the target. The signal processing method can establish an optimal secondary channel coefficient matrix arrangement by using a special signal preprocessing manner, to improve the resolution and accuracy of the estimated angle parameter of the target.

Abstract: A method for preparing a bifunctional film, including: (a) drying a first polymer solution to form a film to form an anti-adhesion layer; and (b) drying a second polymer solution over the anti-adhesion layer to form a film to form an attachment layer. The first polymer solution includes a first hydrophobic solution and a first hydrophilic solution, and in the first polymer solution, the weight ratio of the solute of the first hydrophobic solution to the solute of the first hydrophilic solution 1:0.01-1. Moreover, the second polymer solution consists of a second hydrophilic solution.

Abstract: A touch screen including a plurality of first sensing electrode columns having a plurality of first sensing electrodes, the plurality of first sensing electrode columns extending in one direction, and a plurality of second sensing electrode columns alternately disposed with the first sensing electrode columns, the plurality of second sensing electrode columns including a plurality of second sensing electrodes having a plurality of sub-electrodes. Sub-electrodes of one of adjacent second sensing electrodes are electrically connected to sub-electrodes of another of the adjacent second sensing electrodes. At least some of the first sensing electrodes include a first region and a second region electrically separated from the first region.

Abstract: A method is disclosed that includes providing an IP bank, an application bank, and a technology bank; generating a hierarchical table based on the IP bank and the application bank; performing an estimation of at least one of a performance value, a power value, an area value and a cost value, which corresponds to the hierarchical table, by using the technology bank, to output an result data as a basis of fabrication of a system.

Abstract: A touch sensor includes a base layer, first touch sensor columns, second touch sensor columns, and sensing lines. The base layer includes a sensing region and a non-sensing region. The first touch sensor columns extend in a first direction. The first touch sensor columns include first touch electrodes. The first touch electrodes include sub-touch electrodes in the sensing region. The second touch sensor columns include second touch electrodes in the sensing region. The second touch sensor columns are alternately arranged with the first touch sensor columns. The sensing lines are in the non-sensing region. The sensing lines include: first sensing lines electrically connected to the sub-touch electrodes, and second sensing lines electrically connected to the second touch electrodes. The sub-touch electrodes and the second touch electrodes have different widths.

Abstract: A transformer includes a magnetic core, a first coil unit and a second coil unit. The first coil unit is disposed within the magnetic core and includes a laminated board having layers laminated therein and conductive patterns. Respective ones of the conductive patterns are disposed on the laminated layers. The second coil unit includes a conductive wire spaced apart from the conductive patterns of the laminated board by an insulating distance. The conductive wire includes a triple-insulated wire surrounded by three sheets of insulating paper to maintain the insulating distance from the conductive patterns.