Abstract: A touch screen including a plurality of first sensing electrode columns having a plurality of first sensing electrodes, the plurality of first sensing electrode columns extending in one direction, and a plurality of second sensing electrode columns alternately disposed with the first sensing electrode columns, the plurality of second sensing electrode columns including a plurality of second sensing electrodes having a plurality of sub-electrodes. Sub-electrodes of one of adjacent second sensing electrodes are electrically connected to sub-electrodes of another of the adjacent second sensing electrodes. At least some of the first sensing electrodes include a first region and a second region electrically separated from the first region.

Abstract: A transformer includes a magnetic core, a first coil unit and a second coil unit. The first coil unit is disposed within the magnetic core and includes a laminated board having layers laminated therein and conductive patterns. Respective ones of the conductive patterns are disposed on the laminated layers. The second coil unit includes a conductive wire spaced apart from the conductive patterns of the laminated board by an insulating distance. The conductive wire includes a triple-insulated wire surrounded by three sheets of insulating paper to maintain the insulating distance from the conductive patterns.

Abstract: A liquid enzyme formulation, an enzyme granule formulation, methods for manufacturing enzyme granules using a fluid bed dryer, wherein the enzyme granules are thermostable without the need for a thermostable coating is provided. The enzyme granules are phytase granules used in the manufacturing of an animal feed, wherein the phytase granule is thermostable without the need for a thermostable coating and the phytase retains about 63% to about 134% of its activity after pelleting at 80° C.

Abstract: In certain aspects, an apparatus comprises an SOI MOSFET having a diffusion region as a source or a drain on a back insulating layer, wherein the diffusion region has a front diffusion side and a back diffusion side opposite to the front diffusion side; a silicide layer on the front diffusion side having a back silicide side facing the diffusion region and a front silicide side opposite to the back silicide side; and a backside contact connected to the silicide layer, wherein at least a portion of the backside contact is in the back insulating layer.

Abstract: A touch sensing unit, includes a plurality of first sensing electrodes and a plurality of second sensing electrodes intersecting with and insulated from the plurality of first sensing electrodes. The plurality of first sensing electrodes includes a plurality of first sensor portions and a plurality of first connection portions connecting each of the plurality of first sensor portions with one another. The plurality of second sensing electrodes includes a plurality of second sensor portions, a plurality of stem sensors extended from the plurality of second sensor portions, and a plurality of second connection portions connecting each of the plurality of sensor portions with one another. Each of the plurality of first sensor portions includes a plurality of depressions indented inwardly. Each of the plurality of stem sensors is disposed such that it is at least partially surrounded by a respective depression of the plurality of depressions.

Abstract: A touch sensor includes a base layer, first touch sensor columns, second touch sensor columns, and sensing lines. The base layer includes a sensing region and a non-sensing region. The first touch sensor columns extend in a first direction. The first touch sensor columns include first touch electrodes. The first touch electrodes include sub-touch electrodes in the sensing region. The second touch sensor columns include second touch electrodes in the sensing region. The second touch sensor columns are alternately arranged with the first touch sensor columns. The sensing lines are in the non-sensing region. The sensing lines include: first sensing lines electrically connected to the sub-touch electrodes, and second sensing lines electrically connected to the second touch electrodes. The sub-touch electrodes and the second touch electrodes have different widths.

Abstract: A touch sensor includes: a plurality of first sensor electrode columns disposed in a sensing area, the plurality of first sensor electrode columns each including one or more first sensor electrodes; a plurality of second sensor electrode columns alternately disposed with the first sensor electrode columns in the sensing area, the plurality of second sensor electrode columns each including a plurality of second sensor electrodes having a length defined by a longitudinal axis and a width extending in a direction across the length; a plurality of lines connected to the first sensor electrode columns and the second sensor electrode columns; and a pad unit including a plurality of pads connected to the lines, wherein at least some of the second sensor electrodes have a width that varies along the longitudinal axis of its respective second electrodes.

Abstract: A light emitting device including a light emitting unit, two electrodes, a reflective member, and a light transmissive member is provided. The two electrodes are disposed on one side of the light emitting unit, and electrically connected to the light emitting unit. The reflective member is disposed on the other side of the light emitting unit, and has at least one reflective surface. The light transmissive member is disposed between the reflective member and the light emitting unit, and covers a part of the light emitting unit. A lateral surface of the light transmissive member is served as a light emitting surface of the light emitting device. A manufacturing method of a light emitting device is also provided.

Abstract: A touch sensor includes a base, first sensing electrode columns (FSECs), and second sensing electrode columns (SSECs). The base includes a sensing region (SR) including a rounded corner (RC), and a non-SR outside the SR. The FSECs extend in a direction on the base, each FSEC among the FSECs including first sensing electrodes (FSEs), each FSE among the FSEs including sub-electrodes. The SSECs are alternately disposed with the FSECs on the base, each SSEC among the SSECs including second sensing electrodes (SSEs). Sub-electrodes of one of adjacent FSEs among the FSEs are electrically connected to respective sub-electrodes of another of the adjacent FSEs. A sub-electrode closest to the RC among the sub-electrodes includes a rounded edge (RE) corresponding to the RC. A SSE closest to the RC among the SSEs includes a RE corresponding to the RC, and a protrusion part protruding toward the sub-electrode including the RE.

Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.

Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.

Abstract: A circuit substrate and a semiconductor package structure are provided. The circuit substrate includes a body and a via hole array. The via hole array includes via hole column units periodically arranged along a first direction. Each via hole column unit includes first to sixth via holes passing through the body and electrically connected to a capacitor. Any two adjacent via holes of the first to sixth via holes transmit power and ground signals. The sixth via hole of one of the via hole column units is adjacent to the first via hole of another one of the via hole column units, which is adjacent to the one of the via hole column units. The sixth via hole of one of the via hole column units and the first via hole of another one of the via hole column units transmit power and ground signals.

Abstract: An apparatus includes an image sensor having a light sensing region, the light sensing region being partitioned into a plurality of sub-regions, a first sub-region of the plurality of sub-regions has a first size, a second sub-region of the plurality of sub-regions has a second size different from the first size, and the second sub-region partially overlaps with the first sub-region. The apparatus further includes a processor coupled with the image sensor, wherein the processor includes a plurality of pixel processing units, and each processing unit of the plurality of processing units is configured to generate a processed image based on an image captured by a corresponding sub-region of the plurality of sub-regions. The apparatus further includes a plurality of lenses configured to focus incident light onto the image sensor.

Abstract: A memory circuit includes a first memory circuit formed of a first die or a set of stacked dies. The memory circuit further includes a second memory circuit formed of a second die, the second memory circuit comprising one or more sets of memory cells of a second type and each set of the memory cells of the second type comprising multiple cache sections. The first die or the set of stacked dies are stacked over the second die, wherein the second die further includes a first plurality of I/O terminals and a second plurality of I/O terminals, the first plurality of I/O terminals being electrically coupled to the first memory circuit, and the second plurality of I/O terminals being electrically isolated from the first memory circuit.

Abstract: A device comprises a first die; and a second die stacked below the first die with interconnections between the first die and the second die. A least one of the first die or the second die has a circuit for performing a function and provides a functional path. Each of the first and second dies comprise a plurality of latches, including a respective latch corresponding to each one of the interconnections; and a plurality of multiplexers. Each multiplexer is connected to a respective one of the plurality of latches and arranged for receiving and selecting one of a scan test pattern or a signal from the functional path for outputting during a scan chain test of the first die and second die.

Abstract: In one embodiment, a processor includes a plurality of domains each to operate at an independently controllable voltage and frequency, a plurality of linear regulators each to receive a first voltage from an off-chip source and controllable to provide a regulated voltage to at least one of the plurality of domains, and a plurality of selectors each coupled to one of the domains, where each selector is configured to provide a regulated voltage from one of the linear regulators or a bypass voltage to a corresponding domain. Other embodiments are described and claimed.

Abstract: A foil peeling apparatus adapted to a substrate having a foil thereon includes a foil peeling member, a connector and a controller. The foil peeling member has a foil peeling surface. The controller controls the connector to drive the peeling member to move along a path. The foil peeling surface of the peeling member in contact with, with an initial angle, the substrate, feeds toward the substrate for a first displacement, and then moves upwards and toward the substrate when the first feeding angle is decreased.

Abstract: A touch sensor includes: a plurality of first sensor electrode columns disposed in a sensing area, the plurality of first sensor electrode columns each including one or more first sensor electrodes; a plurality of second sensor electrode columns alternately disposed with the first sensor electrode columns in the sensing area, the plurality of second sensor electrode columns each including a plurality of second sensor electrodes having a length defined by a longitudinal axis and a width extending in a direction across the length; a plurality of lines connected to the first sensor electrode columns and the second sensor electrode columns; and a pad unit including a plurality of pads connected to the lines, wherein at least some of the second sensor electrodes have a width that varies along the longitudinal axis of its respective second electrodes.

Abstract: Electronic design automation (EDA) of the present disclosure, in various embodiments, optimizes designing, simulating, analyzing, and verifying of electronic circuitry for an electronic device. The electronic device includes scan flip-flops to autonomously test the electronic circuitry for various manufacturing faults. The EDA of the present disclosure statistically groups the scan flip-flops into scan chains in such a manner such that scan flip-flops within each scan chain share similar characteristics, parameters, or attributes. Thereafter, the EDA of the present disclosure intelligently arranges ordering for the scan flip-flops within each of the scan chains to optimize power, performance, and/or area of the electronic circuitry.

Abstract: A liquid enzyme formulation, an enzyme granule formulation, methods for manufacturing enzyme granules using a fluid bed dryer, wherein the enzyme granules are thermostable without the need for a thermostable coating is provided. The enzyme granules are phytase granules used in the manufacturing of an animal feed, wherein the phytase granule is thermostable without the need for a thermostable coating and the phytase retains about 63% to about 134% of its activity after pelleting at 80° C.