Abstract: A method for preparing-3,3?-diaminobenzidine, the method comprising the following steps: subjecting 4,4?-biphenol and N,N-dimethylsulfamoyl chloride to an esterification reaction in a specified solvent at 40-70° C. to obtain 4,4?-biphenyl bis(N,N-dimethylaminosulfonate) as a first intermediate; subjecting the 4,4?-biphenyl bis(N,N-dimethylaminosulfonate) to a chlorination reaction with a chlorinating reagent under acidic conditions to obtain 3,3?-dichloro-4,4?-biphenyl bis(N,N-dimethylaminosulfonate) as a second intermediate; subjecting the second intermediate 3,3?-dichloro-4,4?-biphenyl bis(N,N-dimethylaminosulfonate) to an ammonolysis reaction with anammoniation reagent in the presence of a combined catalyst to obtain a crude product of 3,3?,4,4?-tetraaminobiphenyl, wherein the combined catalyst is a mixture of proline, a cuprous salt and a phase transfer catalyst; and subjecting the crude product of 3,3?,4,4?-tetraaminobiphenyl to a post-treatment to obtain a purified 3,3?,4,4?-tetraaminobiphenyl product.

Abstract: A display panel includes a first substrate, pixel structures, a first common pad, a second substrate, a second common electrode, a display medium and a conductive particle. The pixel structures are disposed on an active area of the first substrate. The first common pad is disposed on a peripheral area of the first substrate, and is electrically connected to first common electrodes of the pixel structures. The second common electrode is disposed on the second substrate. The conductive particle is disposed on the first common pad, and is electrically connected to the first common pad and the second common electrode. The conductive particle includes a core and a conductive film disposed on a surface of the core, where the conductive film has a main portion and raised portions, and a film thickness of each of the raised portions is greater than a film thickness of the main portion.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an integrated thin film resistor with a memory device and methods of manufacture. The structure includes a memory device in back end of line (BEOL) materials and a thin film resistor located in the BEOL materials. The thin film resistor includes electrical resistive material, and an insulator material over the electrical resistive material is thicker than insulator material over the memory device.

Abstract: Systems and methods include receiving one or more disaster recovery configurations; identifying activation of a disaster recovery mode; and controlling traffic flow such that the traffic is any of blocked to all destinations, allowed to all destinations, and allowed to preselected destinations based on the one or more received disaster recovery configurations.

Abstract: An object detection method includes steps that are to be performed for each piece of point cloud data received from a lidar module, of selecting a first to-be-combined image from among images received from a camera device that corresponds in time to the piece of point cloud data, selecting a second to-be-combined image from among the images that is the Nth image before the first to-be-combined image in the time order, combining the first to-be-combined image and the second to-be-combined image to generate a combined image, generating a result image by incorporating the piece of point cloud data into the combined image, and inputting the result image into a trained machine learning model in order to determine a class to which each object in the result image belongs.

Abstract: A semiconductor device is provided, which includes a dielectric layer and a via structure. The dielectric layer is arranged over a substrate. The via structure is arranged in the dielectric layer, the via structure having a peripheral portion and a central portion. The peripheral portion of the via structure has a height that is greater than that of the central portion.

Abstract: Multi-layer contact patches, as well as related apparatus, kits, systems, and methods, enable improved allergen testing and diagnosis. Multi-layer contact patches include a shield layer releasably coupled to an adhesive layer. The adhesive layer at least partially defines and is fixably coupled to an allergen complex layer. The allergen complex layer defines a plurality of allergen complex cavities. At least a subset of the allergen complex cavities include an allergen complex positioned therein, each allergen complex comprising an absorbent matrix and an allergen.

Abstract: Multi-layer contact patches, as well as related apparatus, kits, systems, and methods, enable improved allergen testing and diagnosis. Multi-layer contact patches include a shield layer releasably coupled to an adhesive layer. The adhesive layer at least partially defines and is fixably coupled to an allergen complex layer. The allergen complex layer defines a plurality of allergen complex cavities. At least a subset of the allergen complex cavities include an allergen complex positioned therein, each allergen complex comprising an absorbent matrix and an allergen.

Abstract: Provided are methods and compositions useful for assessing the length of telomeres. The disclosed methods and compositions are amenable to performance as a high-throughput method to assess telomere length (TL) and TL constitution using genomic DNA. Also provided are methods for diagnosing a telomere-related condition or disease in a subject, assessing general health and/or aging of a subject, establishing a relationship between telomere constitution and cancer and/or aging-related disease, assessing exposure to harmful substances and/or stresses of a subject, assessing response to a drug or drugs treatment of a subject, assessing disease risk of a subject, and assessing clinical outcome of a subject who is suffering from a disease/diseases. The methods are useful in studies of individuals and populations.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to an integrated thin film resistor with a memory device and methods of manufacture. The structure includes: a memory device in back end of line (BEOL) materials; and a thin film resistor located in the BEOL materials.

Abstract: A system, method and computer readable storage medium are disclosed to provide dynamic network resource management in a telecommunications network where at least a portion of the network resources are located at an edge of the telecommunications network. The capacity available, the aggregate demand of resources at a given time, and the cost of the network resource demanded as well as each customers upper price limit may be considered and adjusted in real-time by different network resource allocation models.

Abstract: A structure comprises a substrate and a conductive pad disposed over the substrate. A conductive layer overlies the conductive pad. A via is disposed over the conductive pad. The via penetrates through the conductive layer and touches a surface of the conductive pad.

Abstract: The present invention discloses a method for lowering an oil pipe in a gas well without well-killing, a soluble bridge plug and a material preparation method thereof, wherein, the method comprises the steps of: lowering a bridge plug in a wellbore such that the bridge plug blocks the wellbore at a predetermined location in the wellbore; injecting water in the wellbore after the pressure in the wellbore has been relieved so as to replace gases in the wellbore; and lowering an oil pipe in the wellbore to the location of the bridge plug. The method for lowering an oil pipe in a gas well without well-killing, the soluble bridge plug and the material preparation method thereof provided in the present invention successfully solve the problem of high cost for lowering an oil pipe under pressure after a fracturing fluid has been injected into the casing.

Abstract: A semiconductor device is provided, which includes a dielectric layer and a via structure. The dielectric layer is arranged over a substrate. The via structure is arranged in the dielectric layer, the via structure having a peripheral portion and a central portion. The peripheral portion of the via structure has a height that is greater than that of the central portion.

Abstract: A system, method and computer readable storage medium are disclosed to provide dynamic network resource management in a telecommunications network where at least a portion of the network resources are located at an edge of the telecommunications network. The capacity available, the aggregate demand of resources at a given time, and the cost of the network resource demanded as well as each customers upper price limit may be considered and adjusted in real-time by different network resource allocation models.

Abstract: A method includes a processor of an electronic device receiving first input signals from a first sensor in response to user contact at a first edge of the device and second input signals from a second sensor in response to user contact at a second edge of the electronic device. The first and second sensors are covered by a housing of the device. The processor determines an external context of the device based on analysis of the first input signals and the second input signals. The determined external context indicates at least a position of the device relative to a user or an orientation of the device relative to a user. Responsive to determining the external context, the electronic device executes a particular user input action.

Abstract: Systems and methods include receiving a request, in a cloud system from a first device, to access a second device; determining if the first device is permitted to access the second device; if the first device is not permitted to access the second device, notifying the first device the second device does not exist; and, if the first device is permitted to access the second device, stitching together connections between the cloud system, the first device, and the second device to provide access to the second device for the first device, wherein the connections are implemented through the cloud-based system.

Abstract: Techniques for network scheduling that may provide consistent latency in content delivery are described. For example, the techniques may include receiving, by a scheduler of a carrier network, a consistent latency request associated with an application operating on a user equipment (UE), the consistent latency request including a specified latency value. Based at least in part on the specified latency value, the scheduler of the carrier network may schedule transmission of one or more packets associated with the application operating on the UE to cause the one or more packets to arrive at the UE with an inter-packet delay substantially equal to the specified latency value.

Abstract: Techniques and mechanisms for mitigating the effect of signal noise on communication via an interconnect. In an embodiment, a substrate includes an interconnect and a conductor which has a hole formed therein. Portions of the interconnect variously extend over a side of the conductor, wherein another recess portion of the interconnect extends from a plane which includes the side, and further extends at least partially into the hole. The configuration of the recess portion extending within the hole may contribute to an impedance which dampens a transmitter slew rate of the communication. In an embodiment, a total distance along a path formed by the interconnect is equal to or less than 5.5 inches.