Patents by Inventor Yun Wang

Yun Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250115671
    Abstract: The present disclosure provides antibodies and antigen-binding fragments thereof that bind to human CCR8, a pharmaceutical composition comprising said antibody, and use of the antibody or the composition for treating a disease, such as cancer.
    Type: Application
    Filed: October 29, 2024
    Publication date: April 10, 2025
    Applicant: BeiGene, Ltd.
    Inventors: Ming FANG, Liu XUE, Hanzi SUN, Xiaoyan TANG, Ming JIANG, Xitao WANG, Yun CHEN, Chichi HUANG, Wenjie WANG, Jing ZHANG, Wenbo JIANG
  • Publication number: 20250120122
    Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
  • Publication number: 20250117186
    Abstract: The present disclosure relates to a multiplier, a multiply-accumulate circuit, an operational circuit, a processor, and a calculation apparatus. The operational circuit includes an input processing circuit and the multiply-accumulate circuit. The input processing circuit receives a first number and outputs the first number as a first multiplicator for feeding into the multiply accumulate circuit by negating a sign bit of the first number in a case in which the first number is a signed number, and directly outputs the first number as the first multiplicator for feeding into the multiply-accumulate circuit in a case in which the first number is an unsigned number. The input processing circuit further receives a previously known second number and directly outputs the second number as a second multiplicator for feeding into the multiply-accumulate circuit. The multiply-accumulate circuit includes a multiplication subcircuit and an accumulation subcircuit.
    Type: Application
    Filed: June 19, 2024
    Publication date: April 10, 2025
    Applicant: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Danyang WANG, Tianzhi XUE, Yun ZHAI, Zhijun FAN, Zuoxing YANG
  • Publication number: 20250118272
    Abstract: The present disclosure discloses a liquid crystal display panel and a compensation method thereof. The compensation method firstly acquires a plurality of consecutive and alternating odd-numbered frame grayscale data and even-numbered frame grayscale data, then determines a minimum grayscale difference, and determines a gamma voltage difference corresponding to the grayscale difference according to a curve of a relation between grayscales and gamma voltages, followed by obtaining a correction value for a common voltage based on the gamma voltage difference. The flicker phenomena can be improved by adjusting the common voltage only once with the correction value.
    Type: Application
    Filed: December 29, 2023
    Publication date: April 10, 2025
    Applicant: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xinhong CHEN, Yun ZHANG, Ling XU, Wenli WANG, Lu LIU, Yuying WANG
  • Patent number: 12270025
    Abstract: An aptamer of nattokinase and method for screening the aptamer are provided, which relate to technical fields of biotechnology. A set of nattokinase nucleic acid aptamers screened by capillary electrophoresis separation technology is: SEQ ID NO:1˜SEQ ID NO:17. The dissociation constants of the seven aptamers were detected by surface plasmon resonance technology, and the affinity of the seven aptamers was strong, with affinities between 8.7-87 nM. The nucleic acid aptamer of the present disclosure has precise specificity, high affinity, and is convenient for chemical modification, and can be used as an effective molecular recognition tool for the high-sensitive analysis of proteins. it. The recognition technology based on nucleic acid aptamers provides a basis for the development of NK determination and efficient separation and purification.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 8, 2025
    Assignee: Qingdao Institute of Bioenergy and Bioprocess Technology, Chinese Academy of Sciences
    Inventors: Yun Fa, Haijie Zhao, Mingyang Guan, Qi Wang, Huizhou Liu
  • Patent number: 12270807
    Abstract: A reacting device of dual path synchronous immunochromatographic platform includes a seat, an upper housing, and a fluid dividing funnel. The seat contains two immunochromatographic carriers. The hollow pipe portion has two sloped structures. A force bearing portion of the fluid dividing funnel can be pressed down, so two fluid exits of the fluid dividing funnel move towards these two sloped structures. The specimen drops and is guided into these two immunochromatographic carriers respectively. A reaction result can be observable. The fluid dividing funnel can divide the specimen into two immunochromatographic carriers evenly. The sloped structure can increase the accuracy of specimen supply. Excess specimen can be scraped off for enhancing the solving accuracy. In addition, it can decrease the possibility of false positive problem.
    Type: Grant
    Filed: July 4, 2021
    Date of Patent: April 8, 2025
    Assignee: TAICHUNG VETERANS GENERAL HOSPITAL
    Inventors: Ming-Feng Wu, Hui-Chun Chang, Jing-Lian Jheng, Yi-Yun Hung, Jen-Ying Li, Hui-Chen Chen, Jiunn-Min Wang
  • Patent number: 12269816
    Abstract: A compound represented by formula (I) or a pharmaceutically acceptable salt, a stereoisomer, a tautomer, a polymorph, a solvate, an N-oxide, an isotope labeled compound, a metabolite or a prodrug thereof, a pharmaceutical composition and a pill container comprising same, a preparation method therefor, and the use thereof in the preparation of drugs for preventing or treating STING-mediated related diseases.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: April 8, 2025
    Assignee: SICHUAN KELUN-BIOTECH BIOPHARMACEUTICAL CO., LTD.
    Inventors: Jinming Liu, Yun Ren, Qiang Tian, Hongmei Song, Tongtong Xue, Jingyi Wang
  • Patent number: 12272024
    Abstract: A method, an apparatus, and a device for image processing and a training method thereof are provided. The training method includes obtaining a sample image set, the sample image set comprising a first number of sample images; constructing an image feature set based on the sample image set, the image feature set comprising an image feature extracted from each of the sample images in the sample image set; obtaining a training image set, the training image set comprising a second number of training images; constructing multiple training image pairs based on the training image set and the image feature set; and training the image processing model based on the multiple training image pairs.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: April 8, 2025
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Xiaozhong Ji, Yun Cao, Ying Tai, Chengjie Wang, Jilin Li
  • Publication number: 20250110697
    Abstract: The present disclosure relates to a multiplier, a multiply-accumulate circuit, and a convolution operation unit. The multiplier includes: one or more selection circuits, each of the one or more selection circuits respectively configured to select a target preset multiple of a first operand from a preset multiple of a first operand as a fourth operand according to a corresponding third operand, wherein the target preset multiple is equal to a value of the third operand; and a partial product summing circuit, each of one or more input terminals of the partial product summing circuit respectively connected to an output terminal of corresponding one of at least one or more selection circuits, wherein the partial product summing circuit is configured to calculate a partial product sum of one or more fourth operands from the one or more selection circuits.
    Type: Application
    Filed: June 19, 2024
    Publication date: April 3, 2025
    Applicant: SHENZHEN MICROBT ELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Danyang WANG, Shuangyan CHEN, Yun ZHAI, Zhijun FAN, Zuoxing YANG
  • Publication number: 20250111650
    Abstract: A deep learning method of an artificial intelligence model for medical image recognition is provided. The method includes the following steps: obtaining a first image set, where the first image set includes at least two images captured with different parameters; performing image pre-processing on each image of the first image set to obtain a second image set; performing image augmentation on the second image set to obtain a third image set; adding the third image set to a training image data set; and training the artificial intelligence model using the training image data set.
    Type: Application
    Filed: February 15, 2024
    Publication date: April 3, 2025
    Inventors: Chia-Yuan CHANG, Chen-Hwa SUNG, Gigin LIN, Tzu-Hsiang YANG, Tzu-Yun WANG, Chien-Yu HUANG
  • Publication number: 20250110755
    Abstract: A method for providing an interface includes acquiring a general interface specification associated with a back-end interface. The method further includes generating, based on the general interface specification and a first mapping, a first front-end interface specification. The method further includes converting, based on the first front-end interface specification, a first front-end request into a first back-end request associated with the back-end interface. The method further includes generating, based on the general interface specification and a second mapping, a second front-end interface specification, the second mapping indicating a relationship between the general interface specification and the second front-end interface specification. Furthermore, the method further includes converting, based on the second front-end interface specification, a second front-end request into a second back-end request associated with the back-end interface.
    Type: Application
    Filed: November 9, 2023
    Publication date: April 3, 2025
    Inventors: Yuefeng Li, Ren Wang, Yun Zhang, Weiyang Liu, Qi Wang
  • Publication number: 20250107722
    Abstract: A sensing module includes a first coil, a control component coupled to the first coil, and a shielding component positioned at least on a first side of the first coil. The control component is configured to drive the first coil to transmit a first emitting electromagnetic signal, and to receive an induction signal generated from the first coil induced due to a first feedback electromagnetic signal. The shielding component shields at least a portion of the first emitting electromagnetic signal transmitting toward a first direction.
    Type: Application
    Filed: March 5, 2024
    Publication date: April 3, 2025
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: TING-WEI WANG, CHIU-YUN HUANG
  • Publication number: 20250112234
    Abstract: The present application relates to the field of lithium-ion batteries and discloses a lithium-ion battery cathode material, a preparation method thereof, and a lithium-ion battery. A ratio of surface Ni3+ content of the cathode material to internal Ni3+ content of the cathode material is (0.95 to 1):1, and a content of disordering nickel in the cathode material is less than or equal to 3%. The lithium-ion battery cathode material has the similar surface Ni3+ content and internal Ni3+ content, and has a low content of disordering nickel, thereby avoiding the generation of a NiO passivation layer in the cathode material and reducing the phenomenon of loss of surface active lithium. The lithium-ion battery containing such a cathode material has improved capacity, rate capacity, and cycle performance.
    Type: Application
    Filed: December 9, 2024
    Publication date: April 3, 2025
    Inventors: Yun LIU, Jingpeng WANG, Yaqi WANG, Hang ZHANG, Xuequan ZHANG, Yafei LIU, Yanbin CHEN
  • Patent number: 12264106
    Abstract: A cerium-zirconium-aluminum-based composite material, a cGPF catalyst and a preparation method thereof are provided. The cerium-zirconium-aluminum-based composite material adopts a stepwise precipitation method, firstly preparing an aluminum-based pre-treated material, then coprecipitating the aluminum-based pre-treated material with zirconium and cerium sol, and finally roasting at high temperature to obtain the cerium-zirconium-aluminum-based composite material. The cerium-zirconium-aluminum-based composite material has better compactness and higher density, and when it is used in cGPF catalyst, it occupies a smaller volume of pores on the catalyst carrier, such that cGPF catalyst has lower back pressure and better ash accumulation resistance, which is beneficial to large-scale application of cGPF catalyst.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: April 1, 2025
    Assignee: SINOTECH COMPANY LIMITED
    Inventors: Dacheng Li, Jinfeng Wang, Li Lan, Hui Ye, Lan Yang, Feng Zhang, Yi Yang, Yongxiang Cheng, Tiantian Luo, Yinhua Dong, Yun Wang, Yun Li, Qizhang Chen
  • Patent number: 12266606
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a dielectric layer formed over a power rail; a bottom semiconductor layer formed over the dielectric layer; a backside spacer formed along a sidewall of the bottom semiconductor layer; a conductive feature contacting a sidewall of the dielectric layer and a sidewall of the backside spacer; channel semiconductor layers over the bottom semiconductor layer, wherein the channel semiconductor layers are stacked up and separated from each other; a metal gate structure wrapping each of the channel semiconductor layers; and an epitaxial source/drain (S/D) feature contacting a sidewall of each of the channel semiconductor layers, wherein the epitaxial S/D feature contacts the conductive feature, and the conductive feature contacts the power rail.
    Type: Grant
    Filed: July 20, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Po-Yu Huang, Chia-Hsien Yao, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12267048
    Abstract: A common-emitter amplifier with unilateral pre-embedding inductors includes: an input matching circuit, a first-stage amplification circuit, a first-stage interstage matching circuit, a second-stage amplification circuit, a second-stage interstage matching circuit, a third-stage amplification circuit, and an output matching circuit. The common-emitter amplifier is configured to: make an input signal sequentially enter bases of common-emitter transistors of the first-stage, second-stage, and third-stage amplification circuits, make the input signal be amplified stage by stage by the common-emitter transistors, and finally make an amplified input signal obtained by amplifying of each common-emitter transistor output through a collector of each common-emitter transistor. The common-emitter amplifier is configured to introduce interstage staggered tuning to expand bandwidth to address a narrowband problem.
    Type: Grant
    Filed: December 9, 2024
    Date of Patent: April 1, 2025
    Assignee: Beijing University of Posts and Telecommunications
    Inventors: Jianguo Yu, Xiaorui Liu, Yun Wang, Kaile Li, Yibo Huang, Feixiang Zhang, Zhihe Wu
  • Patent number: 12265857
    Abstract: A method of managing resources is provided in embodiments of the present disclosure. The method includes determining a set of candidate historical requests associated with a target request. Here, the set of candidate historical requests has the same request type and target resource as the target request. The method further includes determining a target request pattern of the target request based on at least one previous request of the target request. The method includes determining a target historical request from the set of candidate historical requests based on the target request pattern. The method includes generating a target response to the target request based on a historical response to the target historical request. In this way, by determining a response to a historical request that has the most similar request pattern to the target request, a simulated response that is more in line with the context can be generated.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: April 1, 2025
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Qi Wang, Ren Wang, Yun Zhang, Ming Zhang, Weiyang Liu
  • Patent number: 12266703
    Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Che Lin, Po-Yu Huang, I-Wen Wu, Chen-Ming Lee, Chia-Hsien Yao, Chao-Hsun Wang, Fu-Kai Yang, Mei-Yun Wang
  • Patent number: 12265451
    Abstract: A data processing method in a storage system and the storage system, and relates to the field of data storage technologies. A client first sends a data block in a stripe and metadata of the data block to a data storage node. The client then sends the metadata of the data block and a parity block to a parity storage node, to back up the metadata of the data block on the parity storage node. When the metadata of the data block is successfully backed up, the data block is written into a corresponding storage device based on a storage location indicated by the metadata. This reduces write operation time.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: April 1, 2025
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Daohui Wang, Chi Song, Tonglei Wang, Yun Zhan
  • Patent number: D1069740
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: April 8, 2025
    Assignee: WINGCOMM CO. LTD.
    Inventors: Jing Ge, Jie Ge, Zuodong Wang, Wei Mao, Yun Bai