Abstract: An image sensor device is provided. The image sensor device includes a substrate having a front surface, a back surface, and a light-sensing region. The image sensor device includes a first isolation structure extending from the front surface into the substrate. The first isolation structure surrounds a first portion of the light-sensing region, the first isolation structure has an etch stop layer, the etch stop layer has an end portion, and the end portion has an H-like shape. The image sensor device includes a second isolation structure extending into the substrate from the back surface to the end portion. The second isolation structure surrounds a second portion of the light-sensing region.

Abstract: A method for reducing a neural network includes compiling the neural network by a reference compiler to rearrange reference weights, manipulating a reference tensor inputted to the neural network to output reference tensors, compiling the neural network by a user compiler to rearrange user weights, manipulating the reference tensor inputted to the neural network to output a user tensor, if a reference tensor of a last layer of the neural network is inconsistent with the user tensor, then a network reducer sorting and partitioning the neural network into a plurality of sub-networks each containing at least one layer. If the user tensor is inconsistent with a corresponding reference tensor, and the network reducer is unable to further partition the sub-network, then output the sub-network to a data reducer. The data reducer simplifies the reference tensor inputted to the corresponding sub-network and simplifies corresponding user weights.

Abstract: A semiconductor arrangement is provided. The semiconductor arrangement includes a first photodiode in a substrate. The semiconductor arrangement includes a lens array over the substrate. A first plurality of lenses of the lens array overlies the first photodiode. Radiation incident upon the first plurality of lenses is directed by the first plurality of lenses to the first photodiode.

Abstract: A semiconductor structure includes a plurality of photosensitive elements in a semiconductor substrate. The semiconductor structure further includes a plurality of shallow trench isolation (STI) structures in the semiconductor substrate. The semiconductor structure further includes a plurality of pad openings in the semiconductor substrate, wherein the plurality of pad openings exposes a first STI structure of the plurality of STI structures. The semiconductor structure further includes a trench in a seal ring region of the semiconductor substrate, wherein the trench exposes a second STI structure of the plurality of STI structures, and the trench completely surrounds the plurality of photosensitive elements, wherein the plurality of pad openings are between the trench and the plurality of photosensitive elements.

Abstract: Some implementations described herein provide pixel sensor configurations and methods of forming the same. In some implementations, one or more transistors of a pixel sensor are included on a circuitry die (e.g., an application specific integrated circuit (ASIC) die or another type of circuitry die) of an image sensor device. The one or more transistors may include a source follower transistor, a row select transistor, and/or another transistor that is used to control the operation of the pixel sensor. Including the one or more transistors of the pixel sensor (and other pixel sensors of the image sensor device) on the circuitry die reduces the area occupied by transistors in the pixel sensor on the sensor die. This enables the area for photon collection in the pixel sensor to be increased.

Abstract: Embodiments of this specification provide a system and method for assisting intelligent maintenance for a subway vehicle, a device and a medium.

Abstract: A pixel sensor includes a photodiode including an anode overlying a cathode positioned in a substrate and a transfer transistor structure including a source region extending along a surface of the substrate adjacent to the anode and overlying the cathode, a floating diffusion region extending along the surface of the substrate parallel to the source region, and a gate conductor including an array of conductive protrusions extending into the substrate between the source region and the floating diffusion region.

Abstract: A device includes a plurality of photodiode regions within a semiconductor substrate, a plurality of transistors over a front-side surface of the semiconductor substrate, a plurality of deep trench isolation (DTI) structures extending a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate, and a plurality of isolation structures extending a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate. The second depth is less than the first depth. One of the plurality of isolation structures has a quadrilateral outline on the backside surface of the semiconductor substrate. The isolation structure includes two triangular surfaces and two rectangular surfaces respectively extending from four sides of the quadrilateral outline.

Abstract: A front-side peripheral region of a first wafer may be edge-trimmed by performing a first pre-bonding edge-trimming process. A second wafer to be bonded with the first wafer is provided. Optionally, a front-side peripheral region of the second wafer may be edge-trimmed by performing a second pre-bonding edge-trimming process. A front surface of the first wafer is bonded to a front surface of a second wafer to form a bonded assembly. A backside of the first wafer is thinned by performing at least one wafer thinning process. The first wafer and a front-side peripheral region of the second wafer may be edge-trimmed by performing a post-bonding edge-trimming process. The bonded assembly may be subsequently diced into bonded semiconductor chips.

Abstract: A semiconductor device includes a pixel array comprising a first pixel and a second pixel. The semiconductor device includes a metal structure overlying a portion of a substrate between the first pixel and the second pixel. The semiconductor device includes a first barrier layer adjacent a sidewall of the metal structure. The semiconductor device includes a passivation layer adjacent a sidewall of the first barrier layer. The first barrier layer is between the passivation layer and the metal structure.

Abstract: An image sensor can be provided by: forming an array of image pixels on a semiconductor substrate; forming black level correction (BLC) pixels adjacent to the array of image pixels on the semiconductor substrate; forming a patterned layer stack over the array of image pixels and over the BLC pixels, wherein the patterned layer stack includes N repetitions of a unit layer stack in which N instances of the unit layer stack are repeated along a vertical direction; forming an optically transparent layer over an entirety of the patterned layer stack, wherein the optically transparent layer has a planar top surface; forming an infrared blocking material layer over the optically transparent layer; and patterning the infrared blocking material layer. A remaining portion of the infrared blocking material layer covers the BLC pixels, and does not cover the array of image pixels.

Abstract: An image sensing apparatus is disclosed. The image sensing apparatus includes a pixel array and micro lenses disposed above the pixel array. The pixel array includes sensing pixels configured to capture minutia points of a fingerprint and positioning pixels configured to provide positioning codes.

Abstract: A system for the cryptographically-secure, autonomous control of devices comprising, connected to or remotely operating devices in an electrically powered network and the transaction of the benefits, costs or value created by or transacted through the devices in this electrically powered network.

Abstract: The present invention relates to a subway vehicle electronic record system based on blockchain technology, which mainly includes business view module, record information maintenance module, statistical analysis module, record information management module, system management module, and blockchain foundation platform. The invention comprehensively makes use of blockchain, database and other technologies to normalize heterogeneous data of subway vehicle record.

Abstract: Some implementations described herein provide pixel sensor configurations and methods of forming the same. In some implementations, one or more transistors of a pixel sensor are included on a circuitry die (e.g., an application specific integrated circuit (ASIC) die or another type of circuitry die) of an image sensor device. The one or more transistors may include a source follower transistor, a row select transistor, and/or another transistor that is used to control the operation of the pixel sensor. Including the one or more transistors of the pixel sensor (and other pixel sensors of the image sensor device) on the circuitry die reduces the area occupied by transistors in the pixel sensor on the sensor die. This enables the area for photon collection in the pixel sensor to be increased.

Abstract: The present disclosure describes an image sensor device and a method for forming the same. The image sensor device can include a semiconductor layer. The semiconductor layer can include a first surface and a second surface. The image sensor device can further include an interconnect structure formed over the first surface of the semiconductor layer, first and second radiation sensing regions formed in the second surface of the semiconductor layer, a metal stack formed over the second radiation sensing region, and a passivation layer formed through the metal stack and over a top surface of the first radiation sensing region. The metal stack can be between the passivation layer and an other top surface of the second radiation sensing region.

Abstract: A device includes a plurality of photodiode regions within a semiconductor substrate, a plurality of transistors, a plurality of deep trench isolation (DTI) structures, and a plurality of isolation structures. The transistors are over a front-side surface of the semiconductor substrate. The DTI structures extend a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate. The isolation structures extend a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate. The second depth is less than the first depth. From a plan view, each of the plurality of isolation structures has a triangular profile at the backside surface of the semiconductor substrate.

Abstract: A pixel array includes octagon-shaped pixel sensors and a combination of visible light pixel sensors (e.g., red, green, and blue pixel sensors) and near infrared (NIR) pixel sensors. The color information obtained by the visible light pixel sensors and the luminance obtained by the NIR pixel sensors may be combined to increase the low-light performance of the pixel array, and to allow for low-light color images in low-light applications. The octagon-shaped pixel sensors may be interspersed in the pixel array with square-shaped pixel sensors to increase the utilization of space in the pixel array, and to allow for pixel sensors in the pixel array to be sized differently. The capability to accommodate different sizes of visible light pixel sensors and NIR pixel sensors permits the pixel array to be formed and/or configured to satisfy various performance parameters.

Abstract: A method of making a semiconductor structure includes forming a pixel array region on a substrate. The method further includes forming a first seal ring region on the substrate, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The method further includes forming a first isolation feature in the first seal ring region, wherein forming the first isolation feature includes filling a first opening with a dielectric material, wherein the first isolation feature is a continuous structure surrounding the pixel array region. The method further includes forming a second isolation feature between the first isolation feature and the pixel array region, wherein forming the second isolation feature includes filling a second opening with the dielectric material.

Abstract: Exemplary embodiments for redistribution layers of integrated circuit components are disclosed. The redistribution layers of integrated circuit components of the present disclosure include one or more arrays of conductive contacts that are configured and arranged to allow a bonding wave to displace air between the redistribution layers during bonding. This configuration and arrangement of the one or more arrays minimize discontinuities, such as pockets of air to provide an example, between the redistribution layers during the bonding.