Abstract: The invention discloses an MEMS-based current sensing apparatus including: a flexible substrate joined onto an conducting wire; a sensing unit formed of an MEMS structure and disposed on the flexible substrate, the sensing unit outputting a response to a electromagnetic field induced by a current flowing in the conducting wire; and a readout circuit disposed on the flexible substrate and coupled to the sensing unit, the readout circuit monitoring the response to the electromagnetic field and calculating the amount of the current flow.

Abstract: The present invention discloses an image preprocessing system, which includes a processing unit; an image preprocessing unit coupled to the processing unit to preprocess image slice data, wherein the image preprocessing unit includes an image fusion module to estimate missing values between different image slice data and an image stitching module to stitch different image slice data into stitched image data; and a database coupled to the processing unit to store the preprocessed image slice data.

Abstract: The present invention discloses an image processing method for feature retention associated with averaging processes. The image processing method comprises: scaling and aligning a plurality of image data for acquiring feature information; determining a plurality of two-dimensional feature label points according to the feature information for generating at least one Bezier curve; utilizing the at least one Bezier curve to generate at least one Bezier tube and performing Bezier tube fitting for generating result of Bezier tube fitting; deforming the plurality of image data according to the Bezier tube or the result of Bezier tube fitting for generating a plurality of deformed image data; and averaging the plurality of deformed image data for generating feature-preserved average image data. The present invention also provides an image processing system, a computer readable storage medium, and a computer program product, for implementing the image processing method.

Abstract: The present invention discloses an image preprocessing system, which includes a processing unit; an image preprocessing unit coupled to the processing unit to preprocess image slice data, wherein the image preprocessing unit includes an image fusion module to estimate missing values between different image slice data and an image stitching module to stitch different image slice data into stitched image data; and a database coupled to the processing unit to store the preprocessed image slice data.

Abstract: The present invention relates to methods for searching and constructing a 3D motif image database, wherein said 3D motif image database can be used to understand the connection relationship of a 3D network, e.g. a neural network comprising biological neural networks or artificial neural networks. The searching and constructing methods are applied on the 3D motif image database, a proper computer-aided graphic platform. The database not only facilitates the management of the huge amount of categorized data but also rationally excavates the hidden information cloaked within.

Abstract: Task flows are utilized for real-time page compositions, real-time flow compositions, or both. At design time, a plurality of task flows are provided as a database or library. A manager, or other type of user, can associate task flows with dynamic regions in an application page being designed. The application page can include one or more dynamic regions that act as a container for task flows. Metadata is generated from the customization of input parameters. At runtime, application pages are generated on-the-fly for display in a user interface. The application pages are composed according to the task flows embedded therein. The application pages are presented to the user according to an application flow. Through a user interface, the user can enter and retrieve information related to governance, risk, and compliance (GRC) activities, or other types of activities.

Abstract: The bio-expression system comprising: a process system used to process data and a three-dimension image generating module embedded in the computing system, wherein while input of a set of two-dimensional individual model sections is fed into the process system, the three-dimension image generating module is responsive to the input of the two-dimension individual model sections and is capable of processing an individual model construction and model-averaging procedure, thereby generating an average model for each individual dataset. A database includes a bio-expression sub-database, cellular network sub-database and fine structure sub-database, wherein the database is coupled to the process system to store at least the average model. A stereoscopic projecting system is coupled to the process system to display stereoscopic images for active or passive virtual reality applications, thereby presenting the bio-expressions, cellular networks or bio-fine structures under the input instruction of the process system.

Abstract: A method for composing a confocal microscopy image with a higher resolution comprising the steps of: (1) start; (2) to decide whether the number of images to be stitched are more than two, if no, going to step (3), otherwise, going to step (7); (3) proceeding pyramidal correlations; (4) gaining compensation for the overlapped region of the two images; (5) proceeding an intensity adjustment beyond the overlapped regions; (6) proceeding a dynamic programming, then going to step (15); (7) to decide whether the pyramidal correlation is a must, if yes, going step (8), otherwise, going to step (12); (8) proceeding the pyramidal correlations; (9) proceeding an adjacency adjustment; (10) to decide whether a linear adjustment by a distance map is a must, if yes, going to step (11), otherwise, going to step (13); (11) proceeding the linear adjustment by the distance map; (12) proceeding an scale invariant feature transform (SIFT); (13) gain compensation for the all images; (14) proceeding a multi-band blending; (15) co

Abstract: A liquid crystal display device (50) includes a first substrate (513), a second substrate (515) opposite to the first substrate having a prism structure (53) at an outer surface thereof, a liquid crystal layer having liquid crystal molecules interposed between the first and second substrates, and a backlight module opposite to the prism structure. The prism structure provides substantially the same function and performance as a prism sheet of a typical liquid crystal display. Thus the prism sheet can be omitted from the liquid crystal display device. The number of optical elements is reduced, and the liquid crystal display device has a lower cost and less weight.

Abstract: A method of generating standard brain model from a bio-expression system includes performing steps of registration to input standard surface and individual surface into affine registration; recording a transformation parameters from the affine registration; performing steps of inputting a individual neuropil and transform parameters into an affine transformation; applying the data of the affine transformation to transform individual neuropil to achieve transformed individual neuropil; and performing a step of affine registration to register a standard neuropil to the transformed individual neuropil to achieve a resulting transformation, wherein the resulting transformation can be output as a position and orientation of standard neuropil within the standard surface.

Abstract: A semiconductor device, a chip structure thereof, and a method for fabricating the same are proposed. The method involves cutting a wafer with an array of chips twice so as to separate the chips and to form a chip structure. The first cutting is wider than the second cutting, and both are performed on an inactive surface of each of the chips. The chip structure includes a protruding portion formed on the inactive surface. The chip structure is electrically connected to a substrate by conductive bumps in a flip-chip manner and mounted with a heat sink. A decrease in contact area between the chip and the heat sink reduces warpage caused to the semiconductor device by thermal stress, thus preventing delamination of the heat sink and cracking of the conductive bumps, and reducing the expense and time spent on finding suitable underfill materials.

Abstract: An electrostatic discharge (ESD) protection circuit (140) includes: a first transistor (141), a second transistor (142), a third transistor (143), and a fourth transistor (144). Each transistor includes a source electrode ‘s’, a drain electrode ‘d’ and a gate electrode ‘g’. The gate electrode ‘g’ of the first transistor, the gate electrode ‘g’ of the second transistor, the drain electrode ‘d’ of the third transistor, and the drain electrode ‘d’ of the fourth transistor are connected to each other. The source electrode ‘s’ of the first transistor, the source electrode ‘s’ of the second transistor, and the source and gate electrodes of the third transistor are connected to each other. The drain electrode ‘d’ of the first transistor, the drain electrode ‘d’ of the second transistor, and the source and gate electrodes of the fourth transistor are connected to each other.

Abstract: The bio-expression system comprising: a process system used to process data and a three-dimension image generating module embedded in the computing system, wherein while input of a set of two-dimensional individual model sections is fed into the process system, the three-dimension image generating module is responsive to the input of the two-dimension individual model sections and is capable of processing an individual model construction and model-averaging procedure, thereby generating an average model for each individual dataset. A database includes a bio-expression sub-database, cellular network sub-database and fine structure sub-database, wherein the database is coupled to the process system to store at least the average model. A stereoscopic projecting system is coupled to the process system to display stereoscopic images for active or passive virtual reality applications, thereby presenting the bio-expressions, cellular networks or bio-fine structures under the input instruction of the process system.

Abstract: A liquid crystal display device (50) includes a first substrate (513), a second substrate (515) opposite to the first substrate having a prism structure (53) at an outer surface thereof, a liquid crystal layer having liquid crystal molecules interposed between the first and second substrates, and a backlight module opposite to the prism structure. The prism structure provides substantially the same function and performance as a prism sheet of a typical liquid crystal display. Thus the prism sheet can be omitted from the liquid crystal display device. The number of optical elements is reduced, and the liquid crystal display device has a lower cost and less weight.

Abstract: A photomask for manufacturing a reflective bump includes a plurality of patterns, each of which includes a light-transmitting portion meshed with a light-shielding portion, one of the light-transmitting portion and the light-shielding portion being a block area, and including a plurality of protrusions arranged at one side thereof that adjoins the other of the light-transmitting portion and the light-shielding portion, the protrusions being arranged in a plane of the photomask.

Abstract: A simplified method for forming a TFT includes four photolithographic processes. A first photolithographic process is used for forming a gate electrode (42). A second photolithographic process is used for forming a source electrode (742), a drain electrode (741), a channel layer (82), a source ohmic contact layer (832), and a drain ohmic contact layer (831). A third photolithographic process is used for forming a passivation layer (110). A fourth photolithographic process is used for finally forming a pixel electrode (120). The source electrode and the drain electrode are made of molybdenum or a molybdenum alloy.

Abstract: A storage capacitor in a liquid crystal display is provided for increasing the capacitance of the storage capacitor without substantially changing the manufacturing process, the storage capacitor including a first capacitor electrode (18), a first insulating layer (16) formed on the first capacitor electrode, a second capacitor electrode (14) formed on the first insulating layer, a second insulating layer (12) formed on the second capacitor electrode, and a third capacitor electrode (11) formed on the second insulating layer and electrically connected with the first capacitor electrode. The second capacitor electrode is electrically connected with the pixel electrode (10) of the liquid crystal display. With this configuration, the capacitance of the storage capacitor is substantially increased without reducing the aperture ratio of each pixel of a liquid crystal display.

Abstract: A photo-mask process includes the steps of: spreading a film of photo resist on a carrier (30, 50), exposing the photo resist using a mask with a predefined pattern, developing the photo resist to obtain a photo resist layer (36, 60) with the predefined pattern, depositing a layer of predetermined material on the photo resist layer and the carrier, and removing the photo resist layer and the layer of predetermined material thereon. The photo-mask process can omit a conventional etching process. That is, the photo-mask process is simplified, and its cost is lower than that of conventional photo-mask processes. A related method for manufacturing a thin film transistor is also provided.

Abstract: A method for fabricating patterns of a reflective thin film transistor liquid crystal display (TFT-LCD) includes: providing a substrate (300); forming a TFT layer (310) on the substrate; coating a photo resist layer (320) on the TFT layer; pre-baking the photo resist layer; patterning the photo resist layer with a transcribing mold (400) having specific patterns; and further baking the photo resist layer. By using the transcribing mold, the shapes, precision and angles of the patterns can be accurately controlled, thereby easily providing a desired photo resist layer.

Abstract: A thin film transistor includes a substrate (1), a gate electrode (2) disposed in the substrate, a gate insulation layer (4) disposed on the substrate and gate electrode, a channel layer (5) disposed on the gate insulation layer, a source ohmic contact layer (6a) and a drain ohmic contact layer (6b) arranged on the channel layer and at the end of the channel layer, a source electrode (7a) disposed on the substrate and source ohmic contact layer, a drain electrode (7b) disposed on the substrate and drain ohmic contact layer.