Patents by Inventor Yung Chung

Yung Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10116259
    Abstract: Certain aspects of the present disclosure provide an inductor-enclosed switchable voltage-controlled oscillator (VCO), for use in a frequency synthesizer of a radio frequency integrated circuit (RFIC), for example. One example apparatus is a frequency synthesizer that generally includes a first VCO circuit comprising a first inductor and a second VCO circuit comprising a second inductor, wherein at least a portion of the first VCO circuit is disposed inside a loop of the second inductor. According to certain aspects, at least a portion of the second VCO circuit is disposed inside a loop of the first inductor.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: October 30, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Yiping Han, Yung-Chung Lo, Zhang Jin
  • Publication number: 20180290628
    Abstract: The present disclosure relates to methods and associated systems for unlocking a vehicle. The vehicle has a first input device and a second input device. The method includes (1) receiving a passcode from the first input device; (2) receiving a confirmation of the passcode from the second input device; and (3) in response to the confirmation, storing the passcode in a storage device associated with the vehicle. The passcode is input by operating the first input device in a first predetermined way, and, the confirmation is input by operating the second input device in a second predetermined way.
    Type: Application
    Filed: April 3, 2018
    Publication date: October 11, 2018
    Inventors: Hok-Sum Horace Luke, Chun-Sheng Hsu, Yung-Chung Hu, Jia-Yang Wu, Yu-Sheng Huang
  • Patent number: 10097156
    Abstract: A resonance structure of bulk acoustic wave resonator comprises a bottom electrode, a dielectric layer and a top electrode, wherein the dielectric layer is formed on the bottom electrode; the top electrode is formed on the dielectric layer. A resonance area is defined by the overlapping area of the projection of the bottom electrode, the dielectric layer and the top electrode. The resonance area has a contour. The contour includes at least three curved edges and is formed by connecting the at least three curved edges. Each curved edge is concave to a geometric center of the contour.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: October 9, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Chia-Ta Chang, Re Ching Lin, Yung-Chung Chin, Chih-Feng Chiang
  • Patent number: 10040681
    Abstract: A micro electro-mechanical (MEMS) device assembly is provided. The MEMS device assembly includes a first substrate that has a plurality of electronic devices, a plurality of first bonding regions, and a plurality of second bonding regions. The MEMS device assembly also includes a second substrate that is bonded to the first substrate at the plurality of first bonding regions. A third substrate having a recessed region and a plurality of standoff structures is disposed over the second substrate and bonded to the first substrate at the plurality of second bonding regions. The plurality of first bonding regions provide a conductive path between the first substrate and the second substrate and the plurality of the second bonding regions provide a conductive path between the first substrate and the third substrate.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: August 7, 2018
    Assignee: Miradia Inc.
    Inventors: Hua-Shu Wu, Yu-Hao Chien, Shih-Yung Chung, Li-Tien Tseng, Yu-Te Yeh
  • Publication number: 20180211919
    Abstract: A semiconductor device comprises: a first semiconductor structure; a second semiconductor structure on the first semiconductor structure; an active region, wherein the active region comprises multiple alternating well layers and barrier layers, the active region further comprises an upper surface facing the second semiconductor structure and a bottom surface opposite the upper surface; an electron blocking region between the second semiconductor structure and the active region; a first aluminum-containing layer between the electron blocking region and the active region, wherein the first aluminum-containing layer has a band gap greater than the band gap of the first electron blocking layer; and a p-type dopant above the bottom surface of the active region and comprising a concentration profile comprising a peak shape having a peak concentration value, wherein the peak concentration value lies at a distance of between 15 nm and 60 nm from the upper surface of the active region.
    Type: Application
    Filed: January 19, 2018
    Publication date: July 26, 2018
    Inventors: Yung-Chung PAN, Chang-Yu TSAI, Ching-Chung HU, Ming-Pao CHEN, Chi SHEN, Wei-Chieh LIEN
  • Publication number: 20180160780
    Abstract: The present invention is formed by an energy absorber and a fastener. The energy absorber has coincidingly bounded first portion and second portion and makes the top edges of the first portion and the second portion to form a diverged shape. The fastener is locked at the diverged top edge of the energy absorber. When the user falls, it makes the fastener to release the diverged top edge of the energy absorber. Then it makes the energy absorber to pull along the diverged top edge to further sequentially tear the coincidingly bound part of the first portion and the second portion, so as to absorb the impact force of the falling. The present invention mainly uses the overall arrangement of the fastener and the energy absorber to improve on the drawbacks of high costs and long assembling hours of the processing of the prior art.
    Type: Application
    Filed: December 13, 2016
    Publication date: June 14, 2018
    Inventor: YUNG-CHUNG HUANG
  • Patent number: 9998087
    Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate including an epitaxial structure formed on a compound semiconductor substrate, a power amplifier upper structure formed on a top-side of a left part of the compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on the top-side of a right part of the compound semiconductor epitaxial substrate; wherein the left part of the compound semiconductor epitaxial substrate and the power amplifier upper structure form a power amplifier; the right part of the compound semiconductor epitaxial substrate and the film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic wave device.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: June 12, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Re Ching Lin, Pei-Chun Liao, Cheng-Kuo Lin, Yung-Chung Chin
  • Publication number: 20180115731
    Abstract: The present invention provides a global shutter high dynamic range pixel and a global shutter high dynamic range image sensor. The global shutter high dynamic range pixel includes: a photoelectric transducer unit, a floating node, a first charge transfer unit, a second charge transfer unit and a pixel signal output unit. The first charge transfer unit includes a Metal-Oxide-Semiconductor (MOS) capacitor. The MOS capacitor is configured to operably accumulate at least a portion of the charges transferred from the photoelectric transducer unit. The MOS capacitor is turned ON or OFF according to a control signal, thereby forming a gate-induced potential well internally within the MOS capacitor, so as to control the portion of charges.
    Type: Application
    Filed: May 18, 2017
    Publication date: April 26, 2018
    Inventors: Yung-Chung Lee, Yi-Cheng Chiu, Hsin-Hui Hsu, Jui-Te Chiu, Han-Chi Liu
  • Patent number: 9937367
    Abstract: The present invention comprises a shell, a fixing arrangement, a belt pulley, a main belt, and a breaking arrangement. The shell comprises a compartment defined therein and a belt outlet thereon. The compartment has an opening facing upward. The fixing arrangement detachably buckles the shell on safety harness. The belt pulley is pivotally arranged in the compartment by an axis and defines a winding room. The main belt is coiled in the winding room and has a first end affixed in the winding room, a second end pulled out from the shell through the belt outlet, and a supporting portion provided between the first end and the second end.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: April 10, 2018
    Inventors: Yung-Chung Huang, George J Stallings, Todd Olson
  • Publication number: 20180065184
    Abstract: This invention presents a method for manufacturing sintered and carburized porous stainless steel parts, comprising steps of: sintering stainless steel powders to obtain a porous sintered stainless steel, wherein the porous sintered stainless steel comprises a three dimensional network skeleton structure with a large number of interconnected pore channels; and carburizing the porous sintered stainless steel by a non-halogenated carbon-bearing gas, wherein the porous sintered stainless steel being maintained at a carburizing temperature below 600° C. such that carbon atoms can be implanted into the porous sintered stainless steel and converts a surface portion of the skeleton structure, that is in contact with the carbon-bearing gas in the interconnected pore channels, into a carburized layer. A carburized layer is formed and spread over a skeleton structure of the sintered porous body. Thereby, the strength, surface hardness, and core hardness of the sintered body are significantly increased.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Kuen-Shyang HWANG, Li-Hui CHENG, Yung-Chung LU
  • Patent number: 9905610
    Abstract: An integrated structure of acoustic wave device and varactor comprises an acoustic wave device and a varactor formed on a first part and a second part of a semiconductor substrate respectively. The acoustic wave device comprises an acoustic wave device upper structure and a first part of a bottom epitaxial structure. The acoustic wave device upper structure is formed on the first part of the bottom epitaxial structure. The varactor comprises a varactor upper structure and a second part of the bottom epitaxial structure. The varactor upper structure is formed on the second part of the bottom epitaxial structure. The integrated structure of the acoustic wave device and the varactor formed on the same semiconductor substrate is capable of reducing the module size, optimizing the impedance matching, and reducing the signal loss between the varactor and the acoustic wave device.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: February 27, 2018
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Re Ching Lin, Pei-Chun Liao, Cheng-Kuo Lin, Yung-Chung Chin, Chih-Feng Chiang
  • Patent number: 9806355
    Abstract: An apparatus of power generation is provided. The apparatus uses a stack of dense solid oxide fuel cells (SOFC). The exhaust gas generated by a burner of the apparatus enters into the SOFC stack for heating. At the same time, the SOFC stack is heated by the thermal radiation and heat transfer of the burner as well as the thermal convection of gases between the anode and the cathode. Thus, the SOFC stack is heated to reach an operating temperature for generating power without any additional electroheat device. The present invention has a simple structure, flexible operation. Moreover, it increased efficiency, reduced pollutant emission with lowered costs of equipment and operation.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: October 31, 2017
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, Executive Yuan, R.O.C.
    Inventors: Wen-Tang Hong, Cheng-Nan Huang, Shih-Kun Lo, Hsueh-I Tan, Ching-Ha Lin, Yung-Chung Shih
  • Publication number: 20170294893
    Abstract: A resonance structure of bulk acoustic wave resonator comprises a bottom electrode, a dielectric layer and a top electrode, wherein the dielectric layer is formed on the bottom electrode; the top electrode is formed on the dielectric layer. A resonance area is defined by the overlapping area of the projection of the bottom electrode, the dielectric layer and the top electrode. The resonance area has a contour. The contour includes at least three curved edges and is formed by connecting the at least three curved edges. Each curved edge is concave to a geometric center of the contour.
    Type: Application
    Filed: August 4, 2016
    Publication date: October 12, 2017
    Inventors: Chia-Ta CHANG, Re Ching LIN, Yung-Chung CHIN, Chih-Feng CHIANG
  • Publication number: 20170221700
    Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 3, 2017
    Inventors: Shich-Chang Suen, Li-Chieh Wu, Chi-Jen Liu, He Hui Peng, Liang-Guang Chen, Yung-Chung Chen
  • Publication number: 20170170233
    Abstract: An integrated structure of acoustic wave device and varactor comprises an acoustic wave device and a varactor formed on a first part and a second part of a semiconductor substrate respectively. The acoustic wave device comprises an acoustic wave device upper structure and a first part of a bottom epitaxial structure. The acoustic wave device upper structure is formed on the first part of the bottom epitaxial structure. The varactor comprises a varactor upper structure and a second part of the bottom epitaxial structure. The varactor upper structure is formed on the second part of the bottom epitaxial structure. The integrated structure of the acoustic wave device and the varactor formed on the same semiconductor substrate is capable of reducing the module size, optimizing the impedance matching, and reducing the signal loss between the varactor and the acoustic wave device.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventors: Shu-Hsiao TSAI, Re Ching LIN, Pei-Chun LIAO, Cheng-Kuo LIN, Yung-Chung CHIN
  • Publication number: 20170155708
    Abstract: A software defined networking (SDN) system and network connection routing method thereof are provided. The SDN system includes an SDN controlling server and an SDN switch. The SDN switch receives client network packets from a client device and transmits the client network packets to the SDN controlling server. The SDN controlling server determines a connection route of the client device according to the client network packets and server loading information. The SDN controlling server transmits the connection route to the SDN switch. The SDN switch stores the connection route and transmits the client network packets to one of servers based on the connection route.
    Type: Application
    Filed: December 9, 2015
    Publication date: June 1, 2017
    Inventors: Po-Wen CHI, Yu-Hsiang LIN, Cheng-Wei HU, Yung-Chung WANG
  • Patent number: 9653594
    Abstract: A system and method for forming and using a liner is provided. An embodiment comprises forming an opening in an inter-layer dielectric over a substrate and forming the liner along the sidewalls of the opening. A portion of the liner is removed from a bottom of the opening, and a cleaning process may be performed through the liner. By using the liner, damage to the sidewalls of the opening from the cleaning process may be reduced or eliminated. Additionally, the liner may be used to help implantation of ions within the substrate.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: May 16, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chi Tsai, Chia-Han Lai, Yung-Chung Chen, Mei-Yun Wang, Chii-Ming Wu, Fang-Cheng Chen, Huang-Ming Chen, Ming-Ta Lei
  • Patent number: 9653516
    Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic w
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: May 16, 2017
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Shu-Hsiao Tsai, Re Ching Lin, Pei-Chun Liao, Cheng-Kuo Lin, Yung-Chung Chin
  • Publication number: 20170134000
    Abstract: An integrated structure of power amplifier and acoustic wave device comprises: a compound semiconductor epitaxial substrate, a power amplifier upper structure formed on a first side of said compound semiconductor epitaxial substrate, and a film bulk acoustic resonator formed on a second side of said compound semiconductor epitaxial substrate; wherein forming an epitaxial structure on a compound semiconductor substrate to form said compound semiconductor epitaxial substrate; wherein said first side of said compound semiconductor epitaxial substrate and said power amplifier upper structure form a power amplifier; said second side of said compound semiconductor epitaxial substrate and said film bulk acoustic resonator form an acoustic wave device; the integrated structure of power amplifier and acoustic wave device on the same compound semiconductor epitaxial substrate is capable of reducing the component size, optimizing the impedance matching, and reducing the signal loss between power amplifier and acoustic w
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Inventors: Shu-Hsiao TSAI, Re Ching LIN, Pei-Chun LIAO, Cheng-Kuo LIN, Yung-Chung CHIN
  • Patent number: 9633832
    Abstract: The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: April 25, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD
    Inventors: Shich-Chang Suen, Li-Chieh Wu, Chi-Jen Liu, He Hui Peng, Liang-Guang Chen, Yung-Chung Chen