Patents by Inventor Yung-Hung Wang

Yung-Hung Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070242501
    Abstract: A magnetic memory cell, used in a magnetic memory device, includes a stacked magnetic pinned layer, serving as a part of the base structure. The stacked magnetic pinned stacked layer has a top pinned layer and a bottom pinned layer, between which there is a sufficient large magnetic coupling force to maintain magnetization of the top pinned layer on a reference direction. A tunnel barrier layer is disposed on the stacked magnetic pinned layer. A magnetic free stacked layer is disposed on the tunnel barrier layer. The magnetic free stacked layer includes a bottom free layer having a bottom magnetization and a top free layer having a top magnetization. When no assisted magnetic field is applied, the bottom magnetization is anti-parallel to the top magnetization and is perpendicular to the reference direction on the top pinned layer. A magnetic bias layer can be also disposed on the top free layer.
    Type: Application
    Filed: August 18, 2006
    Publication date: October 18, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chung Hung, Yung-Hsiang Chen, Ming-Jer Kao, Yuan-Jen Lee, Yung-Hung Wang
  • Publication number: 20070200188
    Abstract: A magnetic random access memory having reference magnetic resistance is provided. The memory includes at least one magnetic memory cell having an antiferromagnet layer, a pinned layer formed thereon, a tunnel barrier layer formed thereon, and a free layer formed thereon. The pinned layer and free layer are arranged orthogonally to form a reference magnetic resistance state. Through the provided MRAM structure, the access accuracy is greatly increased and the access speed is accelerated.
    Type: Application
    Filed: May 1, 2007
    Publication date: August 30, 2007
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Chung Hung, Yung-Hsiang Chen, Ming-Jer Kao, Kuo-Lung Chen, Lien-Chang Wang, Yung-Hung Wang
  • Publication number: 20070166839
    Abstract: A fabrication method of a magnetoresistance multi-layer is provided. The method includes forming a multi-layer with at least an antiferromagnetic layer and performing an ion irradiation process to the multi-layer to transform a disordered structure of the antiferromagnetic layer to an ordered structure. Accordingly, the process time can be reduced and the interdiffusion in the multi-layer can be prevented.
    Type: Application
    Filed: May 12, 2006
    Publication date: July 19, 2007
    Inventors: Chih-Huang Lai, Sheng-Huang Huang, Cheng-Han Yang, Yung-Hung Wang, Wei-Chuan Chen, Kuei-Hung Shen
  • Publication number: 20070164383
    Abstract: A magnetic memory with improved writing margin is provided, which includes a magnetic tunnel junction device and an adjustment layer. The magnetic tunnel junction device includes an anti-ferromagnetic layer, a pinned layer, a tunnel barrier layer, and a free layer formed sequentially. The adjustment layer is formed on one side of the magnetic tunnel junction device and contacts the free layer. The thickness of the adjustment layer is smaller than 20 nm and it employs Ru or Ru-base materials. The magnetic memory with improved writing margin may improve the switching uniformity and reduce the switching field of the free layer. Therefore, the current necessary for the write word line is reduced.
    Type: Application
    Filed: August 1, 2006
    Publication date: July 19, 2007
    Inventors: Wei-Chuan Chen, Yung-Hung Wang, Shan-Yi Yang, Kuei-Hung Shen
  • Publication number: 20060138509
    Abstract: A magnetic random access memory with lower switching field through indirect exchange coupling. The memory includes a first antiferromagnetic layer, a pinned layer formed on the first antiferromagnetic layer, a tunnel barrier layer formed on the pinned layer, a ferromagnetic free layer formed on the tunnel barrier layer, a metal layer formed on the ferromagnetic free layer, and a second antiferromagnetic layer formed on the metal layer. The anisotropy axis of the second antiferromagnetic layer and the ferromagnetic layer and that of the ferromagnetic free layer are arranged in parallel. The net magnetic moment of the antiferromagnetic layer interface between the second antiferromagnetic layer and the metal layer is close to zero. The memory has the advantages of lowering the switching field of the ferromagnetic layer and lowering the writing current.
    Type: Application
    Filed: June 20, 2005
    Publication date: June 29, 2006
    Inventors: Yuan-Jen Lee, Yung-Hung Wang, Lien-Chang Wang, Ming-Jer Kao
  • Publication number: 20060113619
    Abstract: A magnetic random access memory having reference magnetic resistance is provided. The memory includes at least one magnetic memory cell having an antiferromagnet layer, a pinned layer formed thereon, a tunnel barrier layer formed thereon, and a free layer formed thereon. The pinned layer and free layer are arranged orthogonally to form a reference magnetic resistance state. Through the provided MRAM structure, the access accuracy is greatly increased and the access speed is accelerated.
    Type: Application
    Filed: September 13, 2005
    Publication date: June 1, 2006
    Inventors: Chien-Chung Hung, Yung-Hsiang Chen, Ming-Jer Kao, Kuo-Lung Chen, Lien-Chang Wang, Yung-Hung Wang
  • Patent number: 6792585
    Abstract: The invention discloses a relative structure placement of datapath of cell instances in a column structure, a row structure, or an array structure. To encourage placement of a desirable structure, pseudo cells, pseudo pins, and pseudo nets are selected to be placed at certain locations with respect to real cell instances. The end result produces a cluster of real cell instances that form a desirable structure while minimizing the length of nets. The invention further discloses a non-uniform partitioning of a density map for calculating a force update vector. The partitioning is taken over a region A to compute Riemann sum approximations of a function F over the region A. A force update vector is calculated for a given cell instance within the region A where neighboring cell instances have an exponentially larger grid size as cell instances extend further away from the given cell instance.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: September 14, 2004
    Assignee: Arcadia Design Systems, Inc.
    Inventors: Tsu-Wei Ku, Scot A. Woodward, Yung-Hung Wang, Duan-Ping Chen, Wei-Kong Chia