Abstract: An encoder that includes memory and circuitry coupled to the memory. The circuitry encodes a slice into one or more data access regions in a variable length encoding process. The circuitry encodes one or more offsets into a slice header, based on a flag written into a sequence header and a total number of the one or more data access regions. The one or more offsets each specify a head position of a corresponding one of the one or more data access regions in a bitstream. When the flag indicates that the one or more offsets are to be encoded and the total number is at least two, the one or more offsets are encoded. The flag switches between encoding and not encoding the one or more offsets regardless of whether the total number is at least two.

Abstract: A decoder includes memory and a processor coupled to the memory and configured to: generate a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component; clip the first coefficient value such that the clipped first coefficient value is within a first range from ?27 to 27?1; generate a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component; clip the second coefficient value such that the clipped second coefficient value is within a second range different from the first range; generate a third coefficient value by adding the clipped first coefficient value to the clipped second coefficient value; and generate a third reconstructed image sample of the chroma component using the third coefficient value.

Abstract: Circuitry of a decoder is configured to decode an image according to a coding structure including an intra random access point (IRAP) picture, leading pictures to be output before the IRAP picture in output order, and trailing pictures to be output after the IRAP picture in the output order. When the image is decoded, the circuitry decodes, according to a flag in a bitstream, at most one trailing picture among the trailing pictures before decoding the leading pictures in decoding order, and decodes the trailing pictures other than the at most one trailing picture after decoding the leading pictures in the decoding order. The flag indicates whether a picture of each of access units in the bitstream is a field picture. The circuitry decodes the at most one trailing picture before decoding the leading pictures in the decoding order when the flag indicates that the picture is a field picture.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In residual coding of a current block, the circuitry, in operation, encodes a subblock flag by Context-based Adaptive Binary Arithmetic Coding (CABAC) in both of a first type of residual coding where an orthogonal transform is performed and a second type of residual coding where the orthogonal transform is skipped, the subblock flag indicating whether a non-zero coefficient is included in a plurality of coefficients for a subblock within the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding; and controls a number of CABAC processes, wherein the encoding of the subblock flag is not counted as the number of CABAC processes.

Abstract: An encoder including circuitry and memory coupled to the circuitry. In a second type of residual coding among a first type of residual coding where an orthogonal transform is applied to a current block and the second type of residual coding where the orthogonal transform is skipped for the current block, wherein a first syntax used for the first type of residual coding is different from a second syntax used for the second type of residual coding, the circuitry: in a first loop process, derives a context index by using at least one of a plurality of surrounding coefficients; and encodes a plurality of coefficient information flags by CABAC with the derived context index; and in a second loop process of the plurality of loop processes, encodes a plurality of absolute value flags by CABAC with another context index.

Abstract: An encoder includes circuitry and memory. In both of a first type of residual coding where an orthogonal transform is applied to a current block and a second type of residual coding where the orthogonal transform is skipped, wherein when a number of CABAC processes is within an allowable range, the circuitry encodes coefficient information flags by CABAC, each of the coefficient information flags relating to a coefficient included in the current block; and otherwise, the circuitry skips the encoding of the coefficient information flags; and the circuitry encodes a remainder value of the coefficient with Golomb-Rice code when the coefficient information flags are encoded; and the circuitry encodes a value of the coefficient with the Golomb-Rice code when the plurality of coefficient information flags are not encoded, wherein the coefficient information flags are partially different between the first type of residual coding and the second type of residual coding.

Abstract: An encoder, includes: memory; and circuitry coupled to the memory, in which in a first encoding process, the circuitry quantizes a current block using a first quantization matrix in both of a first case where the circuitry performs primary transform and the circuitry does not perform secondary transform and a second case where the circuitry performs both the primary transform and the secondary transform, in a second encoding process, the circuitry quantizes the current block using a second quantization matrix in a third case where the circuitry performs primary transform and the circuitry does not perform secondary transform, and in a third encoding process, the circuitry quantizes the current block without using a quantization matrix in both of a fourth case where both the primary transform and the secondary transform are skipped and a fifth case where both the primary transform and the secondary transform are performed.

Abstract: An encoder includes circuitry and memory. In both of a first type of residual coding where an orthogonal transform is applied and a second type of residual coding where the orthogonal transform is skipped, wherein when a restriction on a number of CABAC processes allows CABAC coding of a set of coefficient information flags, the circuitry: encodes the coefficient information flags by CABAC; and otherwise, the circuitry: skips the CABAC encoding of the coefficient information flags; and the circuitry encodes a remainder value of the coefficient with Golomb-Rice code when the coefficient information flags are encoded; and otherwise the circuitry encodes a value of the coefficient with the Golomb-Rice code, wherein in the second type of residual coding, the circuitry encodes absolute value flags each relating to an absolute value of the coefficient after encoding the coefficient information flags and before encoding the remainder value of the coefficient.

Abstract: Provided is an encoder including: circuitry; and memory coupled to the circuitry, in which the circuitry: derives a prediction residual indicating a difference between a current block and a prediction image of the current block; performs primary transform on the prediction residual, and performs secondary transform on a result of the primary transform; performs quantization on a result of the secondary transform; and encodes a result of the quantization. In the performing of the secondary transform, when a matrix weighted intra prediction included in intra prediction and having prediction modes is used, the circuitry uses, as a transform set for the secondary transform, a common transform set shared among the prediction modes. The matrix weighted intra prediction generates the prediction image by performing matrix calculation on a pixel sequence obtained from pixel values of surrounding pixels of the current block.

Abstract: A stacked workpiece molding device 1 includes: a first mold 20 configured to suck and hold a workpiece body 42; and a second mold 30 having on an inner surface a pattern that can be transferred to a surface of a sheet material 44 stacked on the workpiece body 42 and press the sheet material 44 against the workpiece body 42. The inner surface of the second mold 30 includes a groove portion 31 that is positioned at a peripheral edge portion of the workpiece body 42, the second mold 30 includes a through-hole 32 extending to open into the groove portions 31, the through-hole 32 is connected to a first suction device 51 that sucks the sheet material 44, and the first mold 20 includes a suction hole 22 for sucking the workpiece body 42, and the suction hole 22 is connected to a second suction device 52.

Abstract: Provided is an encoder includes: circuitry; and memory coupled to the circuitry, in which in operation, the circuitry: generates a prediction image of a current block to be processed, using a first motion vector; and updates a history based motion vector predictor (HMVP) table using a first candidate having the first motion vector, the HMVP table storing, in a first in first out (FIFO) method, a plurality of second candidates each having a second motion vector used for a processed block, and in the updating of the HMVP table, the circuitry: determines whether a size of the current block is less than or equal to a threshold size; and skips the updating of the HMVP table when the size of the current block is determined to be less than or equal to the threshold size.

Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.

Abstract: A decoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation, generates a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component, and clips the first coefficient value. The circuitry generates a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component, and clips the second coefficient value. The circuitry generates a third coefficient value by adding the clipped first coefficient value to the clipped second coefficient value, and decodes a third reconstructed image sample of the chroma component using the third coefficient value.

Abstract: An encoder includes circuitry and memory connected thereto. The circuitry, in operation: encodes an image; when encoding the image: binarizes coefficient information of the image; controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and outputs a bitstream including the binary data string to which arithmetic encoding has been applied or has not been applied; and when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is to be applied to the binary data string and a determined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is to be applied to the binary data string and the determined condition is satisfied; and binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is to be applied to the binary data string.

Abstract: A decoder includes circuitry which, in operation, parses a first flag indicating whether a CCALF (cross component adaptive loop filtering) process is enabled for a first block located adjacent to a left side of a current block; parses a second flag indicating whether the CCALF process is enabled for a second block located adjacent to an upper side of the current block; determines a first index associated with a color component of the current block; and derives a second index indicating a context model, using the first flag, the second flag, and the first index. The circuitry, in operation, performs entropy decoding of a third flag indicating whether the CCALF process is enabled for the current block, using the context model indicated by the second index; and performs the CCALF process on the current block in response to the third flag indicating the CCALF process is enabled for the current block.

Abstract: An encoder comprises: a processor; and memory coupled to the processor, in which in operation, the processor: generates a first prediction image having full-pel precision, based on a motion vector of the current block; generates a second prediction image having fraction-pel precision by interpolating a value at a fraction-pel position between full-pel positions included in the first prediction image, using a first interpolation filter or a second interpolation filter differing in a total number of taps from the first interpolation filter; and encodes the current block based on the second prediction image, and in the generating of the second prediction image, the processor switches between using the first interpolation filter and the second interpolation filter depending on whether an affine mode is used for the current block.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a motion vector of a current block by referring to at least one reference picture different from a picture to which the current block belongs; performs a mode for estimating, for each sub-block unit of sub-blocks obtained by splitting the current block, a surrounding region of the motion vector to correct the motion vector; determines whether to apply deblocking filtering to each of boundaries between neighboring ones of the sub-blocks; and applies the deblocking filtering to the boundary, based on a result of the determination.

Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.

Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: partitions a block of a current image to be encoded into a plurality of partitions including a first partition and a second partition that are adjacent to each other; performs orthogonal transform only on the first partition out of the first partition and the second partition; and applies a deblocking filter to a boundary between the first partition and the second partition.

Abstract: An encoder: generates, in an inter prediction mode, a first prediction image of a current block to be processed, based on a derived motion vector; and generates a final prediction image of the current block by applying an update process to the first prediction image. Candidates for the update process include a first process and a second process. The first process is a BDOF process. The second process is a process of mixing the first prediction image with a second prediction image generated in intra prediction for the current block. In the applying of the update process, the first process and the second process are mutually exclusively applied.