Patents by Inventor Yusuke Oike

Yusuke Oike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10326953
    Abstract: The present technology relates to signal processing device and method, an imaging element, and an electronic device capable of reducing a rise of costs. A signal processing device according to the present technology includes a measurement unit that performs measurement of a length of a period from an input start of a signal to a change of a value of the signal a plurality of times, retains measured values obtained by the measurement performed the plurality of times, sets an initial value of the measurement on the basis of any one of a plurality of the retained measured values, and performs the measurement by using the initial value. The present technology is applicable to an electronic circuit such as a flip-flop circuit and an A/D conversion unit, an imaging element such as a CMOS image sensor, and an electronic device such as a digital still camera, for example.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: June 18, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Mamoru Sato, Yusuke Oike
  • Publication number: 20190157323
    Abstract: To realize miniaturization of a pixel, reduction in noise, and high quantum efficiency, and to improve short-wavelength sensitivity while suppressing inter-pixel interference and variations for each pixel. According to the present disclosure, there is provided an imaging device including: a first semiconductor layer formed in a semiconductor substrate; a second semiconductor layer of a conductivity type opposite to a conductivity type of the first semiconductor layer formed on the first semiconductor layer; a pixel separation unit which defines a pixel region including the first semiconductor layer and the second semiconductor layer; a first electrode which is connected to the first semiconductor layer from one surface side of the semiconductor substrate; and a second electrode which is connected to the second semiconductor layer from a light irradiation surface side that is the other surface of the semiconductor substrate, and is formed to correspond to a position of the pixel separation unit.
    Type: Application
    Filed: March 20, 2018
    Publication date: May 23, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Jun OGI, Yoshiaki TASHIRO, Takahiro TOYOSHIMA, Yorito SAKANO, Yusuke OIKE, Hongbo ZHU, Keiichi NAKAZAWA, Yukari TAKEYA, Atsushi OKUYAMA, Yasufumi MIYOSHI, Ryosuke MATSUMOTO, Atsushi HORIUCHI
  • Patent number: 10257452
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: April 9, 2019
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 10229941
    Abstract: A solid-state imaging element including: a plurality of unit pixels each having a photoelectric conversion part, a transfer part that transfers a charge generated by the photoelectric conversion part to a predetermined region, and a draining part that drains a charge in the predetermined region; a light shielding film being formed under an interconnect layer in the unit pixels and shield, from light, substantially the whole surface of the plurality of unit pixels except a light receiving part of the photoelectric conversion part; and a voltage controller controlling a voltage applied to the light shielding film. The voltage controller sets the voltage applied to the light shielding film to a first voltage in charge draining by the draining part and sets the voltage applied to the light shielding film to a second voltage higher than the first voltage in charge transfer by the transfer part.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: March 12, 2019
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke Oike, Takashi Machida
  • Publication number: 20190052826
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Application
    Filed: October 18, 2018
    Publication date: February 14, 2019
    Applicant: SONY CORPORATION
    Inventors: Koji OGAWA, Yusuke OIKE
  • Patent number: 10154223
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: December 11, 2018
    Assignee: Sony Corporation
    Inventors: Koji Ogawa, Yusuke Oike
  • Patent number: 10136085
    Abstract: The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: November 20, 2018
    Assignee: SONY CORPORATION
    Inventors: Takafumi Takatsuka, Yusuke Oike, Masaki Sakakibara
  • Patent number: 10129444
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: November 13, 2018
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Publication number: 20180270437
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 20, 2018
    Applicant: SONY CORPORATION
    Inventors: Koji OGAWA, Yusuke OIKE
  • Publication number: 20180249098
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Application
    Filed: April 25, 2018
    Publication date: August 30, 2018
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 10009566
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: June 26, 2018
    Assignee: Sony Corporation
    Inventors: Koji Ogawa, Yusuke Oike
  • Patent number: 9992431
    Abstract: The present technology relates to a signal processing device, an imaging element, and an electronic apparatus configured so that a cost increase can be suppressed.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: June 5, 2018
    Assignee: SONY CORPORATION
    Inventors: Takafumi Takatsuka, Yusuke Oike, Masaki Sakakibara
  • Patent number: 9986178
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: May 29, 2018
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9900482
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: February 20, 2018
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Publication number: 20170359531
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Application
    Filed: August 29, 2017
    Publication date: December 14, 2017
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9769396
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: September 19, 2017
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9749557
    Abstract: A CMOS image sensor has an image array as a matrix of unit pixels each including at least a photodiode, a memory for holding a charge stored in the photodiode, a floating diffusion region for converting the charge in the memory into a voltage, a first transfer gate for transferring the charge from the photodiode to the memory, a second transfer gate for transferring the charge from the memory to the floating diffusion region, and a resetting transistor for resetting the charge in the floating diffusion region. The unit pixels are driven to set the potential of a potential barrier at a boundary between the memory and the floating diffusion region to a potential such that a charge overflowing the memory is transferred to the floating diffusion region, when the first transfer gate is turned on. The CMOS image sensor operates in a global shutter mode for capturing moving images.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 29, 2017
    Assignee: SONY CORPORATION
    Inventors: Yusuke Oike, Yorito Sakano, Keiji Mabuchi
  • Publication number: 20170237917
    Abstract: The present technology relates to signal processing device and method, an imaging element, and an electronic device capable of reducing a rise of costs. A signal processing device according to the present technology includes a measurement unit that performs measurement of a length of a period from an input start of a signal to a change of a value of the signal a plurality of times, retains measured values obtained by the measurement performed the plurality of times, sets an initial value of the measurement on the basis of any one of a plurality of the retained measured values, and performs the measurement by using the initial value. The present technology is applicable to an electronic circuit such as a flip-flop circuit and an A/D conversion unit, an imaging element such as a CMOS image sensor, and an electronic device such as a digital still camera, for example.
    Type: Application
    Filed: September 25, 2015
    Publication date: August 17, 2017
    Inventors: Mamoru SATO, Yusuke OIKE
  • Publication number: 20170201703
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Application
    Filed: July 1, 2015
    Publication date: July 13, 2017
    Inventors: Koji OGAWA, Yusuke OIKE
  • Publication number: 20170171488
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventor: Yusuke Oike