Patents by Inventor Yusuke Oike

Yusuke Oike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170201703
    Abstract: The present technology relates to a comparator circuit, a solid-state imaging apparatus, and an electronic device which enable to improve a frame rate. A comparator compares an analog signal with a reference signal, an amplification stage amplifies output of a comparing unit and has different output change speeds in normal rotation and in reverse rotation, and a switch circuit fixes an input node or an output node of the amplification stage to a predetermined voltage in a predetermined period before a comparing operation by the comparator so that the amplification stage operates in a change direction having a higher output change speed. The present technology can be applied to a comparator circuit provided to an A/D converter of a CMOS image sensor.
    Type: Application
    Filed: July 1, 2015
    Publication date: July 13, 2017
    Inventors: Koji OGAWA, Yusuke OIKE
  • Publication number: 20170171488
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Application
    Filed: February 28, 2017
    Publication date: June 15, 2017
    Inventor: Yusuke Oike
  • Patent number: 9681080
    Abstract: Disclosed is a digital-analog converter including a current generation section, a current source transistor bias voltage keeping section, a cascade transistor group switch section, and a conversion section. The current generation section has at least one current source transistor group including a plurality of current source transistors and generates an output current based on a value of a digital input signal. The current source transistor bias voltage keeping section has a plurality of cascade transistor groups each including cascade transistors connected in series to the current source transistors and keeps bias voltages of the current source transistors constant. The cascade transistor group switch section selects one of the plurality of cascade transistor groups. The conversion section performs current-voltage conversion of the output current supplied via the selected cascade transistor group.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: June 13, 2017
    Assignee: Sony Corporation
    Inventors: Yuri Kato, Yusuke Oike
  • Patent number: 9615043
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Grant
    Filed: October 19, 2015
    Date of Patent: April 4, 2017
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Patent number: 9596422
    Abstract: The present technology relates to a signal processing device and a method, an imaging device, and an imaging apparatus that are designed to reduce occurrences of A/D conversion errors. A signal processing device of the present technology includes: a comparing unit that compares an analog signal output from a unit pixel with a predetermined voltage; a switching unit that switches reference voltages to be supplied to the comparing unit as necessary, connects one of the reference voltages to the comparing unit, and connects another one of the reference voltages to a predetermined load capacitance, the reference voltages being of different gradation accuracies from each other; and a measuring unit that measures timing of a change in a result of the comparison performed by the comparing unit. The present technique can be applied to imaging devices and imaging apparatuses, for example.
    Type: Grant
    Filed: July 4, 2014
    Date of Patent: March 14, 2017
    Assignee: Sony Corporation
    Inventors: Yuri Kato, Yusuke Oike
  • Publication number: 20170048430
    Abstract: A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.
    Type: Application
    Filed: October 27, 2016
    Publication date: February 16, 2017
    Inventor: Yusuke Oike
  • Patent number: 9509927
    Abstract: Disclosed herein is a solid-state imaging device, including, a pixel array unit, first driving means, second driving means, and third driving means.
    Type: Grant
    Filed: August 27, 2015
    Date of Patent: November 29, 2016
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Patent number: 9479718
    Abstract: Provided is a signal processing apparatus, including: an A/D conversion unit configured to perform A/D conversion of a first signal, A/D conversion of a second signal, A/D conversion of a third signal, and A/D conversion of a fourth signal; and a correlated double sampling processing unit configured to generate a first output signal by performing correlated double sampling using a first digital data item obtained through the A/D conversion of the first signal, and a second digital data item obtained through the A/D conversion of the second signal, a second output signal by performing correlated double sampling using a third digital data item obtained through the A/D conversion of the third signal, and a fourth digital data item obtained through the A/D conversion of the fourth signal, and a third output signal by performing correlated double sampling using the first output signal and the second output signal.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: October 25, 2016
    Assignee: Sony Corporation
    Inventors: Tatsuya Ichikawa, Nobutaka Shimamura, Atsushi Suzuki, Yusuke Oike, Katsumi Honda, Masahiro Nakamura
  • Patent number: 9479715
    Abstract: A solid-state imaging device including a unit pixel including a photoelectric conversion section, an impurity-diffusion region capable of temporarily accumulating or holding electric charges generated by the photoelectric conversion section, and a reset transistor resetting the impurity-diffusion region by a voltage of a voltage-supply line, and having an impurity concentration such that at least the reset transistor side of the impurity-diffusion region becomes a depletion state; and a drive circuit changing the voltage of the voltage-supply line from a first voltage lower than a depletion potential of the reset transistor side of the impurity-diffusion region to a second voltage higher than the depletion potential while the reset transistor is on.
    Type: Grant
    Filed: June 2, 2015
    Date of Patent: October 25, 2016
    Assignee: SONY CORPORATION
    Inventor: Yusuke Oike
  • Patent number: 9462200
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: October 4, 2016
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9450003
    Abstract: A solid-state imaging device including a photoelectric conversion element operable to generate electric charge according to the amount of incident light and to accumulate the electric charge in the inside thereof, an electric-charge holding region in which the electric charge generated through photoelectric conversion by the photoelectric conversion element is held until read out, and a transfer gate having a complete transfer path through which the electric charge accumulated in the photoelectric conversion element is completely transferred into the electric-charge holding region, and an intermediate transfer path through which the electric charge generated by the photoelectric conversion element during an exposure period and being in excess of a predetermined charge amount is transferred into the electric-charge holding region. The complete transfer path and the intermediate transfer path are formed in different regions.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: September 20, 2016
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke Oike, Takahiro Kawamura, Shinya Yamakawa, Ikuhiro Yamamura, Takashi Machida, Yasunori Sogoh, Naoki Saka
  • Patent number: 9438835
    Abstract: A semiconductor device is provided which has a driving circuit operable to drive a circuit that has a delay, the semiconductor device including: an auxiliary driving circuit operable to accelerate drive of the driving circuit, which receives a drive signal of the driving circuit as an input signal.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: September 6, 2016
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Yusuke Oike
  • Patent number: 9438840
    Abstract: A solid-state imaging device, with (a) a pixel array unit including two-dimensionally arranged pixels each including (i) a photoelectric conversion element, (ii) a select transistor configured to perform pixel selection, and (iii) a charge discharging transistor configured to selectively discharge the charges accumulated in the photoelectric conversion element; and (b) driving circuitry operable to drive reading of output signals from the pixels of the pixel array unit, for each pixel the driving circuitry driving the charge discharging transistor using a select transistor driving signal.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: September 6, 2016
    Assignee: Sony Corporation
    Inventor: Yusuke Oike
  • Patent number: 9432602
    Abstract: There is provided a solid-state imaging device including a pixel array section having a plurality of unit pixels two-dimensionally arranged therein, the unit pixels including at least a photoelectric conversion section, a charge holding section, a transfer section, and a reset section, and a drive control section which controls driving of the unit pixels in a manner that a voltage as a signal level and a voltage as a reset level are each read out serially per row. The drive control section controls readout of the voltage of the charge holding section in accordance with initialization of the charge holding section performed by the reset section before the charge transfer by the transfer section.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: August 30, 2016
    Assignee: SONY CORPORATION
    Inventors: Takafumi Takatsuka, Yusuke Oike, Masaki Sakakibara
  • Publication number: 20160212365
    Abstract: The present technology relates to a signal processing device and a method, an imaging device, and an imaging apparatus that are designed to reduce occurrences of A/D conversion errors. A signal processing device of the present technology includes: a comparing unit that compares an analog signal output from a unit pixel with a predetermined voltage; a switching unit that switches reference voltages to be supplied to the comparing unit as necessary, connects one of the reference voltages to the comparing unit, and connects another one of the reference voltages to a predetermined load capacitance, the reference voltages being of different gradation accuracies from each other; and a measuring unit that measures timing of a change in a result of the comparison performed by the comparing unit. The present technique can be applied to imaging devices and imaging apparatuses, for example.
    Type: Application
    Filed: July 4, 2014
    Publication date: July 21, 2016
    Inventors: Yuri KATO, Yusuke OIKE
  • Publication number: 20160100117
    Abstract: Disclosed is a digital-analog converter including a current generation section, a current source transistor bias voltage keeping section, a cascade transistor group switch section, and a conversion section. The current generation section has at least one current source transistor group including a plurality of current source transistors and generates an output current based on a value of a digital input signal. The current source transistor bias voltage keeping section has a plurality of cascade transistor groups each including cascade transistors connected in series to the current source transistors and keeps bias voltages of the current source transistors constant. The cascade transistor group switch section selects one of the plurality of cascade transistor groups. The conversion section performs current-voltage conversion of the output current supplied via the selected cascade transistor group.
    Type: Application
    Filed: October 9, 2015
    Publication date: April 7, 2016
    Inventors: Yuri Kato, Yusuke Oike
  • Publication number: 20160094794
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9282269
    Abstract: The present invention is to provide an A/D conversion device, a solid-state image-capturing device, and an electronic device capable of removing fixed pattern noise, capable of preventing an image from being corrupted, capable of generating an appropriate carry signal during bit shift, and capable of avoiding bit inconsistency even when the frequency of the carry signal increases due to the bit shift.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: March 8, 2016
    Assignee: SONY CORPORATION
    Inventors: Mamoru Sato, Yusuke Oike, Hiroyuki Iwaki
  • Publication number: 20160065871
    Abstract: A solid-state imaging device includes a pixel array section that has at least one pixel with a photoelectric conversion unit and a charge detection unit. A driving section is configured to read out a signal of the pixel, a first portion of said signal being based on signal charge, a second portion of said signal being based on a reset potential. A signal processing section is configured to read out the first portion of the signal as a reference voltage, with the reference voltage being adjusted to cause the first and second portions of the signal to be within an input voltage range.
    Type: Application
    Filed: October 29, 2015
    Publication date: March 3, 2016
    Inventors: Masaki Sakakibara, Tadayuki Taura, Yusuke Oike, Takafumi Takatsuka, Akihiko Kato
  • Patent number: 9264634
    Abstract: A signal processing device and signal processing method are described herein. By way of example, the signal processing method includes a selection unit configured to select, based on a first comparison of an analog signal with a determination voltage, a selected reference voltage to be compared with the analog signal, the selected reference voltage being selected from a plurality of reference voltages. The plurality of reference voltages include at least a first reference voltage and a second reference voltage.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: February 16, 2016
    Assignee: Sony Corporation
    Inventors: Yusuke Oike, Mamoru Sato, Masaki Sakakibara