Patents by Inventor Yusuke Otake

Yusuke Otake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10347673
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: July 9, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Otake, Toshifumi Wakano, Takuya Sano, Yusuke Tanaka, Keiji Tatani, Hideo Harifuchi, Eiichi Tauchi, Hiroki Iwashita, Akira Matsumoto
  • Publication number: 20190181177
    Abstract: An imaging device includes a first chip (12). The first chip includes a first pixel (21) and a second pixel (21). The first pixel includes a first anode region (31) and a first cathode region (32), and the second pixel includes a second anode region (31) and a second cathode region (32). The first chip includes a first wiring layer (23). The first wiring layer includes a first anode electrode (37), a first anode via (38) coupled to the first anode electrode (37) and the first anode region (31), and a second anode via (38) coupled to the first anode electrode (37) and the second anode region (31).
    Type: Application
    Filed: July 25, 2018
    Publication date: June 13, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenji KOBAYASHI, Toshifumi WAKANO, Yusuke OTAKE
  • Patent number: 10320380
    Abstract: The power circuit includes: a main substrate; a first electrode pattern disposed on the main substrate and connected to a positive-side power terminal P; a second electrode pattern disposed on a main substrate and connected to a negative-side power terminal N; a third electrode pattern disposed on the main substrate and connected to an output terminal O; a first MISFET Q1 of which a first drain is disposed on the first electrode pattern; a second MISFET Q4 of which a second drain is disposed on the third electrode pattern; a first control circuit (DG1) connected between a first gate G1 and a first source S1 of the first MISFET, and configured to control a current path conducted from the first source towards the first gate.
    Type: Grant
    Filed: October 4, 2017
    Date of Patent: June 11, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Hirotaka Otake, Tatsuya Yanagi, Yusuke Nakakohara
  • Publication number: 20190088693
    Abstract: A solid-state imaging device according to the present disclosure includes: a photoelectric conversion film that is provided outside a semiconductor substrate on a pixel-by-pixel basis, performs photoelectric conversion on light having a predetermined wavelength range, and transmits light having wavelength ranges other than the predetermined wavelength range; and a photoelectric conversion region that is provided inside the semiconductor substrate on a pixel-by-pixel basis and performs photoelectric conversion on the light having the wavelength ranges, the light having the wavelength ranges having passed through the photoelectric conversion film. The photoelectric conversion film includes a film having an avalanche function.
    Type: Application
    Filed: January 18, 2017
    Publication date: March 21, 2019
    Inventors: NANAKO KATO, TOSHIFUMI WAKANO, YUSUKE OTAKE
  • Publication number: 20190067361
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: October 23, 2018
    Publication date: February 28, 2019
    Applicant: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Publication number: 20190051686
    Abstract: The present technology relates to a solid-state imaging device that can achieve a higher resolution while increasing sensitivity. In a pixel array unit, pixels are formed with a combination of a first pixel that performs photoelectric conversion on light of a first color component with a first photoelectric conversion unit, and photoelectric conversion on light of a third color component with a second photoelectric conversion unit; a second pixel that performs photoelectric conversion on light of the first color component with a first photoelectric conversion unit, and on light of a fifth color component with a second photoelectric conversion unit; and a third pixel that performs photoelectric conversion on light of the first color component with a first photoelectric conversion unit, and on light of a sixth color component with a second photoelectric conversion unit. The first color component and the sixth color component are mixed, to generate white (W).
    Type: Application
    Filed: October 4, 2018
    Publication date: February 14, 2019
    Inventors: KENJI AZAMI, YUSUKE OTAKE, TOSHIFUMI WAKANO
  • Publication number: 20190007631
    Abstract: Imaging devices and electronic apparatuses with one or more shared pixel structures are provided. The shared pixel structure includes a plurality of photoelectric conversion devices or photodiodes. Each photodiode in the shared pixel structure is located within a rectangular area. The shared pixel structure also includes a plurality of shared transistors. The shared transistors in the shared pixel structure are located adjacent the photoelectric conversion devices of the shared pixel structure. The rectangular area can have two short sides and two long sides, with the shared transistors located along one of the long sides. In addition, a length of one or more of the transistors can be extended in a direction parallel to the long side of the rectangular area.
    Type: Application
    Filed: September 5, 2018
    Publication date: January 3, 2019
    Inventors: NANAKO KATO, TOSHIFUMI WAKANO, YUSUKE OTAKE
  • Publication number: 20190006399
    Abstract: A sensor includes a first substrate including at least a first pixel. The first pixel includes an avalanche photodiode to convert incident light into electric charge and includes an anode (105) and a cathode (101). The cathode is in a well region (103) of the first substrate. The first pixel includes an isolation region (108) that isolates the well region from at least a second pixel that is adjacent to the first pixel. The first pixel includes a hole accumulation region (107a) between the isolation region and the well region. The hole accumulation region is electrically connected to the anode.
    Type: Application
    Filed: October 18, 2017
    Publication date: January 3, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yusuke OTAKE, Akira MATSUMOTO, Junpei YAMAMOTO, Ryusei NAITO, Masahiko NAKAMIZO, Toshifumi WAKANO
  • Publication number: 20180374903
    Abstract: This technology relates to an imaging apparatus and an electronic device structured to perform pupil correction appropriately. There are provided a photoelectric conversion film configured to absorb light of a predetermined color component to generate signal charges, a first lower electrode configured to be formed under the photoelectric conversion film, a second lower electrode configured to be connected with the first lower electrode, a via configured to connect the first lower electrode with the second lower electrode, and a photodiode configured to be formed under the second lower electrode and to generate signal charges reflecting the amount of incident light. A first distance between the center of the photodiode and the center of the via at the center of the angle of view is different from a second distance therebetween at an edge of the angle of view. The present technology can be applied to imaging apparatuses.
    Type: Application
    Filed: December 9, 2016
    Publication date: December 27, 2018
    Applicant: SONY CORPORATION
    Inventors: Yusuke OTAKE, Toshifumi WAKANO
  • Patent number: 10134797
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: November 20, 2018
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Patent number: 10128300
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: November 13, 2018
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Patent number: 10115752
    Abstract: The present technology relates to a solid-state imaging device that can achieve a higher resolution while increasing sensitivity, and an electronic apparatus.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: October 30, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kenji Azami, Yusuke Otake, Toshifumi Wakano
  • Publication number: 20180261644
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: November 14, 2017
    Publication date: September 13, 2018
    Applicant: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Patent number: 10075659
    Abstract: Imaging devices and electronic apparatuses with one or more shared pixel structures are provided. The shared pixel structure includes a plurality of photoelectric conversion devices or photodiodes. Each photodiode in the shared pixel structure is located within a rectangular area. The shared pixel structure also includes a plurality of shared transistors. The shared transistors in the shared pixel structure are located adjacent the photoelectric conversion devices of the shared pixel structure. The rectangular area can have two short sides and two long sides, with the shared transistors located along one of the long sides. In addition, a length of one or more of the transistors can be extended in a direction parallel to the long side of the rectangular area.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: September 11, 2018
    Assignee: SONY CORPORATION
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Otake
  • Patent number: 10050070
    Abstract: A semiconductor device includes a plurality of pixels arranged in a two-dimensional array, each pixel of the plurality of pixels including a photoelectric conversion film configured to photoelectrically convert light of a first wavelength and pass light of a second wavelength, and a photoelectric conversion unit configured to photoelectrically convert the light of the second wavelength. The semiconductor device may further include a charge storage unit configured to store charge received from the photoelectric conversion unit of each pixel in a pixel group, wherein the pixel group includes adjacent pixels among the plurality of pixels, a plurality of through electrodes, and a wiring layer coupled to the photoelectric conversion film of each pixel of the plurality of pixels by at least one through electrode of the plurality of through electrodes. The present technology can be applied to a solid-state imaging element.
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: August 14, 2018
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yusuke Otake, Toshifumi Wakano
  • Patent number: 9947703
    Abstract: The present disclosure relates to a solid-state imaging device that can be made smaller in size, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a photoelectric conversion film that performs photoelectric conversion of light emitted from the back surface side of the semiconductor substrate. Also, in each pixel, a charge accumulation layer is formed to be in contact with the photoelectric conversion film on the back surface of the semiconductor substrate, a transfer path unit is formed to extend from the charge accumulation layer to a point near the front surface of the semiconductor substrate, and a memory unit is disposed near the back surface side of the semiconductor substrate, with a charge transfer gate being interposed between the memory unit and the transfer path unit.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: April 17, 2018
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenji Azami, Yusuke Otake, Yuko Ohgishi, Toshifumi Wakano, Atsushi Toda
  • Publication number: 20180100486
    Abstract: A wind farm including wind power generation apparatuses the damage degrees of which can be held down and wind power generation apparatuses can be provided without introducing a central processing unit for the wind farm and new wind power generation apparatuses having the rotation directions of their blades different from each other.
    Type: Application
    Filed: August 31, 2017
    Publication date: April 12, 2018
    Inventors: Yusuke OTAKE, Nobuhiro KUSUNO, Hiromu KAKUYA
  • Publication number: 20180097036
    Abstract: A semiconductor device includes a plurality of pixels arranged in a two-dimensional array, each pixel of the plurality of pixels including a photoelectric conversion film configured to photoelectrically convert light of a first wavelength and pass light of a second wavelength, and a photoelectric conversion unit configured to photoelectrically convert the light of the second wavelength. The semiconductor device may further include a charge storage unit configured to store charge received from the photoelectric conversion unit of each pixel in a pixel group, wherein the pixel group includes adjacent pixels among the plurality of pixels, a plurality of through electrodes, and a wiring layer coupled to the photoelectric conversion film of each pixel of the plurality of pixels by at least one through electrode of the plurality of through electrodes. The present technology can be applied to a solid-state imaging element.
    Type: Application
    Filed: October 24, 2017
    Publication date: April 5, 2018
    Inventors: Yusuke OTAKE, Toshifumi WAKANO
  • Publication number: 20180090533
    Abstract: A semiconductor device includes a plurality of pixels arranged in a two-dimensional array, each pixel of the plurality of pixels including a photoelectric conversion film configured to photoelectrically convert light of a first wavelength and pass light of a second wavelength, and a photoelectric conversion unit configured to photoelectrically convert the light of the second wavelength. The semiconductor device may further include a charge storage unit configured to store charge received from the photoelectric conversion unit of each pixel in a pixel group, wherein the pixel group includes adjacent pixels among the plurality of pixels, a plurality of through electrodes, and a wiring layer coupled to the photoelectric conversion film of each pixel of the plurality of pixels by at least one through electrode of the plurality of through electrodes. The present technology can be applied to a solid-state imaging element.
    Type: Application
    Filed: April 13, 2016
    Publication date: March 29, 2018
    Inventors: Yusuke OTAKE, Toshifumi WAKANO
  • Publication number: 20180083062
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: November 14, 2017
    Publication date: March 22, 2018
    Applicant: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake