Patents by Inventor Zhao Cui

Zhao Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210319130
    Abstract: The disclosed may include various systems and methods for improving the efficiency and scalability of large-scale systems. For example, the disclosed may include systems and methods for automatic privacy enforcement using privacy-aware infrastructure, scalable general-purpose low cost integer motion search, efficient scaler filter coefficients layout for flexible scaling quality control with limited hardware resources, hardware optimization for power saving with both different codecs enabled, optimizing storage overhead and performance for large distributed data warehouse, mass and volume efficient integration of intersatellite link terminals to a satellite bus, and overcoming retention limit for memory-based distributed database systems.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 14, 2021
    Inventors: Yi Huang, Wenlong Dong, Marc Alexander Celani, Xianliang Zha, Yunqing Chen, Harikrishna Madadi Reddy, Junqiang Lan, Chien Cheng Liu, Raghuvardhan Moola, Haluk Ucar, Sujith Srinivasan, Handong Li, Xing Cindy Chen, Tuo Wang, Zhao Wang, Baheerathan Anandharengan, Gaurang Chaudhari, Prahlad Rao Venkatapuram, Srikanth Alaparthi, James Alexander Morle, Vincent Matthew Malfa, Yassir Azziz, Chien-Chung Chen, Yan Cui, Pedro Eugenio Rocha Pedreira, Stavros Harizopoulos
  • Publication number: 20210301643
    Abstract: A method for evaluating a downhole working condition of a PDC bit includes: performing an indoor test, including performing a drilling test in different full-sized cores by using the PDC bit with different degrees of abrasion and balling under condition of given WOB and rotational speed, to acquire change characteristics of a WOB, a rotational speed, a torque, a ROP and a bit vibration of the PDC bit in different time domains; improving and perfecting an existing prediction model and evaluation method for the downhole working condition through data obtained by the test to obtain the method; reading parameters of the WOB, the rotational speed, the torque and the ROP in real time during drilling; determining the downhole working condition of the PDC bit by using the method in the improving and perfecting.
    Type: Application
    Filed: March 16, 2021
    Publication date: September 30, 2021
    Inventors: Guodong JI, Haige WANG, Meng CUI, Zhao MENG, Qiang WU, Li LIU, Jiawei ZHANG, Changchang CHEN, Liu CUI, Jing YU
  • Patent number: 11132136
    Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guan Zhong Wang, Xinghui Duan, Hua Chen Li
  • Patent number: 11094740
    Abstract: The disclosure discloses a backboard, a display device, and a method for fabricating the same, and the backboard includes: a backboard body; and a plurality of LED installation mounts arranged in an array on the backboard body, wherein each of the plurality of LED installation mounts includes at least two lead-out electrodes to be connected with LED pins, and a coil structure around each of the at least two lead-out electrodes, wherein the coil structure is configured to produce a magnetic field upon being powered on. The coils can be formed on the backboard body in the backboard to absorb electrodes of LEDs to thereby position them precisely so as to transfer the LEDs in a mass manner with a high good yield ratio, and the lead-out electrodes can be powered on to thereby detect abnormally operating LEDs.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: August 17, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhijun Lv, Liwen Dong, Wenqu Liu, Xiaoxin Song, Zhao Cui, Feng Zhang, Qi Yao, Changzheng Wang
  • Patent number: 11088352
    Abstract: A display substrate, a manufacturing method thereof, and a display device are provided, in the field of display technology. The display substrate includes a base substrate, and a thin-film transistor, a light-emitting device, an encapsulation structure, and a conductive film layer sequentially disposed on the base substrate in a direction away from the base substrate. Since the display substrate includes a conductive film layer on a side of the encapsulation structure away from the base substrate, when the protective film layer on the side of the conductive film layer away from the base substrate is peeled off, static electricity generated by the separation of the film layer can be released to the conductive film layer, avoiding electron transition to the active layer of the thin-film transistor in the display substrate to cause offset of the threshold voltage of the thin-film transistor. The display brightness uniformity of the display substrate can be ensured.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: August 10, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wenqu Liu, Feng Zhang, Qi Yao, Zhijun Lv, Liwen Dong, Shizheng Zhang, Ning Dang, Xiaoxin Song, Zhao Cui
  • Publication number: 20210233980
    Abstract: A display substrate is provided. The display substrate includes a base substrate; a pixel definition structure on the base substrate; a plurality of light emitting elements respectively in a plurality of first apertures; and a reflective layer at least partially in a respective one of the plurality of first apertures and configured to reflect light laterally emitted from a respective one of the plurality of light emitting elements to exit from a light emitting surface of the respective one of the plurality of light emitting elements. The pixel definition structure includes a first pixel definition layer on the base substrate, and a second pixel definition layer on a side of the first pixel definition layer away from the base substrate. Lateral sides of the first pixel definition layer and the second pixel definition layer have different slope angles with respect to a main surface of the base substrate.
    Type: Application
    Filed: December 16, 2019
    Publication date: July 29, 2021
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhijun LV, Liwen DONG, Wenqu LIU, Xiaoxin SONG, Zhao CUI, Libo WANG, Detian MENG, Feng ZHANG
  • Publication number: 20210220826
    Abstract: The present disclosure provides an electrode plate, a microfluidic chip, and a method of manufacturing the electrode plate. In one embodiment, an electrode plate includes: a substrate, an electrode and a surface contact layer stacked in sequence, and a droplet inlet hole passing through the substrate, the electrode and the surface contact layer. The surface contact layer comprises a super-hydrophobic region and a hydrophilic region, and the droplet inlet hole is disposed in the hydrophilic region. The microfluidic chip includes: a first electrode plate formed by the abovementioned electrode plate, and a second electrode plate provided on a side of the first electrode plate close to the surface contact layer. The first electrode plate is provided opposite to the second electrode plate and a liquid channel is formed between the first electrode plate and the second electrode plate.
    Type: Application
    Filed: December 6, 2019
    Publication date: July 22, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoxin Song, Feng Zhang, Wenqu Liu, Zhijun Lv, Zhao Cui, Qi Yao
  • Publication number: 20210200985
    Abstract: A fingerprint identification module, a manufacturing method thereof and an electronic device are disclosed.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 1, 2021
    Inventors: Wenqu LIU, Xiufeng LI, Qi YAO, Feng ZHANG, Liwen DONG, Zhao CUI, Chuanxiang XU, Detian MENG, Xiaoxin SONG, Libo WANG, Yang YUE, Dongfei HOU, Zhijun LV
  • Publication number: 20210181940
    Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
    Type: Application
    Filed: December 13, 2017
    Publication date: June 17, 2021
    Inventors: Zhao Cui, Eric Yuen, Guan Zhong Wang, Xinghui Duan, Hua Chen Li
  • Publication number: 20210167274
    Abstract: A piezoelectric device includes: a base having at least one hole, a heat conductive portion disposed in the at least one hole and in contact with a wall of the at least one hole, and at least one piezoelectric sensor disposed on the base. A thermal conductivity of the heat conductive portion is greater than a thermal conductivity of the base. Each piezoelectric sensor includes: a first electrode, a piezoelectric pattern made of a piezoelectric material and a second electrode that are sequentially stacked in a thickness direction of the base.
    Type: Application
    Filed: September 30, 2020
    Publication date: June 3, 2021
    Inventors: Feng ZHANG, Wenqu LIU, Zhijun LV, Liwen DONG, Xiaoxin SONG, Zhao CUI, Detian MENG, Libo WANG
  • Publication number: 20210110761
    Abstract: A driving backplane includes a base, and a pixel driving circuit, a first electrode and a first piezoelectric block that are disposed in the sub-pixel region. The pixel driving circuit is disposed on the base. The first electrode is disposed at a side of the pixel driving circuit away from the base. The first electrode includes a first sub-electrode pattern and a second sub-electrode pattern that are in a same layer and are spaced apart to be insulated from each other, and the first sub-electrode pattern is electrically connected to the pixel driving circuit. The first piezoelectric block is disposed between the pixel driving circuit and the first electrode, and the first sub-electrode pattern and the second sub-electrode pattern are in contact with the first piezoelectric block.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 15, 2021
    Inventors: Wenqu LIU, Qi YAO, Feng ZHANG, Zhijun LV, Liwen DONG, Zhao CUI, Xiaoxin SONG, Detian MENG, Libo WANG
  • Publication number: 20210089739
    Abstract: Embodiments of the present disclosure provide a method for manufacturing a fingerprint recognition method, a fingerprint recognition module, and a display device. The method for manufacturing the fingerprint recognition module includes: providing a backplane; forming a bonding terminal in a bonding area of the backplane; forming a sensing electrode in a fingerprint recognition area of the backplane; forming an insulation layer cladding the bonding terminal in the bonding area, and forming a piezoelectric material layer in the fingerprint recognition area, where an orthographic projection of the piezoelectric material layer on the backplane coincides with an orthographic projection of the sensing electrode on the backplane; performing polarization processing on the piezoelectric material layer; and peeling off the insulation layer.
    Type: Application
    Filed: March 21, 2020
    Publication date: March 25, 2021
    Inventors: Wenqu LIU, Qi Yao, Feng Zhang, Zhijun Lv, Liwen Dong, Xiaoxin Song, Zhao Cui, Detian Meng, Libo Wang, Mingqi Chen, Changzheng Wang
  • Publication number: 20210091281
    Abstract: A detection substrate, a preparation method thereof, a detection device and a detection method are provided. A detection substrate includes a base substrate, wherein the base substrate includes multiple through holes, and electrode columns are embedded in the multiple through holes; the base substrate comprises a detection region and a bonding pad region, the detection region includes a driving circuit, and the bonding pad region is provided with bonding pads; and the bonding pads are connected with the electrode columns through the driving circuit.
    Type: Application
    Filed: July 9, 2020
    Publication date: March 25, 2021
    Inventors: Zhijun LV, Liwen DONG, Xiaoxin SONG, Feng ZHANG, Zhao CUI, Wenqu LIU, Detian MENG, Libo WANG
  • Publication number: 20210041730
    Abstract: The present disclosure provides a display panel, a manufacturing method thereof, and a display device. The display panel includes: a first medium and a first spacer wall between the first substrate and the second substrate, wherein the first sub-panel has filter pixels arranged at intervals, the first spacer wall is black and arranged along spaces between filter pixels, and a dielectric coefficient of the first spacer wall is greater than that of the first medium; and a second sub-panel on a light emergent side of the first sub-panel and including a second medium and a second spacer wall between the third substrate and the fourth substrate, wherein the second sub-panel has display pixels arranged at intervals, the second spacer wall is black and arranged along spaces between display pixels, and a dielectric coefficient of the second spacer wall is greater than that of the second medium.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 11, 2021
    Inventors: Yang YUE, Qi YAO, Yong YU, Hua HUANG, Tong YANG, Shi SHU, Chuanxiang XU, Xue JIANG, Haitao HUANG, Xiang LI, Zhao CUI
  • Publication number: 20210033761
    Abstract: A filter structure and a method for manufacturing the same, and a display device. The filter structure includes a base substrate and a plurality of filter units positioned on the base substrate, at least part of the filter units including a quantum dot filter layer. The filter units further include a reflective structure whose orthographic projection on the base substrate surrounds the orthographic projection of the quantum dot filter layer on the base substrate. A distance between a plane of the reflective structure away from the base substrate and the base substrate is greater than a distance between a plane of the quantum dot filter layer close to the base substrate and the base substrate.
    Type: Application
    Filed: December 13, 2019
    Publication date: February 4, 2021
    Inventors: Xiaoxin SONG, Feng ZHANG, Wenqu LIU, Zhijun LV, Liwen DONG, Zhao CUI, Qi YAO
  • Publication number: 20200356472
    Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guanzhong Wang, Xinghui Duan, Giuseppe D'Eliseo, Giuseppe Ferrari
  • Patent number: 10725904
    Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: July 28, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guan Zhong Wang, Xinghui Duan, Giuseppe D'Eliseo, Giuseppe Ferrari
  • Publication number: 20200235160
    Abstract: The disclosure discloses a backboard, a display device, and a method for fabricating the same, and the backboard includes: a backboard body; and a plurality of LED installation mounts arranged in an array on the backboard body, wherein each of the plurality of LED installation mounts includes at least two lead-out electrodes to be connected with LED pins, and a coil structure around each of the at least two lead-out electrodes, wherein the coil structure is configured to produce a magnetic field upon being powered on. The coils can be formed on the backboard body in the backboard to absorb electrodes of LEDs to thereby position them precisely so as to transfer the LEDs in a mass manner with a high good yield ratio, and the lead-out electrodes can be powered on to thereby detect abnormally operating LEDs.
    Type: Application
    Filed: August 7, 2019
    Publication date: July 23, 2020
    Inventors: Zhijun LV, Liwen DONG, Wenqu LIU, Xiaoxin SONG, Zhao CUI, Feng ZHANG, Qi YAO, Changzheng WANG
  • Publication number: 20200142821
    Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
    Type: Application
    Filed: December 13, 2017
    Publication date: May 7, 2020
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guan Zhong Wang, Xinghui Duan, Giuseppe D'Eliseo, Giuseppe Ferrari
  • Publication number: 20200083481
    Abstract: A display substrate, a manufacturing method thereof, and a display device are provided, in the field of display technology. The display substrate includes a base substrate, and a thin-film transistor, a light-emitting device, an encapsulation structure, and a conductive film layer sequentially disposed on the base substrate in a direction away from the base substrate. Since the display substrate includes a conductive film layer on a side of the encapsulation structure away from the base substrate, when the protective film layer on the side of the conductive film layer away from the base substrate is peeled off, static electricity generated by the separation of the film layer can be released to the conductive film layer, avoiding electron transition to the active layer of the thin-film transistor in the display substrate to cause offset of the threshold voltage of the thin-film transistor. The display brightness uniformity of the display substrate can be ensured.
    Type: Application
    Filed: June 3, 2019
    Publication date: March 12, 2020
    Inventors: Wenqu Liu, Feng Zhang, Qi Yao, Zhijun Lv, Liwen Dong, Shizheng Zhang, Ning Dang, Xiaoxin Song, Zhao Cui