Patents by Inventor Zhao Cui

Zhao Cui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11341041
    Abstract: Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: May 24, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guan Zhong Wang, Xinghui Duan, Giuseppe D'Eliseo, Giuseppe Ferrari
  • Publication number: 20220149334
    Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first display region, and the first display region includes multiple sub-display regions and a first light transmittance region located between adjacent sub-display regions. Each first sub-display region of the multiple sub-display regions includes a first light-emitting element and a first filter unit disposed in a first light-emergence direction of the first light-emitting element. Each second sub-display region in the multiple sub-display regions includes a first collimating light extraction element disposed in a second light-emergence direction of the first light-emitting element and a second filter unit disposed in a light-emergence direction of the first collimating light extraction element.
    Type: Application
    Filed: June 25, 2021
    Publication date: May 12, 2022
    Inventors: Wenqu LIU, Feng ZHANG, Qi YAO, Zhao CUI, Xiaoxin SONG, Zhijun LV, Dongfei HOU, Detian MENG, Liwen DONG, Libo WANG, Yang YUE, Haitao HUANG, Chuanxiang XU
  • Publication number: 20220113587
    Abstract: Provided are a display panel and a preparation method thereof, and a display apparatus. The display panel includes a first substrate and a second substrate which are aligned and combined into a cell, wherein the first substrate includes a backlight structure layer and an array structure layer arranged on a side of the backlight structure layer facing the second substrate, the backlight structure layer includes a light guide plate, a grating layer arranged on a side of the light guide plate facing the array structure layer and a refractive layer covering the grating layer, the grating layer includes a plurality of grating units, the array structure layer includes a plurality of pixel electrodes, and the grating units are in one-to-one correspondence with the pixel electrodes.
    Type: Application
    Filed: April 30, 2021
    Publication date: April 14, 2022
    Inventors: Liwen DONG, Qi YAO, Guangcai YUAN, Feng ZHANG, Zhijun LV, Wenqu LIU, Zhao CUI, Xiaoxin SONG, Detian MENG
  • Patent number: 11301082
    Abstract: The present disclosure provides a fingerprint recognition unit and a fabrication method thereof, a fingerprint recognition module and a display device. The fingerprint recognition unit includes: a bearing substrate; a receiving electrode layer on the bearing substrate; a piezoelectric material layer on a side of the receiving electrode layer away from the bearing substrate; and a driving electrode layer on a side of the piezoelectric material layer away from the receiving electrode layer. A density of the driving electrode layer is greater than 5 g/cm3, and a thickness of the driving electrode layer, a thickness of the piezoelectric material layer and a thickness of the bearing substrate are configured such that a vibration nodal plane of the piezoelectric material layer is within the piezoelectric material layer.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: April 12, 2022
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Wenqu Liu, Qi Yao, Feng Zhang, Zhao Cui, Libo Wang, Dongfei Hou, Xiaoxin Song, Zhijun Lv, Liwen Dong, Detian Meng, Jalil Ryu, Yang Yue, Haitao Huang
  • Patent number: 11296160
    Abstract: A display substrate is provided. The display substrate includes a base substrate; a pixel definition structure on the base substrate; a plurality of light emitting elements respectively in a plurality of first apertures; and a reflective layer at least partially in a respective one of the plurality of first apertures and configured to reflect light laterally emitted from a respective one of the plurality of light emitting elements to exit from a light emitting surface of the respective one of the plurality of light emitting elements. The pixel definition structure includes a first pixel definition layer on the base substrate, and a second pixel definition layer on a side of the first pixel definition layer away from the base substrate. Lateral sides of the first pixel definition layer and the second pixel definition layer have different slope angles with respect to a main surface of the base substrate.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: April 5, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhijun Lv, Liwen Dong, Wenqu Liu, Xiaoxin Song, Zhao Cui, Libo Wang, Detian Meng, Feng Zhang
  • Patent number: 11296165
    Abstract: An array substrate includes a flexible base substrate; a buffer layer on the flexible base substrate and continuously extending from a display area into a peripheral area, including a first portion substantially extending throughout the display area and a second portion in the peripheral area, the first portion and the second portion being parts of an integral layer, an organic insulating layer substantially extending throughout but limited in the display area and on a side of the buffer layer away from the flexible base substrate; an inorganic insulating layer limited in the peripheral area and on a side of the buffer layer away from the flexible base substrate; a planarization layer on a side of the organic insulating layer away from the buffer layer, and a plurality of light emitting elements on a side of the planarization layer away from the organic insulating layer.
    Type: Grant
    Filed: May 20, 2019
    Date of Patent: April 5, 2022
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Feng Zhang, Zhijun Lv, Wenqu Liu, Liwen Dong, Xiaoxin Song, Zhao Cui, Detian Meng, Libo Wang, Chuanxiang Xu
  • Publication number: 20220102431
    Abstract: A display panel is provided with a plurality of sub-pixel areas and includes: a base substrate, a light emitting structure including a plurality of light emitting devices corresponding to the sub-pixel areas, an encapsulating layer, and a pixel defining layer. The pixel defining layer includes: a plurality of openings; at least two sub-pixel defining layers, and a quantum dot color film layer. Each of the sub-pixel defining layers is provided with a pixel separator. The pixel separators fence each of the plurality of openings, and define the plurality of sub-pixel areas. In the at least two sub-pixel defining layers, the sectional shape of the pixel separator in the sub-pixel defining layer which is farthest away from the encapsulating layer includes a regular trapezoid. The quantum dot color film layer includes a plurality of quantum dot color films arranged in the corresponding openings.
    Type: Application
    Filed: March 24, 2021
    Publication date: March 31, 2022
    Inventors: Haitao HUANG, Shi Shu, Qi Yao, Chuanxiang Xu, Zhao Cui, Lina Jing, Renquan Gu, Yong Yu
  • Publication number: 20220093896
    Abstract: A display panel includes a base; a plurality of display units disposed on a surface of the base, every two adjacent display units being provided with a gap therebetween; and a connection unit disposed in the gap and connected to the every two adjacent display units. The connection unit includes a first organic layer, a conductive layer and a second organic layer that are sequentially stacked. The first organic layer and the second organic layer are each configured to block stress causing the connection unit to deform.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 24, 2022
    Inventors: Jinxiang XUE, Xiaolei ZHANG, Guoqiang WANG, Zhao CUI, Huili WU, Zhongyuan SUN, Kai SUI, Guangcai YUAN, Wenqi LIU, Yichi ZHANG
  • Publication number: 20220068899
    Abstract: The present application discloses a display panel and a preparation method thereof. The display panel includes a base substrate provided with a circuit area and a light-emitting area; a driving circuit located in the circuit area of the base substrate; an organic insulating layer covering the light-emitting area of the base substrate; a light-emitting element embedded in the organic insulating layer, where an overlap area between the orthographic projection of the light-emitting element on the base substrate and the orthographic projection of the driving circuit on the base substrate is 0; and a first lapping electrode located on the side, facing away from the base substrate, of the light-emitting element, where the light-emitting element is electrically connected to the driving circuit through the first lapping electrode.
    Type: Application
    Filed: March 17, 2021
    Publication date: March 3, 2022
    Inventors: Zhijun LV, Feng Zhang, Liwen Dong, Wenqu Liu, Xiaoxin Song, Zhao Cui, Detian Meng, Libo Wang, Dongfei Hou, Qi Yao
  • Publication number: 20220035503
    Abstract: The present disclosure provides a fingerprint recognition unit and a fabrication method thereof, a fingerprint recognition module and a display device. The fingerprint recognition unit includes: a bearing substrate; a receiving electrode layer on the bearing substrate; a piezoelectric material layer on a side of the receiving electrode layer away from the bearing substrate; and a driving electrode layer on a side of the piezoelectric material layer away from the receiving electrode layer. A density of the driving electrode layer is greater than 5 g/cm3, and a thickness of the driving electrode layer, a thickness of the piezoelectric material layer and a thickness of the bearing substrate are configured such that a vibration nodal plane of the piezoelectric material layer is within the piezoelectric material layer.
    Type: Application
    Filed: April 28, 2021
    Publication date: February 3, 2022
    Inventors: Wenqu LIU, Qi YAO, Feng ZHANG, Zhao CUI, Libo WANG, Dongfei HOU, Xiaoxin SONG, Zhijun LV, Liwen DONG, Detian MENG, Jaiil RYU, Yang YUE, Haitao HUANG
  • Publication number: 20220037433
    Abstract: An array substrate includes a flexible base substrate; a buffer layer on the flexible base substrate and continuously extending from a display area into a peripheral area, including a first portion substantially extending throughout the display area and a second portion in the peripheral area, the first portion and the second portion being parts of an integral layer, an organic insulating layer substantially extending throughout but limited in the display area and on a side of the buffer layer away from the flexible base substrate; an inorganic insulating layer limited in the peripheral area and on a side of the buffer layer away from the flexible base substrate; a planarization layer on a side of the organic insulating layer away from the buffer layer, and a plurality of light emitting elements on a side of the planarization layer away from the organic insulating layer.
    Type: Application
    Filed: May 20, 2019
    Publication date: February 3, 2022
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Feng Zhang, Zhijun Lv, Wenqu Liu, Liwen Dong, Xiaoxin Song, Zhao Cui, Detian Meng, Libo Wang, Chuanxiang Xu
  • Publication number: 20220019108
    Abstract: The present disclosure can provide a transparent display panel, a preparation method thereof and a display device. The transparent display panel includes a bearing layer disposed between a base substrate and a liquid crystal layer and including a plurality of concave structures, and a plurality of reflecting structures located between the bearing layer and the liquid crystal layer, where an orthographic projection of the concave structure on the base substrate covers an orthographic projection of one or more reflecting structures on the base substrate.
    Type: Application
    Filed: March 26, 2021
    Publication date: January 20, 2022
    Inventors: Xiaoxin SONG, Feng ZHANG, Wenqu LIU, Zhijun LV, Liwen DONG, Zhao CUI, Detian MENG, Libo WANG, Dongfei HOU, Qi YAO
  • Publication number: 20220011936
    Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entityp, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guanzhong Wang, Xinghui Duan, Hua Chen Li
  • Publication number: 20210408330
    Abstract: The present disclosure relates to a display substrate and a method for manufacturing the same. The display substrate includes: a substrate; a first electrode located on the substrate; and a conductive convex located on the first electrode. A dimension of a cross section of the conductive convex along a plane parallel to the substrate is negatively correlated to a distance from the cross section to a surface of the first electrode.
    Type: Application
    Filed: July 24, 2019
    Publication date: December 30, 2021
    Inventors: Guangcai YUAN, Zhijun LV, Haixu LI, Xiaoxin SONG, Feng ZHANG, Wenqu LIU, Liwen DONG, Zhao CUI, Libo WANG, Detian MENG
  • Publication number: 20210385583
    Abstract: A transducer, a method of manufacturing a transducer, and a transducing device are provided. The transducer includes a receiving unit and a transmitting unit. The receiving unit includes a first receiving electrode, a first piezoelectric film, and a second receiving electrode which are sequentially stacked, and the receiving unit is configured to convert a first acoustic wave signal into an electrical signal by using a piezoelectric effect of the first piezoelectric film. The transmitting unit is configured to receive a control signal, which is based on the electrical signal, to transmit a second acoustic wave signal.
    Type: Application
    Filed: May 29, 2020
    Publication date: December 9, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhao CUI, Feng ZHANG, Wenqu LIU, Liwen DONG, Zhijun LV, Xiaoxin SONG, Detian MENG, Libo WANG, Qi YAO
  • Patent number: 11132136
    Abstract: Devices and techniques for variable width superblock addressing are described herein. A superblock width, specified in number of planes, is obtained. A superblock entry is created in a translation table of a NAND device. Here, the superblock entry may include a set of blocks, from the NAND device, that have the same block indexes across multiple die of the NAND device. The number of unique block indexes are equal to the number of planes and in different planes. A request, received from a requesting entity, is performed using the superblock entry. Performing the request includes providing a single instruction to multiple die of the NAND device and multiple data segments. Here, a data segment corresponds to a block in the set of blocks specified by a tuple of block index and die. A result of the request is then returned to the requesting entity.
    Type: Grant
    Filed: December 13, 2017
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Zhao Cui, Eric Kwok Fung Yuen, Guan Zhong Wang, Xinghui Duan, Hua Chen Li
  • Patent number: 11094740
    Abstract: The disclosure discloses a backboard, a display device, and a method for fabricating the same, and the backboard includes: a backboard body; and a plurality of LED installation mounts arranged in an array on the backboard body, wherein each of the plurality of LED installation mounts includes at least two lead-out electrodes to be connected with LED pins, and a coil structure around each of the at least two lead-out electrodes, wherein the coil structure is configured to produce a magnetic field upon being powered on. The coils can be formed on the backboard body in the backboard to absorb electrodes of LEDs to thereby position them precisely so as to transfer the LEDs in a mass manner with a high good yield ratio, and the lead-out electrodes can be powered on to thereby detect abnormally operating LEDs.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: August 17, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Zhijun Lv, Liwen Dong, Wenqu Liu, Xiaoxin Song, Zhao Cui, Feng Zhang, Qi Yao, Changzheng Wang
  • Patent number: 11088352
    Abstract: A display substrate, a manufacturing method thereof, and a display device are provided, in the field of display technology. The display substrate includes a base substrate, and a thin-film transistor, a light-emitting device, an encapsulation structure, and a conductive film layer sequentially disposed on the base substrate in a direction away from the base substrate. Since the display substrate includes a conductive film layer on a side of the encapsulation structure away from the base substrate, when the protective film layer on the side of the conductive film layer away from the base substrate is peeled off, static electricity generated by the separation of the film layer can be released to the conductive film layer, avoiding electron transition to the active layer of the thin-film transistor in the display substrate to cause offset of the threshold voltage of the thin-film transistor. The display brightness uniformity of the display substrate can be ensured.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: August 10, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Wenqu Liu, Feng Zhang, Qi Yao, Zhijun Lv, Liwen Dong, Shizheng Zhang, Ning Dang, Xiaoxin Song, Zhao Cui
  • Publication number: 20210233980
    Abstract: A display substrate is provided. The display substrate includes a base substrate; a pixel definition structure on the base substrate; a plurality of light emitting elements respectively in a plurality of first apertures; and a reflective layer at least partially in a respective one of the plurality of first apertures and configured to reflect light laterally emitted from a respective one of the plurality of light emitting elements to exit from a light emitting surface of the respective one of the plurality of light emitting elements. The pixel definition structure includes a first pixel definition layer on the base substrate, and a second pixel definition layer on a side of the first pixel definition layer away from the base substrate. Lateral sides of the first pixel definition layer and the second pixel definition layer have different slope angles with respect to a main surface of the base substrate.
    Type: Application
    Filed: December 16, 2019
    Publication date: July 29, 2021
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhijun LV, Liwen DONG, Wenqu LIU, Xiaoxin SONG, Zhao CUI, Libo WANG, Detian MENG, Feng ZHANG
  • Publication number: 20210220826
    Abstract: The present disclosure provides an electrode plate, a microfluidic chip, and a method of manufacturing the electrode plate. In one embodiment, an electrode plate includes: a substrate, an electrode and a surface contact layer stacked in sequence, and a droplet inlet hole passing through the substrate, the electrode and the surface contact layer. The surface contact layer comprises a super-hydrophobic region and a hydrophilic region, and the droplet inlet hole is disposed in the hydrophilic region. The microfluidic chip includes: a first electrode plate formed by the abovementioned electrode plate, and a second electrode plate provided on a side of the first electrode plate close to the surface contact layer. The first electrode plate is provided opposite to the second electrode plate and a liquid channel is formed between the first electrode plate and the second electrode plate.
    Type: Application
    Filed: December 6, 2019
    Publication date: July 22, 2021
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoxin Song, Feng Zhang, Wenqu Liu, Zhijun Lv, Zhao Cui, Qi Yao