Patents by Inventor Zheng Yang

Zheng Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10510796
    Abstract: A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: December 17, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Rui Wang, Zheng Yang, Hiroaki Ebihara, Tiejun Dai
  • Patent number: 10498999
    Abstract: A comparator includes a first stage coupled to compare a reference voltage to an image charge voltage signal. The first stage includes first and second NMOS input transistors coupled between an enabling transistor and respective first and second cascode devices to receive the reference voltage and the image charge voltage signal. A first auto-zero switch is between a gate of the first NMOS input transistor and a first node. The first node is between the first NMOS input transistor and the first cascode device. A second auto-zero switch is between a gate of the second NMOS input transistor and a second node. The second node is between the second cascode device and a second PMOS transistor. A voltage difference between the first and second nodes during an auto-zero period reduces an amount of kickback that occurs during an ADC period.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 3, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hiroaki Ebihara, Zheng Yang
  • Patent number: 10490661
    Abstract: A dopant boost in the source/drain regions of a semiconductor device, such as a transistor can be provided. A semiconductor device can include a doped epitaxy of a first material having a plurality of boosting layers embedded within. The boosting layers can be of a second material different from the first material. Another device can include a source/drain feature of a transistor. The source/drain feature includes a doped source/drain material and one or more embedded distinct boosting layers. A method includes growing a boosting layer in a recess of a substrate, where the boosting layer is substantially free of dopant. The method also includes growing a layer of doped epitaxy in the recess on the boosting layer.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yu Ma, Zheng-Yang Pan, Shih-Chieh Chang, Cheng-Han Lee
  • Publication number: 20190334029
    Abstract: A method includes providing a substrate having a gate structure over a first side of the substrate, forming a recess adjacent to the gate structure, and forming in the recess a first semiconductor layer having a dopant, the first semiconductor layer being non-conformal, the first semiconductor layer lining the recess and extending from a bottom of the recess to a top of the recess. The method further includes forming a second semiconductor layer having the dopant in the recess and over the first semiconductor layer, a second concentration of the dopant in the second semiconductor layer being higher than a first concentration of the dopant in the first semiconductor layer.
    Type: Application
    Filed: July 8, 2019
    Publication date: October 31, 2019
    Inventors: Chih-Yu Ma, Zheng-Yang Pan, Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee
  • Publication number: 20190265336
    Abstract: A light detection and ranging (LiDAR) system includes a rotatable polygon having a plurality of reflective sides including a first reflective side. The rotatable polygon configured to scan one or more first light signals in a first direction. The LiDAR system also includes a scanning optic configured to scan the one or more first light signals in a second direction different than the first direction. A first light source is configured to direct the one or more first light signals to one or more of the plurality of reflective sides of the rotatable polygon or the scanning optic. A first detector is configured to detect a first return light signal associated with a signal of the one or more first light signals. One or more optics are configured to focus the first return light signal on the first detector.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Inventors: Rui ZHANG, Huitao SUN, Zheng YANG, Yimin LI, Junwei BAO
  • Publication number: 20190268556
    Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.
    Type: Application
    Filed: December 17, 2018
    Publication date: August 29, 2019
    Inventors: Hiroaki Ebihara, Rui Wang, Zheng Yang, Eiichi Funatsu
  • Publication number: 20190244864
    Abstract: A semiconductor device and method includes: forming a gate stack over a substrate; growing a source/drain region adjacent the gate stack, the source/drain region being n-type doped Si; growing a semiconductor cap layer over the source/drain region, the semiconductor cap layer having Ge impurities, the source/drain region free of the Ge impurities; depositing a metal layer over the semiconductor cap layer; annealing the metal layer and the semiconductor cap layer to form a silicide layer over the source/drain region, the silicide layer having the Ge impurities; and forming a metal contact electrically coupled to the silicide layer.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 8, 2019
    Inventors: Shahaji B. More, Zheng-Yang Pan, Cheng-Han Lee, Shih-Chieh Chang
  • Patent number: 10375338
    Abstract: A hybrid bonded image sensor has a photodiode die with macrocells having at least one photodiode and a bond contact; a supporting circuitry die with multiple supercells, each supercell having at least one macrocell unit having a bond contact coupled to the bond contact of a macrocell of the photodiode die. Each macrocell unit lies within a supercell and has a reset transistor adapted to reset photodiodes of the macrocell of the photodiode die. Each supercell has at least one common source amplifier adapted to receive signal from the bond contact of a selected macrocell unit of the supercell, the common source amplifier coupled to drive a column line through a selectable source follower. In embodiments, the common source amplifiers of several supercells drive the selectable source follower through a distributed differential amplifier.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: August 6, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Zheng Yang, Hiroaki Ebihara, Chun-Ming Tang, Chao-Fang Tsai, Rui Wang, Tiejun Dai
  • Publication number: 20190223481
    Abstract: A solubilized steviol glycoside composition including one or more steviol glycosides and one or more steviol glycoside solubility enhancers can be used as a sweetener composition to sweeten other compositions (sweetenable compositions) such as foods, beverages, medicines, oral hygiene compositions, pharmaceuticals, nutraceuticals, and the like.
    Type: Application
    Filed: April 2, 2019
    Publication date: July 25, 2019
    Applicant: CARGILL, INCORPORATED
    Inventors: Dan S. Gaspard, Anil Bhagwan KHARE, Zheng YANG, Adam T. ZARTH
  • Publication number: 20190212353
    Abstract: Disclosed herein are a detection device and a detection method. The detection device comprises: a consumable cassette (1) configured to have a detection side (A) provided with a consumable, the consumable cassette (1) being provided with a circuit board (3) carrying a test information; and a detection instrument configured to read the test information from the circuit board (3) and perform a detection to the consumable based on the test information to obtain a detection result. Also provided is a detection method comprising: providing the detection device (S1); placing the consumable cassette (1) into the detection instrument (S2); obtaining a test information by the detection instrument (S3); determining, according to the test information, whether the consumable is in compliance with a detection requirement (S4); and performing a detection to the consumable by the detection instrument to obtain a detection result when the consumable is in compliance with the detection requirement (S5).
    Type: Application
    Filed: May 19, 2017
    Publication date: July 11, 2019
    Inventors: Zheng YANG, Mengchun QIU, Jijun LIN, Shaoyang WANG
  • Patent number: 10347764
    Abstract: A method includes providing a substrate having a gate structure over a first side of the substrate, forming a recess adjacent to the gate structure, and forming in the recess a first semiconductor layer having a dopant, the first semiconductor layer being non-conformal, the first semiconductor layer lining the recess and extending from a bottom of the recess to a top of the recess. The method further includes forming a second semiconductor layer having the dopant in the recess and over the first semiconductor layer, a second concentration of the dopant in the second semiconductor layer being higher than a first concentration of the dopant in the first semiconductor layer.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: July 9, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yu Ma, Zheng-Yang Pan, Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee
  • Patent number: 10326958
    Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: June 18, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hiroaki Ebihara, Zheng Yang
  • Patent number: 10311744
    Abstract: A cognitive training method has a step of obtaining sensor data of a subject during a memory exercise which in turn determines whether the sensor data includes predetermined information indicative of cognitive functions used for remembering. The step of advancing the memory exercise is carried out when it is determined that the sensor data includes predetermined information indicative of cognitive functions used for remembering. The step of calculating an objective cognitive assessment of the subject is carried out when the memory exercise is completed and cognitive training is measured at least partially in response to the advancing of the memory exercise. The fact that an objective cognitive assessment is calculated provides a method of using an autodidactic cognitive training device.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: June 4, 2019
    Assignees: Agency for Science, Technology and Research, National University of Singapore
    Inventors: Hai Hong Zhang, Cuntai Guan, Ranga Krishnan, Tih Shih Lee, Zheng Yang Chin, Chuan Chu Wang
  • Publication number: 20190157154
    Abstract: The present disclosure describes an exemplary fabrication method of a p-type fully strained channel that can suppress the formation of {111} facets during a silicon germanium epitaxial growth. The exemplary method includes the formation of silicon epitaxial layer on a top, carbon-doped region of an n-type region. A recess is formed in the silicon epitaxial layer via etching, where the recess exposes the top, carbon-doped region of the n-type region. A silicon seed layer is grown in the recess, and a silicon germanium layer is subsequently epitaxially grown on the silicon seed layer to fill the recess. The silicon seed layer can suppress the formation of growth defects such as, for example, {111} facets, during the silicon germanium epitaxial layer growth.
    Type: Application
    Filed: November 21, 2017
    Publication date: May 23, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Chieh Wang, Huai-Tei Yang, Zheng-Yang Pan, Shahaji B. More, Shih-Chieh Chang, Cheng-Han Lee
  • Publication number: 20190148552
    Abstract: A method for forming a semiconductor device is provided. The method includes forming a gate stack to partially cover a semiconductor structure. The method also includes forming a first semiconductor material over the semiconductor structure. The method further includes forming a second semiconductor material over the first semiconductor material. In addition, the method includes forming a third semiconductor material over the second semiconductor material. The first semiconductor material and the third semiconductor material together surround the second semiconductor material. The second semiconductor material has a greater dopant concentration than that of the first semiconductor material or that of the third semiconductor material.
    Type: Application
    Filed: December 24, 2018
    Publication date: May 16, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shahaji B. MORE, Zheng-Yang PAN, Chun-Chieh WANG, Cheng-Han LEE, Shih-Chieh CHANG
  • Patent number: 10291895
    Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object and pixel support circuitry. The pixel support circuitry includes charging control logic coupled to the photosensor to detect when the photosensor senses the photons reflected from the object. The pixel support circuitry also includes a controllable current source coupled to provide a charge current in response to a time of flight signal coupled to be received from the charging control logic. A capacitor is coupled to receive the charge current from the controllable current source in response to the time of flight signal, and voltage on the capacitor is representative of a round trip distance to the object. A counter circuit is coupled to the photosensor to count a number of the photons reflected from the object and received by the photosensor.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: May 14, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Olivier Bulteel, Rui Wang, Zheng Yang
  • Publication number: 20190138822
    Abstract: A system for detecting a surrounding object may receive, from a camera, a first image including a plurality of pixels relating to one or more objects and receive, from one or more LiDARs, a first point set including a plurality of points corresponding to the plurality of pixels. The system may also, based on the first point set, determine 3D coordinates and reflection intensities of the plurality of points, based on which the system may generate a segment result by classifying the plurality of points. The system may further transform the 3D coordinates of the plurality of points into 2D coordinates and determine an object type of the one or more objects based on the 2D coordinates, the 3D coordinates, the segment result, and the first image.
    Type: Application
    Filed: December 29, 2018
    Publication date: May 9, 2019
    Applicant: BEIJING DIDI INFINITY TECHNOLOGY AND DEVELOPMENT CO., LTD.
    Inventors: Weilong YAO, Zenan MENG, Jian LIU, Hao ZHANG, Shen TAN, Yehe CAI, Zheng YANG
  • Patent number: 10269975
    Abstract: An electronic device includes a 2D material layer having a bandgap. The 2D material layer includes two multilayer 2D material regions and a channel region therebetween. A first electrode electrically contacts one of the multilayer 2D material regions, and a second electrode electrically contacts the other of the multilayer 2D material regions.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: April 23, 2019
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Seongjun Park, Jaeho Lee, Changho Ra, Wonjong Yoo, Faisal Ahmed, Zheng Yang, Xiaochi Liu
  • Patent number: 10269646
    Abstract: A semiconductor device and method includes: forming a gate stack over a substrate; growing a source/drain region adjacent the gate stack, the source/drain region being n-type doped Si; growing a semiconductor cap layer over the source/drain region, the semiconductor cap layer having Ge impurities, the source/drain region free of the Ge impurities; depositing a metal layer over the semiconductor cap layer; annealing the metal layer and the semiconductor cap layer to form a silicide layer over the source/drain region, the silicide layer having the Ge impurities; and forming a metal contact electrically coupled to the silicide layer.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. More, Zheng-Yang Pan, Cheng-Han Lee, Shih-Chieh Chang
  • Patent number: 10263031
    Abstract: A hybrid-bonded image sensor has a photodiode die with multiple macrocells; each macrocell has at least one photodiode and a coupling region. The coupling regions couple to a coupling region of a macrocell unit of a supporting circuitry die where they feed an input of an amplifier and a feedback capacitor. The feedback capacitor also couples to output of the amplifier, and the amplifier inverts between the input and the output. The method includes resetting a photodiode of the photodiode die; coupling signal from photodiode through the bond point to the supporting circuitry die to a feedback capacitor and to an input of the amplifier, the feedback capacitor also coupled to an inverting output of the amplifier; and amplifying the signal with the amplifier, where a capacitance of the feedback capacitor determines a gain of the amplifier.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: April 16, 2019
    Assignee: OmniVision Technologies, Inc.
    Inventors: Rui Wang, Hiroaki Ebihara, Zheng Yang, Chun-Ming Tang, Chao-Fang Tsai, Tiejun Dai