Abstract: A display panel includes a substrate. The substrate includes a display area, a bonding area disposed on one side of the display area and a fan-out area disposed between the bonding area and the display area. The fan-out area includes at least two metal layers, a first planarization layer and a first interconnection line layer which are stacked on a surface of the substrate.

Abstract: A display panel includes a substrate; a first metal layer comprising a gate of a driving transistor; a second metal layer comprising a capacitor plate of a storage capacitor; a third metal layer, located on one side of the second metal layer away from the substrate and comprising a data line. An orthographic projection of the data line on the substrate is non-overlapped with the orthographic projection of the gate projected on the substrate; and a first shielding electrode, having a fixed potential. A part of the orthographic projection of the gate projected on the substrate is located in an orthographic projection of the first shielding electrode projected on the substrate, and the rest part of the orthographic projection of the gate projected on the substrate is located in the orthographic projection of the capacitor plate projected on the substrate.

Abstract: There are provided an Integrated Circuit (IC) unit, a method of manufacturing the same, and an electronic device including the IC unit. According to an embodiment, the IC unit includes a first source/drain layer, a channel layer and a second source/drain layer for a first device and a first source/drain layer, a channel layer and a second source/drain layer for a second device stacked in sequence on a substrate. In the first device, the channel layer includes a first portion and a second portion separated from each other. The first source/rain layer and the second source/drain layer each extend integrally to overlap both the first portion and the second portion of the channel layer. The IC unit further includes a first gate stack surrounding a periphery of the first portion and also a periphery of the second portion of the channel layer of the first device, and a second gate stack surrounding a periphery of the channel layer of the second device.

Abstract: The present disclosure relates to a pixel circuit, a driving method of a pixel circuit, and a display apparatus. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor and an organic light-emitting diode. A control terminal of the fourth transistor is configured to input a first scanning signal. A first electrode of the fourth transistor is connected to a second electrode of the third transistor, a control terminal of the first transistor and a terminal of the first capacitor. Another terminal of the first capacitor is connected to a second electrode of the second transistor, a second electrode of the fifth transistor and a first electrode of the first transistor.

Abstract: An online system guarantees achievement of an impression goal and a reach goal associated with a set of content items received from a content-providing user of the online system within a period of time associated with the goals. To ensure that the goals are achieved within the period of time, the online system may adjust values of filters associated with the set of content items that control a number of impression opportunities for which the set of content items will be eligible for presentation to users of the online system. The online system may compute a normalized ratio throughout the period of time associated with the goals based on the goals and the progress made by the online system towards achieving the goals. Based on the normalized ratio, the online system may track the performance of the content items and adjust the values of the filters.

Abstract: The present disclosure provides a pixel circuit, a method for driving a pixel circuit, a display panel, and a display apparatus. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a capacitor, and a light-emitting diode. In the above pixel circuit, the first light emitting control signal and the second light emitting control signal are provided to respectively initialize the first polar plate and the second polar plate of the capacitor, to ensure the same initial state of the pixel circuits.

Abstract: The present application provides a display panel and a driving method of a pixel circuit. The display panel includes a scan driver, a light-emitting control driver, a data driver, a plurality of pixel circuits, and a plurality of pixels each corresponding to one of the pixel circuits. Each of the pixel circuits includes a first transistor to a seventh transistor, a capacitor and an organic light-emitting diode. A control terminal of the fourth transistor is configured to input a first scanning signal; and a first electrode of the fourth transistor is connected to a second electrode of the third transistor, a control terminal of the first transistor and a terminal of the capacitor. Another terminal of the capacitor is connected to a first electrode of a fifth transistor. A second electrode of the fourth transistor is configured to input a first reference voltage.

Abstract: A multi-gate FinFET including a negative capacitor connected to one of its gates, a method of manufacturing the same, and an electronic device comprising the same are disclosed. In one aspect, the FinFET includes a fin extending in a first direction on a substrate, a first gate extending in a second direction crossing the first direction on the substrate on a first side of the fin to intersect the fin, a second gate opposite to the first gate and extending in the second direction on the substrate on a second side of the fin opposite to the first side to intersect the fin, a metallization stack provided on the substrate and above the fin and the first and second gates, and a negative capacitor formed in the metallization stack and connected to the second gate.

Abstract: A multi-gate FinFET including a negative capacitor connected to one of its gates, a method of manufacturing the same, and an electronic device comprising the same are disclosed. In one aspect, the FinFET includes a fin extending in a first direction on a substrate, a first gate extending in a second direction crossing the first direction on the substrate on a first side of the fin to intersect the fin, a second gate opposite to the first gate and extending in the second direction on the substrate on a second side of the fin opposite to the first side to intersect the fin, a metallization stack provided on the substrate and above the fin and the first and second gates, and a negative capacitor formed in the metallization stack and connected to the second gate.

Abstract: An online system receives a video-presentation request from a third party system. The video-presentation request comprises a video and a target audience specification for the video. The online system selects a plurality of users as the target audience of the video based on the target audience specification. From the target audience, the online system generates a sample subset of users and determines a sampled video reach count for the subset of users. A sample user who, as determined by the online system, would have viewed the view for at least a threshold duration, is included in the sampled video view count. The online system estimates a total video reach count for target audience by extrapolating the sampled video reach count for the subset of users to the target audience. The total video reach count can be used to determine a parameter for presenting the video on an online system.

Abstract: There are provided a multi-gate FinFET including a negative capacitor connected to one of its gates, a method of manufacturing the same, and an electronic device comprising the same. The FinFET may include a fin extending in a first direction on a substrate, a first gate extending in a second direction crossing the first direction on the substrate on a first side of the fin to intersect the fin, a second gate opposite to the first gate and extending in the second direction on the substrate on a second side of the fin opposite to the first side to intersect the fin, a metallization stack provided on the substrate and above the fin and the first and second gates, and a negative capacitor formed in the metallization stack and connected to the second gate.

Abstract: The present application provides a display panel and a driving method of a pixel circuit. The display panel includes a scan driver, a light-emitting control driver, a data driver, a plurality of pixel circuits, and a plurality of pixels each corresponding to one of the pixel circuits. Each of the pixel circuits includes a first transistor to a seventh transistor, a capacitor and an organic light-emitting diode. A control terminal of the fourth transistor is configured to input a first scanning signal; and a first electrode of the fourth transistor is connected to a second electrode of the third transistor, a control terminal of the first transistor and a terminal of the capacitor. Another terminal of the capacitor is connected to a first electrode of a fifth transistor. A second electrode of the fourth transistor is configured to input a first reference voltage.

Abstract: A pixel circuit includes: nine transistors named after the first through the ninth, a capacitor, and a light emitting diode. A first electrode of the fourth transistor is connected to second electrode of third transistor, control end of first transistor and first polar plate of capacitor. A second electrode of fourth transistor is connected to second electrode of seventh transistor. A first electrode of seventh transistor is connected to anode of the light emitting diode and second electrode of the sixth transistor. A first electrode of the sixth transistor is connected to second electrode of the first transistor and first electrode of the third transistor. A second electrode is connected to first electrode of the first transistor, first electrode of the ninth transistor, and second electrode of the fifth transistor. A second electrode is connected to second polar plate of the capacitor and second electrode of the ninth transistor.

Abstract: The present disclosure provides a pixel circuit, a method for driving a pixel circuit, a display panel, and a display apparatus. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a capacitor, and a light-emitting diode. In the above pixel circuit, the first light emitting control signal and the second light emitting control signal are provided to respectively initialize the first polar plate and the second polar plate of the capacitor, to ensure the same initial state of the pixel circuits.

Abstract: The present disclosure relates to a pixel circuit, a driving method of a pixel circuit, and a display apparatus. The pixel circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first capacitor and an organic light-emitting diode. A control terminal of the fourth transistor is configured to input a first scanning signal. A first electrode of the fourth transistor is connected to a second electrode of the third transistor, a control terminal of the first transistor and a terminal of the first capacitor. Another terminal of the first capacitor is connected to a second electrode of the second transistor, a second electrode of the fifth transistor and a first electrode of the first transistor.

Abstract: There are provided an Integrated Circuit (IC) unit, a method of manufacturing the same, and an electronic device including the IC unit. According to an embodiment, the IC unit includes a first source/drain layer, a channel layer and a second source/drain layer for a first device and a first source/drain layer, a channel layer and a second source/drain layer for a second device stacked in sequence on a substrate. In the first device, the channel layer includes a first portion and a second portion separated from each other. The first source/rain layer and the second source/drain layer each extend integrally to overlap both the first portion and the second portion of the channel layer. The IC unit further includes a first gate stack surrounding a periphery of the first portion and also a periphery of the second portion of the channel layer of the first device, and a second gate stack surrounding a periphery of the channel layer of the second device.

Abstract: An advertiser specifies an advertising campaign along with a budget, a duration and one or more objectives associated with the advertising campaign. An online system presenting advertisements from the advertising campaign determines an interval representing a portion of the duration, an interval budget, and one or more interval objectives. Historical information describing selection and presentation of advertisements by the online system is retrieved, and used to determine one or more filters limiting the number of opportunities to present an advertisement in which advertisements from the advertising campaign are included. The scaling filters may be based on the one or more interval objectives, bid amounts determined for advertisements in the advertising campaign, and bid amounts associated with advertisements previously selected for presentation form the historical data.

Abstract: There are provided an Integrated Circuit (IC) unit, a method of manufacturing the same, and an electronic device including the IC unit. According to an embodiment, the IC unit includes a first source/drain layer, a channel layer and a second source/drain layer for a first device and a first source/drain layer, a channel layer and a second source/drain layer for a second device stacked in sequence on a substrate. In the first device, the channel layer includes a first portion and a second portion separated from each other. The first source/rain layer and the second source/drain layer each extend integrally to overlap both the first portion and the second portion of the channel layer. The IC unit further includes a first gate stack surrounding a periphery of the first portion and also a periphery of the second portion of the channel layer of the first device, and a second gate stack surrounding a periphery of the channel layer of the second device.

Abstract: There are provided an Integrated Circuit (IC) unit, a method of manufacturing the same, and an electronic device including the IC unit. According to an embodiment, the IC unit includes a first source/drain layer, a channel layer and a second source/drain layer for a first device and a first source/drain layer, a channel layer and a second source/drain layer for a second device stacked in sequence on a substrate. In the first device, the channel layer includes a first portion and a second portion separated from each other. The first source/rain layer and the second source/drain layer each extend integrally to overlap both the first portion and the second portion of the channel layer. The IC unit further includes a first gate stack surrounding a periphery of the first portion and also a periphery of the second portion of the channel layer of the first device, and a second gate stack surrounding a periphery of the channel layer of the second device.

Abstract: An online system scores campaign audiences based on historical scoring data for similar audiences. A third party system selects a target audience and a day on which the target audience should be exposed to a campaign. The online system generates an availability grid and a score grid to determine a score for the target audience. Values in the availability grid are determined based on the availability of exposure time for the target audience on the specified date. Values in the score grid are based on historical scoring data for the same audience. The online system scores the target audience by interpolating between data points in the score grid based on a selected availability from the availability grid.