Abstract: This invention relates to methods of modifying pyridoxal 5? phosphate (PLP) dependent enzymes to extend the serum half-life of the enzyme, extend the in vivo period of methionine depletion in a host, and decrease the immunogenicity of the enzyme. A preferred PLP-dependent enzyme to be modified is a methioninase, preferably a recombinant methioninase (rMETase). The invention further relates to compositions comprising a modified PLP-dependent enzyme and methods of using the same.

Abstract: Programmable fuse-type through silicon vias (TSVs) in silicon chips are provided with non-programmable TSVs in the same chip. The programmable fuse-type TSVs may employ a region within the TSV structure having sidewall spacers that restrict the cross-sectional conductive path of the TSV adjacent a chip surface contact pad. Application of sufficient current by programming circuitry causes electromigration of metal to create a void in the contact pad and, thus, an open circuit. Programming may be carried out by complementary circuitry on two adjacent chips in a multi-story chip stack.

Abstract: The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life.

Abstract: Embodiments of the present invention provide a semiconductor device that includes a transistor device having a first, a second, and a third node; and an interconnect structure having at least one wire and the wire having a first and a second end with the first end of the wire being connected to one of the first, the second, and the third node of the transistor device. The wire is conductive and adapted to provide an operating current in a first direction during a normal operating mode, and adapted to provide a repairing current in a second direction opposite to the first direction during a repair mode of the semiconductor device. In one embodiment the transistor device is a bipolar transistor with the first, second, and third nodes being an emitter, a base, and a collector of the bipolar transistor. The wire is connected to one of the emitter and the collector. Method of operating the semiconductor device and current supplying circuit for the semiconductor device are also disclosed.

Abstract: Through silicon vias (TSVs) in silicon chips are both programmable and non-programmable. The programmable TSVs may employ metal/insulator/metal structures to switch from an open to shorted condition with programming carried out by complementary circuitry on two adjacent chips in a multi-story chip stack.

Abstract: Programmable fuse-type through silicon vias (TSVs) in silicon chips are provided with non-programmable TSVs in the same chip. The programmable fuse-type TSVs may employ a region within the TSV structure having sidewall spacers that restrict the cross-sectional conductive path of the TSV adjacent a chip surface contact pad. Application of sufficient current by programming circuitry causes electromigration of metal to create a void in the contact pad and, thus, an open circuit. Programming may be carried out by complementary circuitry on two adjacent chips in a multi-story chip stack.

Abstract: An apparatus and method for manufacturing low-cost high-density compact active inductor module using existing DRAM, SRAM and logic process integration. The elements of the active inductor modules are formed by three semiconductor devices including nMOS devices, deep-trench capacitors and a polysilicon or TaN resistor. The active inductor modules can be connected in a parallel and/or serial configuration to obtain a wide range of inductance values. The modular active inductors can be advantageously stored in an ASIC library to facilitate a flexible and convenient circuit design.

Abstract: A circuit and a method for extending the lifetime of a semiconductor chip. The circuit including a voltage reference generator, a voltage switch, a threshold voltage regulator device and a threshold voltage monitor device tunes an automatic internal power supply. The voltage reference generator provides one or more reference voltage levels that are transmitted to the voltage switch. The threshold voltage monitor device monitors the threshold voltage of the device, triggering the voltage switch to select a reference level for use as a voltage reference for the regulator when the threshold voltage of the monitored device exceeds a predetermined value. The regulator then converts the external power supply to an internal supply and holds it at the predetermined reference level.

Abstract: An on-chip circuit to quantitatively measure threshold voltage shifts of a MOSFET. The circuit includes a programmable Vt reference sensor; a programmable Vt monitoring sensor; and a comparator for receiving inputs from the reference and monitoring sensors providing an output flag signal. The shifting of the MOSFET device voltage threshold monitors process variations, geometry sensitivity, plasma damage, stress, and hot carriers and other device damages. The same circuit also measures voltage differences between any two nodes in an integrated circuit chip or wafer.

Abstract: An on-chip circuit to quantitatively measure threshold voltage shifts of a MOSFET. The circuit includes a programmable Vt reference sensor; a programmable Vt monitoring sensor; and a comparator for receiving inputs from the reference and monitoring sensors providing an output flag signal. The shifting of the MOSFET device voltage threshold monitors process variations, geometry sensitivity, plasma damage, stress, and hot carriers and other device damages. The same circuit also measures voltage differences between any two nodes in an integrated circuit chip or wafer.

Abstract: The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life.

Abstract: The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life.

Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (VCB of less than 1 V).

Abstract: Infection by P. carinii can be treated by administering methioninase optionally in combination with additional therapeutic agents, such as antibiotics.

Abstract: A method for recovery of degradation caused by avalanche hot carriers is provided that includes subjecting an idle bipolar transistor exhibiting avalanche degradation to a thermal anneal step which increases temperature of the transistor thereby recovering the avalanche degradation of the bipolar transistor. In one embodiment, the annealing source is a self-heating structure that is a Si-containing resistor that is located side by side with an emitter of the bipolar transistor. During the recovering step, the bipolar transistor including the self-heating structure is placed in the idle mode (i.e., without bias) and a current from a separate circuit is flown through the self-heating structure. In another embodiment of the present, the annealing step is a result of providing a high forward current (around the peak fT current or greater) to the bipolar transistor while operating below the avalanche condition (V?CB of less than 1 V).

Abstract: The present invention relates to highly conjugated proteins and methods for making such proteins. In particular, the present invention relates to methods for linking additional sites to a protein for conjugation with activated polyethylene glycol (PEG) linkers, without denaturing the protein. The invention also relates to highly conjugated proteins with decreased immunogenicity and increased circulating half-life.

Abstract: This invention relates to methods of modifying pyridoxal 5? phosphate (PLP) dependent enzymes to extend the serum half-life of the enzyme, extend the in vivo period of methionine depletion in a host, and decrease the immunogenicity of the enzyme. A preferred PLP-dependent enzyme to be modified is a methioninase, preferably a recombinant methioninase (rMETase). The invention further relates to compositions comprising a modified PLP-dependent enzyme and methods of using the same.

Abstract: Infection by P. carinii can be treated by administering methioninase optionally in combination with additional therapeutic agents, such as antibiotics.