Abstract: A method includes providing a substrate having an n-type fin-like field-effect transistor (NFET) region and forming a fin structure in the NFET region. The fin structure includes a first layer having a first semiconductor material, and a second layer under the first layer and having a second semiconductor material different from the first semiconductor material. The method further includes forming a patterned hard mask to fully expose the fin structure in gate regions of the NFET region and partially expose the fin structure in at least one source/drain (S/D) region of the NFET region. The method further includes oxidizing the fin structure not covered by the patterned hard mask, wherein the second layer is oxidized at a faster rate than the first layer. The method further includes forming an S/D feature over the at least one S/D region of the NFET region.

Abstract: A rolled iron core traction transformer, comprising an iron core (1); the iron core (1) is formed by splicing two symmetrical annealed iron-core closed single frames (1-1); each iron-core closed single frame (1-1) is formed by sequentially coiling continuous silicon steel sheets; the iron-core closed single frame (1-1) has two iron core column single bodies (1-1-1) having approximately semicircular cross sections; the iron core (1) has two iron core columns (1-2) thereon spliced by the iron core column single bodies (1-1-1) and having approximately circular cross sections; each iron core column (1-2) is sequentially provided with a low-voltage T winding (6), a low-voltage F winding (5) and a high-voltage winding (4) thereon from inside to outside; two sides of each high-voltage winding (4) are respectively provided with a first tapping area and a second tapping area; the first tapping area is provided with low-voltage side high-voltage tapping outgoing lines (16); the second lapping area is provided with high

Abstract: An electrically powered gear box for a semitrailer stabilizer, comprising a gear box housing; the housing is internally provided with a drive gear (10), a power output shaft (2), and a clutch mechanism ensuring transmission connection or disengagement between the drive gear (10) and the power output shaft (2); the housing is externally provided with a motor (20); and the shaft of the motor is in a transmission connection with the drive gear (10). The electrically powered gear box for the semitrailer stabilizer can be manually or electrically controlled. In the case of electrical control, the clutch mechanism causes the drive gear (10) to be in a transmission connection with the power output shaft (2); upon activating the motor (20), the motor (20) drives the power output shaft (2) to rotate via the drive gear (10) and the clutch mechanism, thus ensuring easy operation.

Abstract: The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a substrate having a first gate region, a first fin structure over the substrate in the first gate region. The first fin structure includes an upper semiconductor material member, a lower semiconductor material member, surrounded by an oxide feature and a liner wrapping around the oxide feature of the lower semiconductor material member, and extending upwards to wrap around a lower portion of the upper semiconductor material member. The device also includes a dielectric layer laterally proximate to an upper portion of the upper semiconductor material member. Therefore the upper semiconductor material member includes a middle portion that is neither laterally proximate to the dielectric layer nor wrapped by the liner.

Abstract: The present disclosure relates to a transistor device having an epitaxial carbon layer and/or a carbon implantation region that provides for a low variation of voltage threshold, and an associated method of formation. In some embodiments, the transistor device has an epitaxial region arranged within a recess within a semiconductor substrate. The epitaxial region has a carbon doped silicon epitaxial layer and a silicon epitaxial layer disposed onto the carbon doped silicon epitaxial layer. A gate structure is arranged over the silicon epitaxial layer. The gate structure has a gate dielectric layer disposed onto the silicon epitaxial layer and a gate electrode layer disposed onto the gate dielectric layer. A source region and a drain region are arranged on opposing sides of a channel region disposed below the gate structure.

Abstract: The present disclosure describes a fin-like field-effect transistor (FinFET). The device includes one or more fin structures over a substrate, each with source/drain (S/D) features and a high-k/metal gate (HK/MG). A first HK/MG in a first gate region wraps over an upper portion of a first fin structure, the first fin structure including an epitaxial silicon (Si) layer as its upper portion and an epitaxial growth silicon germanium (SiGe), with a silicon germanium oxide (SiGeO) feature at its outer layer, as its middle portion, and the substrate as its bottom portion. A second HK/MG in a second gate region, wraps over an upper portion of a second fin structure, the second fin structure including an epitaxial SiGe layer as its upper portion, an epitaxial Si layer as it upper middle portion, an epitaxial SiGe layer as its lower middle portion, and the substrate as its bottom portion.

Abstract: A method includes providing a substrate having a fin extending from a first (e.g., top) surface of the substrate. The fin has first region (a stem region) and a second region (an active region) each having a different composition. The first region of the fin is modified to decrease a width of semiconductor material for example by etching and/or oxidizing the first region of the fin. The method then continues to provide a gate structure on the second region of the fin. FinFET devices having stem regions with decreased widths of semiconductor material are also provided.

Abstract: Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs). An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin.

Abstract: The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a substrate having an n-type FinFET (NFET) region and a p-type FinFET (PFET) region. The device also includes a first and a second fin structures over the substrate in the NFET region and a third fin structure over the substrate in the PFET region. The device also includes a first high-k (HK)/metal gate (MG) stack in the NFET region, including wrapping over a portion of the first fin structure, a first subset of the first source/drain (S/D) features, adjacent to the first HK/MG stack, over the recessed first fin structure and a second subset of the first S/D features partially over the recessed second fin structure and partially over the recessed first fin structure.

Abstract: The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a substrate having a first gate region, a first fin structure over the substrate in the first gate region. The first fin structure includes an upper semiconductor material member, a lower semiconductor material member, surrounded by an oxide feature and a liner wrapping around the oxide feature of the lower semiconductor material member, and extending upwards to wrap around a lower portion of the upper semiconductor material member. The device also includes a dielectric layer laterally proximate to an upper portion of the upper semiconductor material member. Therefore the upper semiconductor material member includes a middle portion that is neither laterally proximate to the dielectric layer nor wrapped by the liner.

Abstract: An indirect data object association module performs an indirect data object association based on detecting a user interaction with an interface for determining data objects associated with a selected data object. The module generates a direct association interface object that lists data objects directly associated with the selected data object and accesses data corresponding to data objects associated with the data objects listed in the direct association interface object. An indirect data object association is performed based on the selected data object, its directly associated data objects and the accessed data. The module generates an indirect association interface object to list data objects indirectly associated with the selected data object and links the indirect association interface object to the direct association interface object.

Abstract: Methods and system are disclosed that generate forecasting information by aggregating data. In one aspect, an enterprise application may receive a request for a requisition from an operational process. A commitments management application associated with the enterprise application may generate commitment corresponding to the requisition. Data such as operational data, planning data and document data may be aggregated from different data stores. A report including the aggregate data may be generated that may provide forecasting information for an enterprise.

Abstract: A MOSFET disposed between shallow trench isolation (STI) structures includes an epitaxial silicon layer formed over a substrate surface and extending over inwardly extending ledges of the STI structures. The gate width of the MOSFET is therefore the width of the epitaxial silicon layer and greater than the width of the original substrate surface between the STI structures. The epitaxial silicon layer is formed over the previously doped channel and is undoped upon deposition. A thermal activation operation may be used to drive dopant impurities into the transistor channel region occupied by the epitaxial silicon layer but the dopant concentration at the channel location where the epitaxial silicon layer intersects with the gate dielectric, is minimized.

Abstract: A method includes forming isolation features on a substrate, thereby defining an active region on the semiconductor substrate; recessing the active region to form a fin trench; forming a fin feature on the fin trench by growing a first semiconductor layer on the substrate and a second semiconductor layer on the first semiconductor layer; performing a first recessing process; forming a dummy gate stack over the fin feature and the isolation feature; performing a thermal oxidation process to selectively oxidize the first semiconductor layer to form a semiconductor oxide feature on sidewalls of the first semiconductor layer; performing a second recessing process such that a portion of the isolation feature is recessed to below the second semiconductor layer, resulting in a dented void overlying the semiconductor oxide feature and underlying the second semiconductor layer; and forming a gate stack including a gate dielectric layer extending to the dented void.

Abstract: The disclosure generally describes computer-implemented methods, software, and systems for allowing provisioning of open data protocol (OData) services on top of a generic interaction layer (GenIL). One computer-implemented method includes receiving an OData-compliant request for data, determining a GenIL data provider to receive the OData-compliant request for data, determining the memory location of the data, requesting the data from the determined memory location, receiving the requested data from the determined memory location, converting, using at least one computer, the received data into an OData-compliant format, rendering an OData-compliant response, and transmitting the OData-compliant response.

Abstract: Methods are disclosed herein for fabricating integrated circuit devices, such as fin-like field-effect transistors (FinFETs). An exemplary method includes forming a first semiconductor material layer over a fin portion of a substrate; forming a second semiconductor material layer over the first semiconductor material layer; and converting a portion of the first semiconductor material layer to a first semiconductor oxide layer. The fin portion of the substrate, the first semiconductor material layer, the first semiconductor oxide layer, and the second semiconductor material layer form a fin. The method further includes forming a gate stack overwrapping the fin.

Abstract: A semiconductor device and method of formation are provided herein. A semiconductor device includes a fin having a first wall extending along a first plane, the fin including a doped region defining a first furrow on a first side of the first plane. A dielectric is disposed within the first furrow, such that the dielectric is in contact with the first furrow between a first end of the dielectric and a second end of the dielectric. The first end is separated a first distance from the first plane. The dielectric disposed within the furrow increases the isolation of a channel portion of adjacent fins, and thus decreases current leakage of a FinFET, as compared to a FinFET including fins that do not include a dielectric disposed within a furrow.

Abstract: A rolled iron core traction transformer, comprising an iron core (1); the iron core (1) is formed by splicing two symmetrical annealed iron-core closed single frames (1-1); each iron-core closed single frame (1-1) is formed by sequentially coiling continuous silicon steel sheets; the iron-core closed single frame (1-1) has two iron core column single bodies (1-1-1) having approximately semicircular cross sections; the iron core (1) has two iron core columns (1-2) thereon spliced by the iron core column single bodies (1-1-1) and having approximately circular cross sections; each iron core column (1-2) is sequentially provided with a low-voltage T winding (6), a low-voltage F winding (5) and a high-voltage winding (4) thereon from inside to outside; two sides of each high-voltage winding (4) are respectively provided with a first tapping area and a second tapping area; the first tapping area is provided with low-voltage side high-voltage tapping outgoing lines (16); the second lapping area is provided with high

Abstract: This invention relates to a lubricating oil composition and production thereof. The lubricating oil composition comprises a Mannich base represented by the following formula (III) (wherein A and R2 are as defined in the specification) and a lubricant base oil. The lubricating oil composition according to this invention exhibits excellent cleansing and dispersing performance and excellent anticorrosion performance.

Abstract: A system includes reception of a first request for a lock on a lock object, storage of a first entry associated with the first request and the lock object in a queue, determination of a first queue position associated with the first entry based on a first priority level of the first request and on a priority level of each of a plurality of entries in the queue associated with the lock object, determination of whether a predetermined expiration time associated with the first request has expired, and, if it is determined that the predetermined expiration time has expired, deletion of the first entry from the queue.