Abstract: A processor-implemented method is provided for placing and routing a circuit design. A first netlist is generated for the circuit design. Placement is performed for the first netlist on a target programmable integrated circuit (IC) to produce a first placed design. A set of optimizations are performed on the first placed design. The set of optimizations are recorded in an optimization history file. One or more optimizations specified in the optimization history file are performed on the first netlist to produce a second netlist that is different than the first netlist. Placement is performed for the second netlist on the target programmable IC to produce a second placed design that is different than the first placed design. Nets of the second placed design are routed to produce a placed and routed circuit design.

Abstract: A processor-implemented method is provided for placing and routing a circuit design. A first netlist is generated for the circuit design. Placement is performed for the first netlist on a target programmable integrated circuit (IC) to produce a first placed design. A set of optimizations are performed on the first placed design. The set of optimizations are recorded in an optimization history file. One or more optimizations specified in the optimization history file are performed on the first netlist to produce a second netlist that is different than the first netlist. Placement is performed for the second netlist on the target programmable IC to produce a second placed design that is different than the first placed design. Nets of the second placed design are routed to produce a placed and routed circuit design.

Abstract: The embodiments of the present disclosure provide a display and a fabricating method thereof, and a fabricating method of a photosensitive film. The display comprises: a display screen for displaying a picture, and a photosensitive film disposed on a light emergent surface of the display screen, wherein the photosensitive film is configured to automatically adjust corresponding transmittance according to a gray level brightness of the picture displayed by the display screen, and the transmittance of the photosensitive film increases with the increase of the gray level brightness of the picture displayed by the display screen. The display provided by the embodiment of the present disclosure can increase the contrast ratio without changing the existing design, thereby improving the display effect of the display.

Abstract: Some example forms relate to a method of nondestructively measuring a geometry of an electrical component on a substrate. The method includes directing light at the electrical component. The light is at an original intensity. The method further includes measuring light that is reflected off of the electrical component. The reflected light includes undiffracted light and diffracted light. The diffracted light is at a diffracted intensity. The method further includes determining a ratio of diffracted intensity to original intensity and utilizing the ratio to determine a geometry of the electrical component.

Abstract: The disclosure discloses a driver chip, a driver board and a test method thereof, and a display device. The driver chip comprises: a first internal interface; a second internal interface; and a test circuit for performing a short-circuit detection on the internal interfaces, which comprises an input unit and a test unit. The input unit is connected with a test signal input terminal, the test unit and the first internal interface, respectively, and used for transmitting a test signal inputted via the test signal input terminal to the test unit and the first internal interface when in an ON state. The test unit is connected with the second internal interface and a test signal output terminal, respectively, and used for preventing a signal outputted by the input unit from being outputted from the test unit to the test signal output terminal and the second internal interface when in an OFF state.

Abstract: The present disclosure provides a display substrate, a driving method thereof and a display device. The display substrate includes a touch region. Multiple touch electrodes are arranged in columns at the touch region, and the touch electrodes in each column are connected together. At a touch detection stage, the touch electrodes in each column at the touch region are disconnected from the touch electrodes in the other columns, and at a display stage, the touch electrodes in the columns at the touch region are connected together and serve as common electrodes.

Abstract: Described is an apparatus comprising: an input pad; an output pad; a wire, coupled to the input pad and the output pad, the wire positioned at a periphery of a semiconductor die, the wire extending substantially along a perimeter of the semiconductor die; and one or more diodes, coupled at various sections of the wire, and positioned along the perimeter of the semiconductor die and surrounding the semiconductor die.

Abstract: Provided is an intermetallic dielectric layer structure of a silicon-on-insulator device, comprising a silicon-rich oxide layer (54) covering a metal interconnect, a fluorine-silicon glass layer on the silicon-rich oxide layer, and a non-doped silicate glass layer on the fluorine-silicon glass layer; the thickness of the silicon-rich oxide layer (54) is 700 angstroms ±10%; the silicon-rich oxide layer having a greater thickness captures movable ions on an unsaturated bond, such that it is difficult for the movable ions to pass through the silicon-rich oxide layer, thus blocking the movable ions. The present invention has good performance in an integrity evaluation of the gate oxide layer, and avoids damage to the device caused by the aggregation of movable ions at an interface. Also provided are a silicon-on-insulator device and a method of manufacturing the intermetallic dielectric layer of the silicon-on-insulator device.

Abstract: A signal correcting method and a signal correcting device. The signal correcting method includes sampling a signal to be corrected at different sampling times, and comparing a signal value at each of the sampling times in one signal period with a preset signal value corresponding to the sampling time. When the signal value at the sampling time is equal to the corresponding preset signal value, the signal value at the sampling time is kept unchanged. When the signal value at the sampling time is not equal to the corresponding preset signal value, the signal value at the sampling time is corrected to be the preset signal value corresponding to the sampling time.

Abstract: A method including emitting a terahertz beam from a light source at a layer of molding material; detecting a reflectance of the beam; and determining a thickness of the layer of molding material. A system including a panel supporter operable to support a panel including a plurality of substrates arranged in a planar array; a light source operable to emit a terahertz beam at a panel on the panel supporter; a detector operable to detect a reflection of a terahertz beam emitted at a panel; and a processor operable to determine a thickness of a material on the panel based on a time delay for an emitted terahertz beam to be detected by the detector.

Abstract: In an example, a method of implementing a circuit design for an integrated circuit (IC) includes: placing and routing a logical description of the circuit design to generate a physical description having a plurality of paths, and executing a timing analysis to determine a timing profile of the physical description. The method further includes optimizing the physical description by performing a plurality of iterations of: comparing the timing profile with a timing constraint to select a candidate set of paths having negative slack from the plurality of paths in the physical description; and modifying the physical description based on at least one optimization of a selected path from the candidate set of paths having a most negative slack. The method further includes generating a physical implementation of the circuit design for the IC based on the physical description.

Abstract: A gate drive on array unit, a gate drive on array circuit and a display device are disclosed. The gate drive on array unit including: a control module configured to output a clock signal under control of a gate driving signal of a previous stage of gate drive on array unit or a start input signal; an output module connected to the control module and configured to output a high voltage signal (VGH) as a gate driving signal of the present stage under control of the clock signal outputted from the control module, and output a low voltage signal under the control of the clock signal outputted from the control module; and a reset module connected to the output module, and configured to reset the gate driving signal of the present stage under the control of a gate driving signal of a next stage of gate drive on array unit.

Abstract: Embodiments of the present disclosure include tungsten silicide nitride films and methods for depositing tungsten silicide nitride films. In some embodiments, a thin film microelectronic device includes a semiconductor substrate having a tungsten gate electrode stack comprising a tungsten silicide nitride film having a formula WxSiyNz, wherein x is about 19 to about 22 atomic percent, y is about 57 to about 61 atomic percent, and z is about 15 to about 20 atomic percent. In some embodiments, a method of processing a substrate disposed in physical vapor deposition (PVD) chamber, includes: exposing a substrate having a gate insulating layer to a plasma formed from a first process gas comprising nitrogen and argon; sputtering silicon and tungsten material from a target disposed within a processing volume of the PVD chamber; depositing atop the gate insulating layer a tungsten silicide nitride layer as described above; and depositing a bulk tungsten layer atop the tungsten silicide nitride layer.

Abstract: Apparatus and method for optical spectroscopy and/or imaging with a variable fiber offset. An optical probe includes one or more first optical fibers, one or more second optical fibers, and one or more actuators. The first optical fibers are to deliver light to an object. The second optical fibers are to collect light emitted from the object. The actuators are configured to change a distance between the first optical fibers and the second optical fiber while the object is being illuminated by light emitted from the first optical fibers.

Abstract: This disclosure provides high-efficiency and low-energy-consumption synthetic methods of a series of phosphorus-nitrogen-based intumescent flame retardants and the use thereof in paint flame retarding. 1 part by weight of a phosphorization agent and 0.5-4.0 parts by weight of a nitrogen-containing foaming agent are uniformly mixed and stirred at room temperature, and an amount of water is further added to emit heat and initiate reaction. 0.5-3.0 parts by weight of a charring agent and 0.5-4.0 parts by weight of a hydroxy-containing polyfuctional crosslinking agent are then added, and reacted with stirring. An amine compound is finally added for neutralization until pH value is 5-8, and solid liquid separation is performed. The solid portion is dried to obtain a main body portion of a phosphorus-nitrogen-based intumescent flame retardant. The resultant filtrate is diluted with 1/3-2/3 volume of water, and a flame retardant product is obtained.

Abstract: A shift register unit, a shift register and a display apparatus are provided. The shift register unit includes a voltage-boosting module configured to output a first level signal when receiving a gate driving signal sent from the previous stage of shift register unit; a signal output module configured to output a gate driving signal under the control of a first clock signal based on the first level signal output by the voltage-boosting module; a reset module configured to control the signal output module to reset under the control of a reset signal; and a pull-down module configured to pull down the output level of the signal output module under the control of a second clock signal. It is possible to reduce the power consumption of the integrated circuit and avoid the abnormal waveform issue due to the decay of the reset signal by employing the technical solutions of embodiments of the present disclosure.

Abstract: A method including measuring a first distance to a surface of an integrated circuit substrate or a portion of an integrated circuit package by measuring an angle to it from two known points; introducing a material onto the surface; measuring a second distance to a surface of the film from the two known points; and determining a thickness of the introduced material by subtracting the second distance from the first distance.

Abstract: Embodiments include devices, systems and processes for using a white light interferometer (WLI) microscope with a tilted objective lens to perform in-line monitoring of both resist footing defects and conductive trace undercut defects. The defects may be detected at the interface between dry film resist (DFR) footings and conductive trace footing found on insulating layer top surfaces of a packaging substrate. Such footing and undercut defects may other wise be considered “hidden defects”. Using the WLI microscope with a tilted objective lens provides a high-throughput and low cost metrology and tool for non-destructive, non-contact, in-line monitoring.

Abstract: Disclosed an apparatus for adjusting a voltage at a common electrode, including: a signal processing module configured to superpose a pixel voltage value of a pixel unit and a voltage value of a common electrode and output a superposed signal; a comparison module configured to receive the superposed signal output from the signal processing module, compare the superposed signal with a voltage at a ground terminal, and output a control signal; and a driving module configured to receive the control signal output from the comparison module and adjust the voltage value of the common electrode by the control signal. Also disclosed is a method for adjusting a voltage at a common electrode. The present disclosure can obtain a stable voltage at a pixel electrode and avoid flickers in pictures, and in turn the voltage at the common electrode can be adjusted automatically, which saves the human resource and increases working efficiency.

Abstract: An array substrate, a method for fabricating the same and a display device as provided relate to the field of display technologies and can overcome the disadvantage of the gate-source capacitance being inconstant and prevent screen flicker, thereby improving the display effect of the display device. The array substrate comprises a plurality of pixel units (31) arranged into an array and a gate line (32) and a data line (33) disposed as intersecting each other and corresponding to each of the pixel units (31), each of the pixel units comprising a TFT region (311) and a pixel electrode region (312), the TFT region (311) comprises at least two TFTs (34, 35); a source electrode (341, 351) of each of the TFTs is electrically connected to the data line (33), a gate electrode (342, 352) of each of the TFTs is electrically connected to the gate line (32), a drain electrode (343, 353) of each of the TFTs is electrically connected to a pixel electrode (312).