Patents by Inventor Zigmund Ramirez Camacho

Zigmund Ramirez Camacho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CONNECTION SUPPORTS AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120133036
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a connection structure having a component pad, an outer pad, and an inner pad, the inner pad between the component pad and the outer pad; forming a support structure between the inner pad and the outer pad; mounting an integrated circuit device over the component pad; attaching an interconnect to the integrated circuit device and the outer pad, the interconnect above the inner pad and supported by the support structure; and applying an encapsulation over the connection structure, the interconnect, and the integrated circuit device.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120104585
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming signal contacts; forming a power bar having a power bar terminal, the power bar terminal formed in a staggered position relative to the signal contacts; depositing a terminal pad on the power bar terminal; depositing a contact pad on one of the signal contacts; coupling an integrated circuit die to the power bar terminal and the signal contacts; and forming a package body on the integrated circuit die.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 3, 2012
    Inventors: Emmanuel Espiritu, Henry Descalzo Bathan, Zigmund Ramirez Camacho
  • Integrated circuit package system with leadfinger
    Patent number: 8148825
    Abstract: An integrated circuit package system includes: providing a lead terminal; forming a dummy lead near the lead terminal; positioning a base integrated circuit adjacent the lead terminal and the dummy lead; connecting a die connector to the base integrated circuit and the dummy lead; mounting a stackable integrated circuit over the base integrated circuit; and connecting another of the die connector to the stackable integrated circuit and the dummy lead.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: April 3, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: Zigmund Ramirez Camacho, Lionel Chien Hui Tay, Jairus Legaspi Pisigan, Jeffrey D. Punzalan
  • Integrated circuit package system with leaded package and method for manufacturing thereof
    Patent number: 8148208
    Abstract: A method for manufacturing an integrated circuit package system includes: providing a frame; attaching a leaded package having leads adjacent the frame wherein the leads extend towards a side opposite the frame; and applying a package encapsulant over the leaded package having the leads partially exposed opposite the frame.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: April 3, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERLOCK AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120074548
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package paddle; forming a lead adjacent the package paddle, the lead having a lead overhang protruding from a lead non-horizontal side and a lead ridge protruding from the lead non-horizontal side; mounting an integrated circuit over the package paddle; connecting an electrical connector to the lead and the integrated circuit; and forming an encapsulation over the integrated circuit, the lead, and the package paddle, the encapsulation under the lead overhang.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH DIE PADDLES AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120068363
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a package paddle group having a first package paddle electrically isolated from a second package paddle; attaching an integrated circuit device on the first package paddle and the second package paddle; forming a standoff terminal adjacent the package paddle group and electrically connected to the integrated circuit device; connecting a paddle connector to the integrated circuit device and the first package paddle and another paddle connector to the integrated circuit device and the second package paddle; and forming an encapsulation over the integrated circuit device, the first package paddle, the second package paddle, and the standoff terminal, the encapsulation exposing a portion of the first package paddle, the second package paddle, and the standoff terminal.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PADDLE MOLDING AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120068318
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle having a hole, a recess, and a pad, the hole over the recess; mounting an integrated circuit to the package paddle; forming a lead having a bottom surface coplanar with a bottom surface of the pad, the lead isolated from the package paddle; attaching connectors directly on the integrated circuit, the lead, and the package paddle; and forming an encapsulation covering the integrated circuit and within the hole and the recess.
    Type: Application
    Filed: September 16, 2010
    Publication date: March 22, 2012
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu
  • Integrated circuit packaging system with an intermediate pad and method of manufacture thereof
    Patent number: 8138595
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an elevated contact above and between a lead and a die pad that is coplanar with the lead; connecting an integrated circuit and the lead; attaching a jumper interconnect between the elevated contact and the lead; and forming an encapsulant over the integrated circuit, the lead, the die pad, the elevated contact, and the jumper interconnect, the encapsulant having a recess in a base side with the elevated contact exposed in the recess and the lead exposed from the base side.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: March 20, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Emmanuel Espiritu, Henry Descalzo Bathan
  • Integrated circuit package system with multi-planar paddle
    Patent number: 8138586
    Abstract: An integrated circuit package system includes a multi-planar paddle having an uplift rim and an attached integrated circuit over the uplift rim of the multi-planar paddle.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 20, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Arnel Trasporto, Sze Min Wong, Henry D. Bathan, Zigmund Ramirez Camacho
  • METHOD OF MANUFACTURE OF INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED INTEGRATED CIRCUIT
    Publication number: 20120064668
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming a base lead having an outer protrusion and an inner protrusion with a recess in between; forming a stack lead having an elongated portion; mounting a base integrated circuit over the inner protrusion or under the elongated portion; mounting the stack lead over the base lead and the base integrated circuit; connecting a stack integrated circuit and the stack lead with the stack integrated circuit over the base integrated circuit; and encapsulating at least a portion of both the base integrated circuit and the stack integrated circuit with the base lead and the stack lead exposed.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Inventors: Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Henry Descalzo Bathan
  • Integrated circuit package system with concave terminal
    Patent number: 8134242
    Abstract: An integrated circuit package system includes: connecting a concave terminal and an integrated circuit; and forming an encapsulation, having a bottom side, over the integrated circuit and the concave terminal with the concave terminal within the encapsulation.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: March 13, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: Zigmund Ramirez Camacho, Arnel Senosa Trasporto, Reza Argenty Pagaila, Lionel Chien Hui Tay
  • Integrated circuit package system with package encapsulation having recess
    Patent number: 8129827
    Abstract: An integrated circuit package system includes: forming an external interconnect; connecting an integrated circuit die and the external interconnect; forming a package encapsulation, having a recess, covering the integrated circuit die with a portion of the external interconnect exposed by the recess; and connecting an integrated circuit device and the external interconnect in the recess.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: March 6, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Jairus Legaspi Pisigan, Abelardo Jr Hadap Advincula
  • Integrated circuit package system with die on base package
    Patent number: 8120156
    Abstract: The present invention provides an integrated circuit package system with die on base package comprising forming a base package comprising, forming a substrate, mounting a first integrated circuit on the substrate, encapsulating the integrated circuit and the substrate with a molding compound, and testing the base package, attaching a bare die to the base package, connecting electrically the bare die to the substrate and encapsulating the bare die and the base package.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: February 21, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry D. Bathan, Arnel Trasporto, Jeffrey D. Punzalan
  • Integrated circuit package system with dual connectivity
    Patent number: 8120150
    Abstract: An integrated circuit package system includes: forming a die-attach paddle, a terminal pad, and an external interconnect with the external interconnect below the terminal pad; connecting an integrated circuit die with the terminal pad and the external interconnect; and forming an encapsulation, having a first side and a second side at an opposing side to the first side, surrounding the integrated circuit die with the terminal pad exposed at the first side and the external interconnect extending below the second side.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: February 21, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Guruprasad Badakere Govindaiah, Zigmund Ramirez Camacho, Jeffrey D. Punzalan, Henry Descalzo Bathan, Lionel Chien Hui Tay
  • Integrated circuit package system
    Patent number: 8120149
    Abstract: An integrated circuit package system is provided forming a lead finger from a padless lead frame, forming a lead tip hole in the lead finger, mounting an integrated circuit die having a solder bump on the lead finger, and reflowing the solder bump on the lead tip hole of the lead finger.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: February 21, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry D. Bathan, Arnel Trasporto, Jeffrey D. Punzalan
  • Integrated circuit package system with thin profile
    Patent number: 8115305
    Abstract: An integrated circuit package system is provided including attaching an external interconnect on a tape; attaching a backside element on the tape adjacent to the external interconnect; attaching an integrated circuit die with the backside element, the backside element is on a first passive side of the integrated circuit die; connecting a first active side of the integrated circuit die and the external interconnect; and forming a first encapsulation over the integrated circuit die with the backside element exposed.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: February 14, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Abelardo Hadap Advincula, Lionel Chien Hui Tay
  • Integrated circuit packaging system with dual row lead-frame having top and bottom terminals and method of manufacture thereof
    Patent number: 8115287
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming outer leads having outer terminal sections, the outer terminal sections having an upper terminal and a bottom terminal; forming inner leads having inner terminal sections wider than a distance between the outer terminal sections of the outer leads, and the inner terminal sections have an upper terminal and a bottom terminal; connecting an integrated circuit to the inner leads and the outer leads; and encapsulating the integrated circuit, the inner leads, and the outer leads with an encapsulation while leaving the upper terminals and the bottom terminals of the outer terminal sections and the upper terminals and bottom terminals of the inner terminal sections exposed from the encapsulation.
    Type: Grant
    Filed: December 10, 2009
    Date of Patent: February 14, 2012
    Assignee: STATS ChipPAC Ltd.
    Inventors: Zigmund Ramirez Camacho, Abelardo Jr. Hadap Advincula, Erwin Aguas Sangalang, Lionel Chien Hui Tay
  • Integrated circuit packaging system with a dual substrate package and method of manufacture thereof
    Patent number: 8106499
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a base substrate having a base conductive material on opposite sides of the base substrate; connecting an internal interconnect having a substantially spherical shape on the base substrate; forming a top substrate having a top conductive material on opposite sides of the top substrate with an upper component thereon facing the base substrate; and attaching the top substrate on the internal interconnect.
    Type: Grant
    Filed: June 20, 2009
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Jairus Legaspi Pisigan
  • Integrated circuit packaging system with plated pad and method of manufacture thereof
    Patent number: 8106502
    Abstract: A method of manufacture of an integrated circuit packaging system includes: forming an external interconnect; forming a first planar terminal adjacent to the external interconnect and non-planar to a portion the external interconnect; mounting a first integrated circuit over the first planar terminal; connecting the first integrated circuit with the external interconnect; and forming an encapsulation over the first planar terminal covering the first integrated circuit and with the external interconnect extending from a non-horizontal side of the encapsulation and with the first planar terminal coplanar with the adjacent portion of the encapsulation exposing the first planar terminal.
    Type: Grant
    Filed: November 17, 2008
    Date of Patent: January 31, 2012
    Assignee: Stats Chippac Ltd.
    Inventors: Henry Descalzo Bathan, Zigmund Ramirez Camacho, Jairus Legaspi Pisigan, Lionel Chien Hui Tay
  • INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISLAND TERMINALS AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20120018866
    Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a package paddle having an upper hole below a paddle top side, the upper hole bounded by an upper non-horizontal side with a curve surface; forming a terminal adjacent the package paddle; mounting an integrated circuit on the paddle top side; and forming an encapsulation within the upper hole.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 26, 2012
    Inventors: Zigmund Ramirez Camacho, Henry Descalzo Bathan, Emmanuel Espiritu, Byung Tai Do, Arnel Senosa Trasporto, Linda Pei Ee Chua