Method and apparatus for optical waveguide-to-semiconductor coupling for integrated photonic circuits
A grating coupler couples a waveguide to a beam and is formed of patterned shapes in a first and second layer of planar material, the shapes embedded in background material, the layers separated by less than one wavelength. The shapes are organized as a plurality of adjacent unit cells arranged along a direction of propagation of light with each unit cell including a shape of the first material and a shape of the second material, each unit cell having design parameters including a period, a width wb of the shape of first planar material, a width wt of the shape of second planar material, and an offset between the shapes. The coupler has a directivity ratio D is at least 10 dB between “up” and “down” radiation; and unit cells differ in at least one parameter selected from period, wb, wt, and offset to provide a predetermined beam shape.
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The present document claims priority to U.S. Provisional Patent Application 62/311,358 filed 21 Mar. 2016, and U.S. Provisional Patent Application 62/311,355 filed 21 Mar. 2016. The entirety of the aforementioned patent applications are incorporated herein by reference.
GOVERNMENT INTERESTThis invention was made with government support under grant number HR0011-11-C-0100 awarded by DOD/DARPA, and ECCS1128709 awarded by National Science Foundation. The government has certain rights in the invention.
TECHNICAL FIELDThe present document relates to the field of integrated circuits having integrated optical devices and, in many embodiments, electronic devices on the same die. In particular embodiments, the integrated optical devices include optical waveguides and other optical components on a same die as CMOS circuitry.
BACKGROUNDThere are many applications, including cameras, optical data transmitters, and optical data receivers, where electronic circuitry and optical devices are combined on a single integrated circuit.
It is also widely known that a significant limitation of modern processors and system-on-a-chip design is data transfer between functional units on a very large-scale integrated (VLSI) circuit; where distributed resistance and capacitance of interconnect may significantly limit data rates. An electro-optical interconnect may help solve this limitation on data rates. Further, many VLSI-based system designs suffer limitations on data rate due to the resistance of bondpad drivers and capacitance of chip-to-chip interconnect; electro-optical interconnects may prove a solution to this problem also. Furthermore, the energy per bit transferred of electronic interconnects may place a power budget limitation on the operation of an electronic microchip. Electro-optical interconnects may enable lower energy per bit interconnects. Finally, electrical interconnects may incur electrical cross-talk between adjacent wire lines that limits the spatial bandwidth density of interconnection to/from a chip. Optical interconnects may employ dense wavelength division multiplexing (DWDM) to achieve orders of magnitude higher bandwidth density without incurring significant cross-talk penalties.
Integrated photonics, including silicon photonics, has potential to enable electronic-photonic circuits with advanced optical signal processing functions and capabilities. One important area of application is energy-efficient photonic links for processor to memory chip communication, as well as chip-to-chip and on-chip interconnects. Other applications include active optical cables for rack-to-rack interconnects, transmitters and receivers for 100 Gbps Ethernet and beyond, as well as applications such as sensing, imaging (e.g. optical coherence tomography, etc.) and image/video projection applications, beam steering, and visible light biophotonic chips for high throughput biotechnology applications.
Integrated and silicon photonics typically employ customized fabrication processes. For silicon photonics, this typically means using silicon-on-insulator (SOI) wafers with a thick-oxide thickness of 2-3 microns, and materials and/or lithography and process steps that are tailored to photonics, these process modifications are not compatible with high density microelectronics.
Microelectronics, on the other hand, relies on carefully optimized complementary metal oxide semiconductor (CMOS) processes, such as those used for microprocessors and dynamic random access memory (DRAM) chips. Key potential applications for photonic integrated circuits include communications between state of the art CMOS logic chips including microprocessors and DRAM memory chips; optical interfaces to network processing chips, as well as other aspects of communications systems and mixed electronic-optical signal processing chips. CMOS-SOI (CMOS processes using silicon on insulator substrates) processes that include transistors usually are also optimized for microelectronics. Exceptions are SOI silicon photonics processes which usually do not support transistor integration, especially not advanced-node (e.g. sub 65 nm) transistors.
Efficient optical fiber to on-chip waveguide coupling, and photonic vias for chip to chip, die to die, or layer to layer communication within a chip/die, are also desirable in photonic chips with applications in communications, cameras, and other devices fabricated using CMOS and CMOS-SOI electronics processes (examples including GlobalFoundries GFUS 45RFSOI and 12SOI 45 nm and 32SOI 32 nm SOI processes, and e.g. 10LPe 65 nm bulk CMOS (all formerly IBM)), as well as custom photonics (e.g. IMEC ISIPP50G, LETI and IHP as accessible e.g. through the Europractice IC portal; AIM Photonics Institute (Albany, N.Y.) Passives and Actives silicon photonics processes as of this writing, IME Singapore, and others), and custom electronics-photonics processes (such as processes co-developed by Luxtera, Inc. and Freescale).
Three-dimensional (3D) die stacking results in chips having multiple die bonded together. An example is the Hybrid Memory Cube (HMC) (Trademark of Hybrid Memory Cube Consortium, Beaverton, Oreg.) technology for stacked memory chips. Electrical power and communication between dies in the stack may be done off-chip via wire bonding, or using through silicon vias (TSVs). Optical interconnection between device layers of several stacked die chips may prove an alternative to electrical interconnections.
SUMMARYA grating coupler couples a waveguide to a beam and is formed of patterned shapes in a first and second device layer of planar material, the shapes embedded in background material, the layers separated by less than one wavelength. The shapes are organized as a plurality of adjacent unit cells arranged along a direction of propagation of light with each unit cell including a shape of the first material and a shape of the second material, each unit cell having design parameters including a period, a width wb of the shape of first planar material, a width wt of the shape of second planar material, and an offset in the plane between the shapes. The coupler has a directivity ratio D of least 10 dB between “up” and “down” radiation; and unit cells differ in at least one parameter selected from period, wb, wt, and offset to provide a predetermined beam shape.
We provide an optical coupler adapted to radiate a unidirectional beam of a desired field distribution shape in the beam cross-section, which in some embodiments is a Gaussian field distribution, from an in-plane guided wave excitation on an optical or optoelectronic integrated circuit chip. Radiation out of plane is provided by the “array antenna” behavior of a grating structure as shown in
In the grating structures shown in
The array of grating bars with associated polarization currents (currents due to perturbation of a guided wave by index changes that change a uniform waveguide cross-section into the grating) acts like a phased array antenna and radiates in the direction in which the elements are in phase. In a conventional grating coupler patterned in a single device layer with symmetry about a plane passing through the plane of the waveguide circuit, the grating radiation pattern is exactly symmetric for output radiation into the up and down directions perpendicular to a plane of the grating bars and the waveguide circuit. Even for a grating coupler that does not have a perfect symmetry about a plane passing through the plane of the waveguide circuit, but is patterned by a single mask, often there is likewise approximately a symmetric radiation pattern, depending on the material layer stack. This symmetry limits efficiency of radiating into one beam above or below the chip to about 50% (−3 dB), since the other 50% of incident power goes in the opposite direction. Another 1 dB of loss in uniformly periodic structures can be attributed to the mode mismatch between the exponential radiated field and the Gaussian fiber mode or other target beam shape. To break this up/down symmetry, previous work has used various approaches including metallic or dielectric stack mirrors integrated into the device, and required additional processing steps to be integrated into the photonic chip, or required more expensive, custom specialty silicon and/or silicon-on-insulator wafers with dielectric mirrors, which add to processing costs and complexity.
An exemplary embodiment of a prior art structure that has approximately symmetric radiation pattern, and thus shows poor directivity is illustrated in
In general, grating couplers disclosed herein comprise a grating coupler structure comprising an array of scattering unit cells, a waveguide port, and a beam port. The waveguide port is in-plane and typically formed in one or more of the device layers used to form the grating coupler structure, and can be used as an input or output. The beam port is above the grating coupler for devices designed to couple to upward radiation, and below the grating coupler for devices designed to couple to downward radiation. The beam port may interface with an optical fiber mode of an abutted optical fiber or fiber array, or may be an optical beam mode that traverses a distance in air or background materials prior to coupling to an optical fiber or interfacing to another optical device.
In an embodiment of the invention, we replace each element of the grating by a pair of “scatterers”, the two scatterers forming a unit cell and the unit cells forming an array that may be periodic, quasi-periodic or not periodic. We first consider the case of a periodic array, although the inventive embodiments specifically call for an aperiodic array. We consider the periodic array, because the properties of a single unit call can be understood by considering it as part of an infinite array—and those properties utilized to synthesize an optimal aperiodic array. Thus, we break the design into two parts—an array pattern (periodic array) and an element pattern (the two scatterers inside a single unit cell). The radiation from the complete periodic array of such unit cells can be thought of as the multiplication of these two radiation patterns (radiation vs. angle) or convolution in space. The unit cell is shown in
Similar structures can be made to operate with vertical spacing other than a quarter wavelength vertical spacing between the two layers of weak scatterers, however other design parameters, including horizontal offset between shapes of the two layers, may require adjustment for appropriate function. Here, the quarter wavelength spacing refers to the wavelength in the medium, equal to the free-space wavelength divided by the refractive index. In a weakly scattering structure, the refractive index of the background medium or material stack and scatterers may be similar so this wavelength in the medium is well defined. In the case of strong scatterers, the refractive index of the scatterers and the background medium or materials in a background material stack, may differ substantially, i.e. have high index contrast. Low index contrast (weak scattering) may be considered <1% index change. High index contrast refers to refractive index differences between one index and another that represent small turn radii for waveguides, and tight confinement in the cross-section on the sub-wavelength scale of the wavelength in the core material. Material system examples include silicon nitride (SiN) core with silica cladding (n=1.9 or 2.4 core and n=1.45 cladding), silicon with silica (3.5:1.45) or silicon nitride (3.5:2.0) cladding. In other words, high index contrast typically refers to 10% or greater difference between refractive indices and often 50-200% relative index difference. (For purposes of our designs we will further restrict this definition, below.) In this case, the wavelength in the medium inside the grating is not well defined. An approximation can be made by taking an average permittivity (square index) of the medium, weighted by the electric field distribution (index where light is thereby having higher weighting). However, such approximations will in general provide approximations. Nevertheless, the vertical spacing of an “effective” quarter wavelength is what defines the vertical distance between the two patternable device layers, and is on the order of the wavelength or less. In such a particular embodiment, vertical spacing between the scatterers is less than one wavelength λ of the light.
Because our designs also require scatterers in the vertical direction spaced by an effective quarter wavelength, and hence waveguides with approximately a critical angle of the waves inside the core above 45 degrees to allow similar horizontal and vertical length scales for interference, this limits the refractive index contrast of interest further. With critical angle for optical reflection under oblique incidence defined as θc=arcsin(ncladding/ncore) with ncore and ncladding the high and low refractive indices of the waveguide wall, for a 45° angle, an index contrast ncore/ncladding above 1.41, or above 41% is needed. Thus, for a silica cladding of 1.45, core indices above ncore=1.45×1.41=2.05 are preferable for the grating formation. Furthermore, since a grating is partially core material and partially cladding, there is also low index cladding material, which suggests even higher preferable core indices. The guided waveguide mode at the grating coupler input and within the grating may also need to be considerably below the critical angle to provide strong confinement, another reason to aim for core materials that provide even higher critical angle, i.e. index. This means preferable materials for the two layers are silicon (crystalline or polycrystalline), and potentially high index dielectrics such as silicon rich silicon nitride and silicon carbide that can have index as high as 2.4, and III-V materials. Materials with lower core index may provide some aspects of the suggested functions but at reduced performance. Hence, by high index and high index contrast we will typically refer to materials above 2.05 to 2.4 refractive index, and more preferably above 2.4, when surrounded by silica cladding (n=1.45), and corresponding fractional index contrasts in other material backgrounds.
Efficient Couplers
However, this does not solve the problem of forming a Gaussian beam at the same time as ensuring directional radiation. The challenge is nontrivial because beamforming—whether a Gaussian beam or another desired beam shape—requires control by design of the scattering strength of the elements of the grating array along the array as a function of position. Gratings that radiate in a single direction, and change strength along the propagation direction without altering the angle of radiation, are nontrivial to design. State of the art techniques involve using brute force global optimization, such as genetic algorithms. These techniques require large computational power, and have yielded couplers with efficiency limited to 1 to 2 dB even in the best cases reported, obtained after years of improvements, and worse (3-5 dB) in common use in silicon photonics.
If one is to approach 100% efficiency, and combat both the directionality and the mode matching problem simultaneously, it is necessary to create a “tapered grating” structure that can emit a tailored (e.g. Gaussian) beam shape, but also employs the unidirectional element designs in
We provide herein a rigorous, systematic approach and designs of high efficiency couplers that accomplish these requirements.
Before we consider this design method for high efficiency couplers, we illustrate three different situations of scatterers, which provide novel grating coupler designs, i.e. embodiments of the invention. In
In a second situation (
In a third situation (
In general, scatterers are perturbations, so if the grating unit cell, in comparison to the unperturbed waveguide, has a region of material where index is increased, such as a region of oxide in the waveguide changed to silicon, showing as an extra thickness of silicon material on top of the waveguide forming a grating, this is a positive index perturbation, and another region where index is decreased, such as an etched out silicon trench replaced by silica, the index perturbation is negative. We will employ these guidelines to provide efficient designs of simultaneously unidirectional and beamforming (i.e. custom beam shape) couplers for different waveguide geometries.
This document describes on-chip, waveguide excited, out-of-plane beam formers that are formed from two device layers. These may be silicon, or another material or combination of materials. The key property is that they provide scattering that is controllable by design from one unit cell to another. Since silicon has a high refractive index and scatters strongly when surrounded by silica, and is a common photonic integrated circuit material, we use it as the example system. To form the directional array element, we utilize two patterned device layers. This is commonly present in CMOS SOI electronics processes, as shown in
In embodiments presented here, two high index material layers of similar refractive index and thickness are used (both silicon, both 50-100 nm thick in the present example), in order to allow equal scattering from the two shapes in the unit cell—one in each of the top and bottom layers—the equal scattering permitting destructive interference and thus high directivity of a unit cell. Material layers of lower refractive index than silicon may be used, but high index well above 2.05-2.4 is needed for high performance due to the quarter-wave interference in both directions. Different refractive indices of the two material layers may be utilized, and compensated by differences in thickness. However, materials of too low a refractive index will result in low directivity. Using two silicon layers, we show directivities of unit cells up to 10000:1 (
A Gaussian desired profile (or another desired beam shape) (Taillaert, Peter Bienstman, and Roel Baets, “Compact efficient broadband grating coupler for silicon-on-insulator waveguides,” Opt. Lett. 29, 2749-2751 (2004)), provides the desired scattering strength α(x) vs. position along the grating. The designer's job is to find the 4 parameters above for each unit cell to realize that scattering strength distribution to the degree possible, while maintaining the radiation angle and high directivity.
In one embodiment of the invention, we provide a grating coupler formed by two device layers, each device layer defining scatterers as shown in
Beam Parameters
For Gaussian beams, beam power drops off to each side of a central beam axis. For purposes of this document, Mode Field Diameter (MFD) is, for a Gaussian beam, the width between two points on opposite sides of the beam axis at which electric field strength of the beam drops from a central peak-power value to 1/e times the peak power value. The beam angle θ is the angle, relative to a perpendicular to the plane defined by the scatterers, at which the central beam axis leaves the coupler. The point at which the central beam axis intersects the plane defined by the scatterers of a grating coupler is the peak power emissions point of the grating coupler. The beam angle θ is positive if the beam axis leaves the coupler upward or downward heading away from the input waveguide; negative if the beam axis leaves the coupler upward or downward heading toward the input waveguide; and zero if the beam is surface normal.
In a focusing-beam embodiment, portions of the coupler adjacent the waveguide have a beam angle θ1 greater than one and approximately two degrees different than the beam angle θ2 of portions of the coupler furthest from the waveguide to produce a converging beam that can, in principle, focus on an end of an optical fiber, another coupler, or on a fixed point in space above/below the grating surface. In a particular focusing-beam embodiment, a third cell at the coupler center has a nominal beam angle midway between θ1 and θ2 with a uniform tapering of nominal beam angle across the coupler. Such an embodiment may produce a focusing shaped beam, such as a Gaussian beam, by having the third cell provide stronger scattering than a first and a second unit cell that are in the portions with beam angle θ1 and beam angle θ2, respectively. This is in addition to providing the third unit cell with high directivity, along with high directivity in the portions with beam angle θ1 and beam angle θ2.
Designing the Grating
A method for synthesizing a structure that emits a simultaneously unidirectional and tailored beam shape beam (in particular, e.g. Gaussian) consists of the following. We use a rigorous photonic band structure solver that is capable of taking in a real frequency (corresponding to a free-space wavelength) and outputting a complex-propagation-constant (momentum) eigenvalue. The solver must support radiation absorbing boundary conditions (one option being perfectly matched layers). A suitable band structure solver has been reported in Finite-difference complex-wavevector band structure solver for analysis and design of periodic radiative microphotonic structures by Jelena Notaros and Miloš A. Popović, Optics Letters, Mar. 15, 2015/Vol. 40, No. 6. This solver is based on a finite-difference method on a split Yee grid. Input to the solver is a description of the structure to be simulated (refractive index distribution of the cross-section of a unit cell, and frequency i.e. free-space wavelength of operation) and output is the complex wavevector and field distribution in the unit cell. Notably, modes are computed even in bandgaps, which traditional band solvers, with wavevector input, exclude. This is one possible solver, and other types can be utilized that provide the same or similar information, including the type described in G. Lecamp, J. P. Hugonin, and P. Lalanne, “Theoretical and computational concepts for periodic optical waveguides,” Opt. Express 15, 11042-11060 (2007). Since these solvers use Bloch-Floquet type boundary conditions to solve Maxwell's equations over a unit cell of the structure in order to solve for optical modes of periodic structures, they may be referred to as Bloch mode solvers.
To set the stage for a design, the target operating wavelength, material stack including layer thicknesses and refractive indices at the target wavelength, output beam angle, and desired direction of exiting beam (up or down), are selected. A variable unit cell with four parameters is chosen that vary the scattering strength of the top and bottom shape, their offset (wo) and the local period Λ (which is equivalent to unit cell width, but corresponds to period in a special case when unit cells are identical and the array is periodic). In this example, we select only silicon shape width control for the top (wt) and bottom (wb) shape scattering strength design, but other options are possible as described elsewhere in this disclosure.
The band solver is used to compute the scattering strength, a, the directionality, D (a ratio of power radiated up divided by power radiated down), and primary off-normal output radiation angle, θ, in a unit cell. We obtain these three variables as a h directivities function of the 4-dimensional space (wt, wb, wo and Λ; see
Such high directivities allow grating couplers with overall high device directivity to be achieved without the need to use bottom mirrors, or even small partial reflections off the buried oxide-silicon wafer interface, a common technique in silicon photonics to reflect additional light to constructively interfere with up radiated light and slightly improve efficiency. There are several downsides of such techniques. First, they are very sensitive on the thickness of the buried oxide separating the grating coupler device layer(s) and the silicon wafer. Since this thickness can be 2-3 microns, its uncertainty can be several 10's to 100 nm, which can provide significant inefficiency. Furthermore, if there is error in the grating coupler beam output angle due to in-plane dimensional fabrication variations (over/under etch, refractive index error, device layer thickness error, etc.), with a new output angle a bottom mirror approach can provide significant efficiency loss. Finally, there exist approaches to monolithic integration of silicon photonics with advanced CMOS node microelectronics (J. S. Orcutt, et al., “Open foundry platform for high-performance electronic-photonic integration,” Opt. Express 20, 12222-12232 (2012)) that call for the removal of the silicon substrate in photonic device regions, and that may utilize grating couplers coupling light to fiber downward toward the substrate (i.e. in the direction where there used to be a substrate before removal). In this case, the partial mirror at the substrate interface lacks the silicon substrate and is weak (air-silica interface) or non-existent in the case index matching is used. Therefore, with high directivity unit cells with D>10 dB, and up to 20-40 dB as shown in
High directivity occurs in an approximately X shaped region in
Furthermore, the “high directivity ridge” contours in
Referring to our discussion of types of pairs of perturbation in the unit cell in
In embodiments of the invention, we provide each of the Type A, B, C or D designs, where a grating is synthesized by starting with a desired beam distribution, deriving the needed grating strength, using a mode band structure solver to generate scattering strength/directivity maps such as in
An example can illustrate the synthesis process briefly. Consider the desired Gaussian beam shape of a particular beam width shown in
Suppose, instead that we chose a Type B Inverted design, the above process would be the same but we would be using for example points B1 to B3 to select low to high scattering strengths.
This map does not cover the full parameter range for Type C and D designs, but the locations of equivalent C1 to C3 and D1 to D3 points are indicated in
For example, in
In
Features of the monotonic tapering of the parameters of unit cells in the designs in
An advantage of the Type B design over Type A is as follows. In CMOS SOI technology, the top layer is poly silicon, which attenuates light. Type B design has no polysilicon in the input waveguide, and further very little polysilicon in the beginning of the grating. Wide top layer, i.e. polysilicon, shapes are introduced only when needed to provide the strong directional scattering. However, a down side of design Type B (
For the purposes of these descriptions, we define a difference in unit cells to refer to a pair of unit cells where at least one cell parameter in a first and a second unit cell has a different value. We define monotonic variation as an array of at least three unit cells, defining two differences in a parameter, for example the width difference between unit cell 1 and unit cell 2, and the difference between unit cell 2 and unit cell 3. A monotonic variation in such an array means that the difference in parameter from one pair of adjacent cells to the next is of the same sign (>0 or <0). In the disclosed grating designs, typically at least three, but usually at least a group of several—or all—unit cells have a monotonic variation in at least one parameter. In
The following table summarizes the performance of these example designs. “Poly-body interfacing design” refers to the Type A design in
The Type A and B designs are particularly important for silicon photonics applications, and those utilizing two silicon device layers. This is because typically a bottom silicon layer can be crystalline silicon while a top silicon layer is typically polysilicon if the two layers are independently patternable. The Type B (inverted) design is particularly important for CMOS SOI applications because it terminates in the bottom silicon layer, which is crystalline silicon in CMOS SOI and allows low loss waveguides, while the top silicon is polysilicon which is typically lossy, having losses typically 50-150 dB/cm. The grating is short enough for the optical field to not experience significant loss or. attenuation from the polysilicon, during its propagation through the coupler, but use of the polysilicon is often avoided for waveguiding. Use of the polysilicon within the grating coupler structure does not impair coupler efficiency significantly due to the short length of the coupler. For example, even if polysilicon loss were 100 dB/cm, and duty cycle of use of the polysilicon in the coupler reduced that effectively to about 50 dB/cm, the typical grating coupler length of 10-20 microns means that a signal travels about 10 microns on average within the plane of the coupler leading to 50 dB/cm×0.001 cm=0.05 dB or 1% loss. Note that the Type B (Inverted) design in
Type C Inverted #2 designs mate to an input waveguide on the top layer only. They could be useful in photonic integrated circuits where, for example, the top waveguide is a formed in a low-loss high index dielectric material such as. silicon rich silicon nitride, silicon carbide, chalcogenide glass, etc., disposed above a crystalline silicon bottom layer, where the bottom Si layer is used to provide directionality in grating regions, with bottom shapes in silicon and top shapes in the high index dielectric, but the primary waveguide is implemented in the top layer low-loss dielectric.
A Type C design can be considered to have all the properties of a Type B design when in the Type B design the two device layers including the patterns on them are interchanged.
Thus in an embodiment of the invention, the top layer silicon width increases while the bottom layer silicon width decreases along the grating. Equivalently, scatterer strengths increase along the grating if one considers a silicon (positive) scatterer in the top layer, and a gap (negative) scatterer in the bottom layer.
Different approaches can be used that use predetermined changes in width of silicon to modulate scattering strength including transverse segmentation with different fill factors, as shown in examples in
A grating coupler alone, if linear, couples light from an out of plane beam or fiber to a wide input waveguide. It is known in the art that such waveguides can be mated to narrow single mode waveguides using adiabatic in-plane waveguide tapers which provide mating at low to negligible cost in optical losses. This approach can connect Type B and C designs to single mode waveguides. It can also connect a Type A grating coupler design to a single mode waveguide comprising a stack of polysilicon and body silicon. Alternatively, a dual taper could be designed to transition from a wide waveguide with two silicon layers to a narrow waveguide with a single silicon layer, in order to couple a Type A design into a bottom layer, crystalline silicon waveguide only.
The example embodiments described above specify silicon top and bottom layers, due to their utility in silicon photonics and CMOS process technology, but any high index materials could be used for the two layers. The concepts also work in a uniform background material, or with the scatterers embedded in a material layer stack (as e.g. shown in examples in
Changes may be made in the above methods and systems without departing from the scope hereof. It should thus be noted that the matter contained in the above description or shown in the accompanying drawings should be interpreted as illustrative and not in a limiting sense. The following claims are intended to cover all generic and specific features described herein, as well as all statements of the scope of the present method and system, which, as a matter of language, might be said to fall therebetween. It is also anticipated that steps of methods may be performed in an order different from that illustrated and still be within the meaning of the claims.
Claims
1. A grating coupler configured to couple radiation between a waveguide and radiation of a beam port at an angle out of a plane that is defined by the grating coupler, the grating coupler comprising:
- first patterned shapes in a first layer, the first layer comprising a first planar material, and second patterned shapes in a second layer, the second layer comprising a second planar material; and
- a plurality of adjacent unit cells arranged along a direction of propagation of light in the grating coupler, each unit cell comprising a first shape and a second shape, the first shape of each unit cell being of the first patterned shapes and the second shape of each unit cell being of the second patterned shapes, each unit cell having design parameters comprising a width wb of the first shape, and a width wt of the second shape;
- wherein widths wb of the first shapes of the plurality of unit cells progressively increase along the direction of propagation of light in the grating coupler while widths wt of the second shapes of the plurality of the unit cells progressively decrease along the direction of propagation of light in the grating coupler; and
- a spacing between the first layer comprising the first planar material and the second layer comprising the second planar material that is less than an effective wavelength of the light in a background material.
2. The grating coupler of claim 1, where a second unit cell is configured to have a radiation strength α that differs from that of a first unit cell by at least 20% and the first and second unit cell have directionality of at least 10 dB.
3. The grating coupler of claim 1, wherein the second unit cell has a cell width that, when implemented as the unit cell of a uniform periodic grating, produces an output radiation at an angle that differs from that of the first cell by at least one degree, the combination of a plurality of cells including the first and second unit cells adapted to produce a converging beam at the beam port.
4. The coupler of claim 1 wherein the first unit cell is closer to the input waveguide than a third unit cell, the third unit cell being closer to the input waveguide than the second unit cell, and the first unit cell is configured to have an output angle θ1 that leans forward away from the input waveguide and the second unit cell is configured to have an output angle θ2 that leans backward, toward the input waveguide.
5. The grating coupler of claim 1, where the unit cells have a locally monotonically increasing width wt of the shapes in the second planar material from the waveguide to an end of the coupler distant from the waveguide.
6. The grating coupler of claim 1 wherein the waveguide comprises a shape formed in the first planar material layer.
7. The grating coupler of claim 1, where the unit cells have a locally monotonically decreasing width wt of the shapes in the second planar material from the waveguide to a distal terminus of the coupler.
8. The grating coupler of claim 1 wherein the waveguide comprises a shape formed in the second planar material layer.
9. The grating coupler of claim 1 wherein the first and second planar material have similar indexes of refraction.
10. The grating coupler of claim 1, where an offset between the first edge of the first shape and the first edge of the second shape of the second unit cell is smaller than an offset between the first edge of the first shape and the first edge of the second shape in the first unit cell.
11. The grating coupler of claim 10, where the cell width A of the first unit cell is approximately the same as the cell width A of the second unit cell.
12. The grating coupler of claim 1, the first planar material being formed prior to the second planar material.
13. The grating coupler of claim 12, the first planar material being an active layer also used for source and drain of transistors of an integrated circuit, and the second planar material being a polysilicon layer also used as a gate layer of transistors of the integrated circuit.
14. The grating coupler of claim 13, configured such that light emitted from a surface of the coupler proximate the first planar layer being more intense than light emitted from a surface of the coupler proximate the second planar layer.
15. The grating coupler of claim 1, where the waveguide is implemented in the first material layer.
16. The grating coupler of claim 1 where the first and the second planar material layers are separated by approximately a quarter wavelength in the vertical directions.
17. The grating coupler of claim 1 where the first and second planar material layers are spaced vertically by less than one effective wavelength in the background material.
18. The grating coupler of claim 1 where the first and second planar material layers have a high refractive index contrast with the background material.
19. The grating coupler of claim 1 wherein the first shapes and the second shapes of each unit cell overlap if viewed from above.
20. The grating coupler of claim 1 where a period of the first shapes is nonuniform but does not change rapidly.
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Type: Grant
Filed: Mar 21, 2017
Date of Patent: Apr 20, 2021
Patent Publication Number: 20170269297
Assignee: The Regents of the University of Colorado, a body corporate (Denver, CO)
Inventor: Milos A. Popovic (Boulder, CO)
Primary Examiner: Peter Radkowski
Application Number: 15/465,466
International Classification: G02B 6/12 (20060101); G02B 6/124 (20060101); H01L 27/12 (20060101); G02B 27/42 (20060101); G02B 6/122 (20060101); G02B 6/34 (20060101); G02B 6/30 (20060101);