AUTOMATIC COMPUTER-SYSTEM-LEVEL INTEGRATED CIRCUIT TESTING SYSTEM AND METHOD

Abstract

An automatic computer-system-level IC testing system comprises a testing computer, an IC mounting/retrieving mechanism, a temperature regulator, and a control unit. The testing computer connects and tests the IC that is arranged in the testing computer and retrieved there from via the IC mounting/retrieving mechanism. The temperature regulator regulates the testing temperature the IC being tested. The control unit is connected to the testing computer and the IC mounting/retrieving mechanism to supervise the testing process. Once the IC to be tested in connected therein, the testing computer forms a complete computer system through the operation of which the testing is performed.

Description

CROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the priority benefit of Taiwan application serial no. 91117120, filed Jul. 31, 2002.

BACKGROUND OF INVENTION

[0002] 1. Field of the Invention

[0003] The invention relates generally to an automatic computer-system-level IC testing method and system. More particularly, the invention provides a testing system that is capable of simulating the operating configuration of the computer of a terminal user subjected to different testing conditions.

[0004] 2. Description of the Related Art

[0005] Computer systems are presently diversified in many different types, such as servers, workstations, desktop computers, notebook computers, portable computers, personal digital assistants, palm-top PC, pocket PC, industrial computers, etc. To ensure a good functional operation of the computer, the integrated circuit (IC) devices that compose the computer usually have to pass through numerous testing procedures.

[0006] FIG. 1 is a block diagram that schematically illustrates the hardware structure of a personal computer system. A personal computer system 100 comprises a plurality of principal IC devices including a central processor unit (CPU) 110, a system bus controller 112, and an input/output (I/O) bus controller 114. A memory 116 and an advanced graphic port (AGP) 118 are coupled with the system bus controller 112. A monitor 120 is coupled with the AGP 118 to output an image. A peripheral component interface (PCI) is further connected between the system bus controller 112 and the I/O bus controller 114. The I/O bus controller 114 is further connected to an integrated drive electronics (IDE) interface 130, a floppy disk drive 132, a parallel port 134, a serial port 136, and a universal serial bus (USB) 138. Optionally, the I/O bus controller 114 may be further connected to an audio effect chip 140 and ethernet 142. All the above components are constructed from IC devices the cooperation between which enables the computer system to functionally operate.

[0007] FIG. 2 is a flow chart that illustrates a conventional IC device testing process. After being completed, an IC 202, for example a logic circuit, undergoes a preliminary testing and is subsequently packaged. Thereafter, the packaged IC device usually passes through a final testing 204 before delivery at step 206. The final testing is conventionally performed via electrically connecting the IC device to a testing socket within an automatic testing equipment. Different testing configurations then are applied to determine whether the IC device normally operates. More particularly, the IC device may undergo testing under high and low testing temperatures. To achieve this testing under different temperatures, at least two testing equipment are necessary, one in which high temperature testing is performed and one in which low temperature testing is performed. According to the testing results, the IC devices are sorted out for delivery. The above testing under different temperature conditions is not efficient because it requires the conveyance of the IC device between different testing equipment.

[0008] With respect to the memory IC devices, the final testing is particularly divided into a first stage (1) of final testing 208 and a second stage (2) of final testing 212, separated via a burn-in testing 210. The first and second stages of final testing 208, 212 are usually performed in the automatic testing equipment. The burn-in testing in turn is performed via electrically connecting the IC device to a connector of a circuit board, and placing the circuit board in a heating and testing machine where a thermal stress, a voltage stress and/or a current stress are applied to the IC device. This conventional testing process can test specific functional operations of the IC device, but is unable to simulate a real-world operating configuration of the terminal user. Therefore, when the IC device is subsequently assembled within the computer system with other computer components, further compatibility problems may still appear.

[0009] Referring to FIG. 3, a flow chart schematically illustrates an IC device module testing method known in the prior art. In order to simulate the operating configuration of a terminal user computer, it is also known to use a module such as an interface or a complete computer system to test the IC device after the final testing has been completed. As illustrated, an IC device 302 is therefore typically placed in a testing module or a testing computer (step 304). Testing then is performed in a simulated operating configuration of the terminal user's computer (step 306). The IC devices that have passed this testing then are delivered to the client. The above module testing substantially relies upon a human operator that observes the operating state of the IC device being tested to evaluate whether the IC device is This manual testing reduces the throughput and is time-consuming. Furthermore, it may be subject to human errors.

SUMMARY OF THE INVENTION

[0010] An aspect of the invention is therefore to provide an IC device computer-system-level testing method and a testing system that implements the same method that allow testing of one or more IC device in the operating configuration of the terminal user's computer system, so that the compatibility between the tested IC device and other components is accurately evaluated.

[0011] Another aspect of the invention is to provide an IC device testing system that is capable of automatically testing an IC device, so that the throughput is increased.

[0012] Furthermore, another aspect of the invention is to provide an IC device computer-system-level testing system in which the IC device can be tested under different testing temperature conditions.

[0013] To accomplish the above and other objectives, the invention provides an IC device computer-system-level testing method that comprises the following steps. An IC device is transferred from a location where it is on standby for testing to a location where it is tested by means of a testing computer. The IC device is electrically connected to a connector in the testing computer. The IC device then is tested via running the testing computer, the IC device being subject to different testing temperatures.

[0014] According to one embodiment of the invention, the IC device is tested under a thermal cycle with a varying testing temperature.

[0015] According to a variant embodiment of the invention, the IC device is separately tested with different testing temperatures applied to the IC device.

[0016] In accordance with the above objectives, the invention further provides an automatic testing system that is capable of automatically testing an IC device at a computer system level. The automatic testing system comprises an IC supplying station, an IC conveyance mechanism, an IC mounting/retrieving mechanism, a testing computer, one or more temperature regulator, an output device, an image sensor, a control unit, and an IC sorting station. The IC conveyance mechanism conveys one IC device to be tested from the IC supplying station to the testing computer, the IC mounting/retrieving mechanism being used to mount the IC device to the corresponding connector of the testing computer. The testing computer has a complete structure that simulates the computer of a terminal user. By running the testing computer, the IC device is tested under a terminal. By means of the temperature regulator mounted to the testing computer, the IC device is tested with different testing temperatures. The output device outputs an image of the testing results that is captured by the image sensor. This image is delivered to the control unit that evaluates whether the IC device normally operates. The control unit is respectively connected to the IC mounting/retrieving mechanism, the IC conveyance mechanism, the testing computer, the temperature regulator, and the image sensor to automatically supervise the testing process. After the testing of the IC device has been completed and according to the testing results, the IC device is transferred from the testing computer to the IC sorting station.

[0017] According to a variant embodiment of the invention, additional temperature regulators may be mounted to, for example, the IC mounting/retrieving mechanism or a temperature regulating station in which the temperature of the IC device to be tested is regulated before being mounted in the testing computer.

[0018] It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.

BRIEF DESCRIPTION OF DRAWINGS

[0019] The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings,

[0020] FIG. 1 is a block diagram schematically illustrating a conventional personal computer system;

[0021] FIG. 2 is a flow chart schematically illustrating a conventional IC device testing process;

[0022] FIG. 3 is a flow chart schematically illustrating a conventional IC device module testing process;

[0023] FIG. 4 is a schematic view of a module interface adapted to being tested by an embodiment of the invention;

[0024] FIG. 5 is a schematic view of a computer main board adapted to being tested by an embodiment of the invention;

[0025] FIG. 6, FIG. 6A and FIG. 7 are different schematic views showing an automatic computer-system-level IC testing system according to various embodiments of the invention; and

[0026] FIG. 8A, FIG. 8B, and FIG. 8C are various graphs showing different testing temperatures of the IC device being tested according to an embodiment of the invention.

DETAILED DESCRIPTION

[0027] The following detailed description of the embodiments and examples of the present invention with reference to the accompanying drawings is only illustrative and not limiting. Furthermore, wherever possible in the description, the same reference symbols will refer to similar elements and parts unless otherwise illustrated in the drawings.

[0028] Reference now is made to FIG. 4 through FIG. 8C to describe an automatic computer-system-level IC testing system of the invention. The invention provides an automatic computer-system-level testing system that is capable of testing integrated circuit (IC) devices by means of a testing computer 600 (see FIG. 6). The testing system comprises a frame 650, an IC mounting/retrieving mechanism 612, temperature regulators 613, 614, 615, an IC conveyance mechanism 620, and a control unit 640. The control unit 640 is respectively connected to the testing computer 600, the IC mounting/retrieving mechanism 612, the IC conveyance mechanism 620 and the temperature regulators 613, 614, 615 to supervise the testing process.

[0029] The testing computer 600 is a “known good” computer. By “known good” computer, it is meant a computer that is presumed to have good components except those being tested therein. The known good computer may be, for example, a personal computer that includes a principal unit 602, a storage device 604 and an output device 606.

[0030] To simulate the configuration of a terminal user computer, the testing computer comprises a plurality of known good components the standards of which are similar to those of conventionally used components. The principal unit 602 comprises a plurality of IC devices such as, for example, a central processor unit (CPU), a system bus controller, an I/O bus controller, and IC devices constituting the interface module such as a graphic accelerator, etc. All these IC devices of the known good computer are typically placed on printed circuit boards.

[0031] The person skilled in the art knows that, for example, the central processor unit, the system bus controller and the I/O bus controller are usually connected on a computer main board. The central processor unit connects the computer main board via a connector known as, for example, the socket 478, socket 423, socket 370, and socket 7. The memory IC devices are placed on a module circuit board that connects the computer main board via a connector such as, for example, DIMM (dual in-line memory module) and/or RIMM (RAMBUS in-line memory module). The system bus controller and the I/O bus controller are usually mounted on the computer main board via surface mount technology (SMT). The graphic accelerator can be directly mounted on the computer main board via surface mount technology or, alternatively, it may be arranged on a module circuit board that in turn connects the computer main board through an advanced graphic port. Furthermore, the IC devices of an amplifying interface of the peripheral component interface (PCI) are placed on another module circuit board that connects the computer main board via a PCI slot. The common computer system may further comprise an audio chip and an ethernet chip that can be directly mounted on the computer main board or mounted on a module circuit board that connects the computer main board through a PCI slot.

[0032] The mounting of the different IC devices in the testing computer, including known good IC devices and one or more IC device to be tested, is very similar to that for a common computer. However, one or more connector may be specifically designed for the purpose of testing. Specifically designed connectors are particularly required in the case of, for example, IC devices that conventionally are definitively fixed on the circuit board via soldering, these IC devices need not be soldered in the testing computer of the invention to perform testing. The connectors are placed on the computer main board and/or the module circuit boards of the interface modules. Thereby, substantially all the IC component devices can be assembled and disassembled from the testing computer.

[0033] As it can be appreciated, the invention may be adapted to test IC devices of computer products other than personal computers as described above. The testing computer therefore differently may be a server system, a workstation, a desktop computer, a portable computer such as notebook or pocket computer, an industrial computer, etc.

[0034] Referring to FIG. 6, the storage device 604 includes, for example, a floppy disk drive or a hard disk drive to store data. Furthermore, the output device 606 includes, for example, a monitor, a printer, and/or speakers. In addition, the testing computer 600 includes a plurality of peripheral components 610 such as a keyboard, a mouse, a scanner, a CD-ROM drive, etc. The above hardware equipment is accompanied with the provision of software programs such as an operating system, game programs, computer digital control code, CAD/CAM software applications, etc. to test the compatibility between the IC devices and the hardware/software equipment.

[0035] One or more IC device to be tested is mounted to a corresponding connector, designated by the reference symbol 608, in the testing computer. The testing of the device is performed via executing a testing procedure by means of the testing computer system. For example, in a first testing configuration, an IC device A may be mounted to a connector A′ to be tested in respect of known good IC devices B1, B2, B3, etc. that are selectively mounted to a connector B′ (not shown). Thereby, the working cooperation between the IC device A and the IC devices B1, B2, B3, etc. can be evaluated through running the computer system. In a second testing configuration, an IC device B may be mounted to the connector B′ to be tested with a known good IC device A that is electrically connected through the connector A′. By testing of the IC device in a real-world operating configuration of the computer system, the testing can therefore take into account the numerous interactions that occur between the different components of the computer system. Different aspects of the tested IC device such as its compatibility with other components (including other IC devices) can be therefore more accurately evaluated.

[0036] Referring to FIG. 4, a schematic view illustrates a computer-system-level testing that may be applied to test, for example, an interface module. Dedicated to the specific testing of, for example, the graphic accelerator IC device of the advanced graphics port (AGP) module 400, the principal unit of the testing computer comprises a module circuit board 402 on which is mounted a connector 404. To perform the testing, the graphic accelerator IC device is electrically connected through the connector 404. Other parts of the module circuit board 402 such as video RAM 406, gold contact pins 408 of the AGP slot or monitor socket 410 are standard.

[0037] Referring to FIG. 5, a schematic view illustrates another computer-system-level testing that is applied to a computer main board. In this case, the principal unit of the testing computer is provided with a specific computer main board 500 on which are connected a plurality of known good IC devices. Those IC devices may include, for example, a central processor unit (CPU), a system bus controller, and an I/O bus controller that are respectively connected to the computer main board respectively through a CPU socket 502, a system bus controller connector 504, and an I/O bus controller connector 506. The other components of the computer main board 500, including DRAM slot 508, AGP slot 510, expansion slots 512 (including PCI slot and CNR slot), IDE port 514 and I/O ports 516 (including parallel and serial ports) are all standard. The aforementioned connectors are in accordance with the specific types of packaging structure of the IC devices such as ball grid array (BGA) packages (including BGA, PBGA, EBGA), pin grid array (PGA) packages (including PGA, CPGA, PPGA), small outline J-bend (SOJ) packages, etc.

[0038] Referring to FIG. 6, the IC mounting/retrieving mechanism 612, for example, a robotic arm, is provided to mount an IC device to the corresponding connector 608 or retrieved an IC device from the connector 608. Testing is performed via executing a testing program stored in the storage device 604. The testing program may include, for example, common software programs such as the operating system Windows® or image processing software programs in general, and/or testing programs specifically designed for testing the IC device.

[0039] The output device 606, for example a monitor, is used to output and display the image of the testing results. This image is captured via an image sensor 616 and is subsequently compared with a reference data to evaluate whether the tested IC device normally operates. An abnormal event showing a failure of the IC device may be, for example, image shaking, discoloring display, ghost shadow, white block, etc. It will be understood that if the output device 606 is another type of device such as, for example, a printing apparatus, the image sensor 616 will be adequately adapted to take the image of, for example, the printed document. In the case the testing computer is a digital command computer that controls a processing machine, the image sensor 616 may be adequately placed to capture an image of the operations of the processing machine. An abnormal event showing a failure of the tested IC device accordingly may be an incorrect operation of the processing machine. The image sensor 616 may be, for example, a charge coupled device (CCD) image sensor or a CMOS sensor. The IC conveyance mechanism 620 conveys an IC device 630 to be tested from an IC supplying station 622 (for example a receiving tray) to the location of the testing computer 600.

[0040] The IC conveyance mechanism 620 may be, for example, a robotic arm cooperating with the IC mounting/retrieving mechanism 612. Alternatively, the IC conveyance mechanism 620 and the IC mounting/retrieving mechanism 612 may be integrated into a single element, for example a robotic arm. Once the testing of an IC device is completed, by means of the IC conveyance mechanism 620 and the IC mounting/retrieving mechanism 612, the tested IC device is transferred from the testing computer 600 to an IC sorting station 624. The IC sorting station 624 comprises a plurality of temporary placement locations 624a, 624b where are distinctly received the IC devices that have passed the testing and the IC devices that have failed to the testing.

[0041] As illustrated in FIG. 6A, in a possible configuration, the IC sorting station 624 may be placed at a relatively farther distance from the testing computer 600. In this case, an intermediate receiving station 625 may be needed between the testing computer 600 and the IC sorting station 624. The IC conveyance mechanism 620 accordingly may comprise a plurality of robotic arms 621a, 621b that respectively transfer the tested IC device from the testing computer 600 to the intermediate receiving station 625 and from the intermediate receiving station 625 to the IC sorting station 624.

[0042] As illustrated in FIG. 6 and FIG. 6A, the temperature regulator 613 is mounted to the testing computer 600. The IC device can be therefore tested under various testing temperature conditions. Before being mounted into the testing computer 600, the IC device may be further preheated or pre-cooled via the temperature regulators 614, 615 that are respectively mounted to, for example, the IC mounting/retrieving mechanism 612 and a temperature regulating station 623. Before being connected in the testing computer 600, the IC device may be accordingly transferred from the IC supplying station 622 to the temperature regulating station 623 in which it is brought to a desired initial temperature. The IC device then is transferred from the temperature regulating station 622 to the testing computer 600, the temperature regulator 614 on the IC mounting/retrieving mechanism 612 preventing a temperature bias during the mount/transfer operations of the IC device. Alternatively, the IC mounting/retrieving mechanism 612 may be continuously in contact with the IC device when this latter is tested in the testing computer 600. The temperature regulator 614, mounted on the mounting/retrieving mechanism 612, therefore may be also used to regulate the testing temperature of the IC device being tested in the testing computer. The temperature regulators 613, 614, 615 include, for example, thermal resistors, fluid heating/cooling tubes, and/or electrical fans to perform heating and cooling operations, and also temperature sensors to sense the testing temperature of the IC device.

[0043] The control unit 640 is respectively connected to the testing computer 600, the image sensor 616, the IC mounting/retrieving mechanism 612, and the temperature regulators 613, 614, 615 to control and command the operations of these components, which allows an automation of the testing process

[0044] Reference now is made to the description of testing conditions, accompanied with the illustration of FIG. 6, FIG. 6A, and FIG. 8A through FIG. 8C.

[0045] By means of the IC conveyance mechanism 620 and the IC mounting/retrieving mechanism 612, an IC device 630 is transferred from the IC supplying station 622 to the testing computer 600 and is mounted to a connector 608 therein. According to a variant embodiment of the invention, prior to testing in the testing computer 600, the IC device 630 may undergo preheating or pre-cooling through the temperature regulating station 623. This preconditioning allows the observation of the operations of the IC device in specific starting temperature conditions. In the invention, if the IC device 630 is, for example, a graphics chip, it will be preferably preconditioned in the temperature regulating station 623 before undergoing testing in the testing computer 600. In contrast, if the IC device 630 is a CPU chip, it will be preferably transferred to the testing computer 600 without passing through the temperature regulating station 623, the temperature of the CPU chip being regulated by the temperature regulator 614 on the IC mounting/retrieving mechanism 612.

[0046] Once mounted, the IC device 630 is tested through running of the complete testing computer 600. According to a preferred embodiment of the invention, the IC device is tested under temperature conditions that are timely modified by means of the temperature regulators 613, 614. The testing temperature of the IC device is varied between, for example, a high testing temperature of about 65° C. to 120° C., and a low testing temperature of about −10° C. to 10° C.

[0047] FIG. 8A through FIG. 8C are schematic graphs that illustrate various thermal cycles applied during the testing of the IC device according to an embodiment of the invention. In the thermal cycle of FIG. 8A, the initial testing temperature at point A is 25° C. By adequately heating, which causes an approximately constant temperature increase of about +3° C./min to +5° C./min, the testing temperature of the IC device is progressively brought to a temperature level between about 65° C. and 120° C., at which it is kept constant for a given time interval (corresponding to BC). This time interval may vary between 3 sec to 10 min according to the type of IC device tested. Lastly, the temperature is decreased to the point D (about 25° C.).

[0048] In the thermal cycle of FIG. 8B, the initial testing temperature of the IC device at point A′ is 25° C. By adequately cooling, which causes an approximately constant temperature decrease of about −3° C./min to −5° C./min, the testing temperature is progressively brought to a temperature level between about −10° C. and 10° C., at which it is kept constant for a given time interval (corresponding to B′C′). This time interval may vary between 3 sec to 10 min according to the type of IC device tested. Lastly, the temperature is increased to the point D′ (about 25° C.).

[0049] In the thermal cycle of FIG. 8C, the initial testing temperature of the IC device at point A″ is 25° C. By adequately cooling, which causes a temperature decrease at a rate of about −3° C./min to −5° C./min, the testing temperature is progressively brought to a temperature level between about −10° C. and 10° C., at which it is kept constant for a given time interval (corresponding to B″C″). This time interval may vary between 3 sec to 10 min according to the type of IC device tested. By adequately heating, which causes a temperature increase of about +3° C./min to +5° C./min, the testing temperature then is progressively brought to a temperature level between about 65° C. and 120° C., at which it is kept constant for about 3 sec to 10 min (corresponding to D″E). Lastly, the temperature is decreased from E to F (about 25° C.).

[0050] The above thermal cycles are applied while the testing computer 600 is continuously operated. Since the state of the IC device is monitored via the image sensor 616, the testing temperature at which the IC device is damaged and stops normally operating can be evaluated.

[0051] It is noticed that, instead of applying thermal cycles, the IC device may be also tested separately under different constant temperature conditions, such as 0° C., 65° C., and 120° C., maintained for about several seconds to several minutes.

[0052] As schematically illustrated in FIG. 7, the above testing system may be replicated to perform testing of IC devices in a mass production. Temporary placement locations 624a, 624b, 624c of the IC sorting station 624 may be further used to respectively place, for example, IC devices that are tested good, IC devices that exhibit certain defective functional characteristics, and IC devices that have failed to the testing.

[0053] As described above, the automatic computer-system-level testing system and method of the invention therefore include at least the following advantages.

[0054] 1. One or more IC device is tested by means of a testing computer in which the IC device is mounted to form a complete computer, including the principal unit and the peripheral components. The IC device is therefore tested in a terminal user computer configuration, which enables to effectively test specific performance characteristics of the IC device through running a variety of software programs. Since more than one IC device can be tested in the testing computer of the invention, the obtained testing results therefore provide more information about, for example, the compatibility between the different IC devices of the computer.

[0055] 2. By respectively including an IC mounting/retrieving mechanism, a conveyance mechanism, an IC supplying station, an IC sorting station, an image sensor, and a control unit, the computer testing system favorably enables an automation of the testing process.

[0056] 3. By including a plurality of temperature regulators, the testing system of the invention is capable of testing the IC device within the testing computer under different testing temperature conditions to determine the break level of the tested IC device.

[0057] 4. By using an image sensor, the operating state of the testing computer is continuously monitored to accurately evaluate the failure of the IC device.

[0058] It should be apparent to those skilled in the art that other structures that are obtained from various modifications and variations of different parts of the above-described structures of the invention would be possible without departing from the scope and spirit of the invention as illustrated herein. Therefore, the above of embodiments and examples only illustrates specific ways of making and performing the invention that, consequently, should cover variations and modifications thereof, provided they fall within the inventive concepts as defined in the following claims.

Claims

1. An automatic computer-system-level integrated circuit (IC) testing system, comprising:

a testing computer, receiving at least an IC device to be tested, the testing computer with the IC device therein forming a complete computer system;

an IC mounting/retrieving mechanism, operated to place and connect the IC device in the testing computer and retrieve the IC device from the testing computer;

a first temperature regulator, regulating a testing temperature of the IC device; and

a control unit, connected to the testing computer and the IC mounting/retrieving mechanism to respectively control the operation of the IC mounting/retrieving mechanism and a testing procedure executed by means of the testing computer.

2. The system of claim 1, wherein the testing computer includes a connector to which is connected the IC device.

3. The system of claim 1, further including an image sensor that is connected to the control unit to monitor an image output of the testing computer.

4. The system of claim 1, further including a sound sensor that is connected to the control unit to monitor an audio output of the testing computer.

5. The system of claim 1, wherein the testing temperature of the IC device is regulated during the testing.

6. The system of claim 1, wherein the first temperature regulator is mounted on the IC mounting/retrieving mechanism to regulate the temperature of one IC device being carried by the IC mounting/retrieving mechanism.

7. The system of claim 1, wherein the first temperature regulator is mounted to the testing computer to regulate the testing temperature of the IC device being tested.

8. The system of claim 1, wherein the IC mounting/retrieving mechanism includes a robotic arm.

9. The system of claim 1, further including:

an IC supplying station, receiving a plurality of IC devices to be tested;

an IC sorting station, receiving IC devices that have been tested; and

an IC conveyance mechanism, conveying the IC devices respectively between the testing computer and the IC supplying station, and between the testing computer and the IC sorting station, wherein by means of the IC conveyance mechanism and the IC mounting/retrieving mechanism, one IC device that is to be tested is transferred from the IC supplying station to the testing computer, and one IC device that has been tested is transferred from the testing computer to the IC sorting station.

10. The system of claim 19, further respectively including a temperature regulating station that regulates the temperature of one IC device to be tested before the IC device is transferred to the testing computer, the first temperature regulator being mounted on the IC mounting/retrieving mechanism to regulate the temperature of one IC device being carried by the IC mounting/retrieving mechanism.

11. The system of claim 1, wherein the first temperature regulator is mounted to a temperature regulating station to regulate the temperature of one IC device to be tested placed therein before being transferred to the testing computer.

12. A computer-system-level IC testing system, comprising:

a testing computer, receiving at least an integrated circuit (IC) device to be tested, the testing computer with the IC device received therein forming a complete computer system to execute a testing procedure;

a first temperature regulator, regulating a testing temperature of the IC device; and

an output device, used to indicate an operating state of the testing computer when the testing computer runs the testing procedure, thereby evaluating a testing result of the IC device.

13. The system of claim 12, further including a connector through which one IC device is electrically connected to the testing computer.

14. The system of claim 12, wherein the IC device comprises at least one of the following devices: a central processor unit (CPU), a system bus controller, an input/output (I/O) bus controller, and a graphics accelerator.

15. A computer-system-level IC testing method, comprising:

placing and electrically connecting an IC device in a testing computer so that the testing computer forms a complete computer system;

regulating a testing temperature of the IC device in the testing computer;

by means of the testing computer, executing a testing procedure for testing the IC device; and

obtaining a testing result by evaluating an operating state of the testing computer to detect whether the tested IC device is normally operating.

16. The method of claim 15, wherein placing and electrically connecting an IC device in a testing computer is performed by means of an IC conveyance mechanism and an IC mounting/retrieving mechanism that transfer the IC device to be tested from an IC supplying station to the testing computer.

17. A temperature regulating system used for computer-system-level testing an IC device, comprising:

a first temperature regulator, regulating the temperature of the IC device before the IC device is tested; and

a second temperature regulator, regulating the testing temperature of the IC device being tested.

18. The system of claim 17, further including a third temperature regulator to control the temperature of the IC device when the IC device is transferred from a standby location for IC testing to a testing location.

19. The system of claim 17, further including a control unit used to control the first and second temperature regulators.

20. The system of claim 17, wherein the IC device is tested via a complete computer system with the tested IC device incorporated therein.